US20170040357A1 - Image sensor and method for fabricating the same - Google Patents

Image sensor and method for fabricating the same Download PDF

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US20170040357A1
US20170040357A1 US14/886,467 US201514886467A US2017040357A1 US 20170040357 A1 US20170040357 A1 US 20170040357A1 US 201514886467 A US201514886467 A US 201514886467A US 2017040357 A1 US2017040357 A1 US 2017040357A1
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semiconductor substrate
image sensor
dielectric
forming
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Shih-Chung Yu
Kai-Chieh Chuang
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United Microelectronics Corp
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United Microelectronics Corp
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Priority to US15/407,541 priority Critical patent/US10079259B2/en
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    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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Definitions

  • the invention relates in general to a semiconductor device and the method for fabricating the same, and more particularly to an image sensor and the method for fabricating the same.
  • An image sensor such as a metal-oxide-semiconductor (MOS) image sensor, is a device that converts an optical image into an electric signal and has been commonly used in the consumer electronics that require high resolution, such as digital cameras, apparatuses for applying personal communications service (PCS), game equipment, etc.
  • MOS metal-oxide-semiconductor
  • Pixel density of an image sensor may be increased and the size and pitch of the photoelectric transducer devices, such as photodiodes, that are involved in the image sensor may be shrank.
  • the shrinkage in the pitch of the photoelectric transducer devices may cause electrical and optical crosstalk by which image resolution of the image sensor may thus be deteriorated; and the sensing images may be distorted.
  • STIs shallow trench isolation
  • BSI backside illumination
  • the image sensor includes a semiconductor substrate, a plurality of photoelectric transducer devices and a dielectric isolating structure.
  • the semiconductor substrate has a backside surface and a front side surface opposite to the backside surface.
  • the photoelectric transducer devices are disposed on the front side surface.
  • the dielectric isolating structure extends downwards into the semiconductor substrate from the front side surface and penetrates through the backside surface, so as to from a grid structure and to isolate the photoelectric transducer devices from each other.
  • a method for fabricating an image sensor includes steps as follows: Firstly, a semiconductor substrate having a plurality of photoelectric transducer devices and a dielectric isolating structure is provided, wherein the semiconductor substrate has a backside surface and a front side surface opposite to the backside surface; the photoelectric transducer devices are disposed on the front side surface; and the dielectric isolating structure extends downwards into the substrate from the front side surface and penetrating through the backside surface, so as to isolate the photoelectric transducer devices from each other. Subsequently, a portion of the semiconductor substrate is removed from the backside surface to expose a portion of the dielectric isolating structure, so as to form a grid structure protruding from the backside surface.
  • an image sensor and method for fabricating the same are provided.
  • a dielectric isolating structure is formed at a front side surface of a semiconductor substrate and extending downwards into the semiconductor substrate in a manner of dividing the semiconductor substrate into a plurality of sub-pixel regions.
  • at least one photoelectric transducer device is formed on each of the sub-pixel regions.
  • a portion of the semiconductor substrate is removed from the backside surface to expose a portion of the dielectric isolating structure, so as to form a grid structure protruding from the backside surface of the semiconductor substrate.
  • the grid structure is one portion of the dielectric isolating structure that is exposed from the backside surface of the substrate.
  • the grid structure and the dielectric isolating structure can be regarded as an integrated structure formed by the same patterning process with an identical reticle.
  • the grid structure can be form on the backside surface of the substrate without using additional reticles and alignment marks.
  • the process for fabricating the image sensor can be simplified; more precise process control and reduced manufacturing cost can be obtained.
  • FIGS. 1A-1G are cross-sectional views illustrating the process for fabricating a MOS image sensor in accordance with one embodiment of the present invention
  • FIG. 2 is a top view illustrating a grid structure in accordance with one embodiment of the present invention.
  • FIGS. 3A-3C are cross-sectional views partially illustrating the process for fabricating a MOS image sensor in accordance with another embodiment of the present invention.
  • FIGS. 4A-4D are cross-sectional views partially illustrating the process for fabricating a MOS image sensor in accordance with yet another embodiment of the present invention.
  • FIGS. 5A-5C are cross-sectional views partially illustrating the process for fabricating a MOS image sensor in accordance with yet another embodiment of the present invention.
  • FIGS. 1A-1G are cross-sectional views illustrating the process for fabricating a MOS image sensor 100 in accordance with one embodiment of the present invention.
  • a semiconductor substrate 101 is provided (see FIG. 1A ).
  • the semiconductor substrate 101 may be made of a semiconductor material, such as silicon (Si), germanium (Ge) or a compound semiconductor material, such as gallium arsenide (GaAs).
  • the semiconductor substrate 101 may be a silicon-on-insulator (SOI) wafer.
  • SOI silicon-on-insulator
  • the semiconductor substrate 101 preferably is a Si wafer.
  • a dielectric isolating structure 103 is then formed in the semiconductor substrate 101 to divide the semiconductor substrate 101 into a plurality of sub-pixel regions 104 .
  • the dielectric isolating structure 103 is a deep trench isolation structure.
  • the forming of the dielectric isolating structure 103 includes steps as follows: An etching process, such as a reactive ion etching (RIE) process, is firstly performed on the front side surface 101 a of the semiconductor substrate 101 , to form at least one trench(es) 106 extending downwards into the semiconductor substrate 101 from the front side surface 101 a of the semiconductor substrate 101 , so as to divide the semiconductor substrate 101 into a plurality of sub-pixel regions 104 (see FIG. 1B ).
  • RIE reactive ion etching
  • a dielectric material 107 is formed on the front side surface 101 a of the semiconductor substrate 101 to fill the trenches 106 .
  • each of the trenches 106 has a depth substantially less than the thickness of the semiconductor substrate 101 .
  • the trenches 106 does not penetrating through the backside surface 101 b of the semiconductor substrate 101 (see FIG. 10 ).
  • the dielectric material 107 may be an anti-reflecting material including silicon oxide and may be filled in the trenches 106 with a single layer structure or a multi-layer structure.
  • the dielectric material 107 may include silicon dioxide (SiO 2 ).
  • the dielectric isolating structure 103 made of the dielectric material 107 is a deep trench isolation structure configured by one single layer of anti-reflecting material including SiO 2 , or a deep trench isolation structure configured by multi-layers of anti-reflecting material including a SiO 2 /silicon nitride (SiN)/SiO 2 /SiN/SiON stacked structure.
  • a series front side processes are then performed on the front side surface 101 a of the semiconductor substrate 101 to form at least one photoelectric transducer device 102 , wire connection and at least one pad 105 on each of the sub-pixel regions 104 (see FIG. 1D ).
  • each of the sub-pixel regions 104 that are separated by the dielectric isolating structure 103 may have single one photoelectric transducer device 102 .
  • each of the sub-pixel regions 104 that are separated by the dielectric isolating structure 103 may have a plurality of photoelectric transducer devices 102 .
  • the forming of the photoelectric transducer devices 102 comprises steps as follows: a plurality of ion implantation process are performed on the front side surface 101 a of the semiconductor substrate 101 to form at least one photo diode (PD) 102 a and a floating drain region 102 b at each of the sub-pixel regions 104 , wherein the floating drain region 102 b is corresponding to and separated from the PD 102 a .
  • a plurality of ion implantation process are performed on the front side surface 101 a of the semiconductor substrate 101 to form at least one photo diode (PD) 102 a and a floating drain region 102 b at each of the sub-pixel regions 104 , wherein the floating drain region 102 b is corresponding to and separated from the PD 102 a .
  • a gate structure 102 c corresponding to the PD 102 a and the PD 102 a is formed at each of the sub-pixel regions 104 on the front side surface 101 a of the semiconductor substrate 101 , wherein the gate structure 102 c is disposed adjacent to the PD 102 a and the PD 102 b.
  • the process for removing the portion of the semiconductor substrate 101 includes steps as follows: A thinning process, such as a chemical-mechanical polishing (CMP), is firstly performed on the backside surface 101 b of the semiconductor substrate 101 to thin down the semiconductor substrate 101 , so as to make the semiconductor substrate 101 has a thickness substantially less than 3 ⁇ m.
  • CMP chemical-mechanical polishing
  • An etching process is then performed on the backside surface 101 b of the thinned semiconductor substrate 101 to remove a portion of the semiconductor substrate 101 .
  • a wet etching process using tetramethylammonium hydroxide (TMAH) or hydrofluoric acid/nitric acid/acetic acid solution (HNA) as the etchant is performed on the backside surface 101 b of the semiconductor substrate 101 to remove a portion of the semiconductor substrate 101 from the backside surface 101 b , so as to expose a portion of the dielectric isolating structure 103 and to regard to the exposed portion of the dielectric isolating structure 103 as the grid structure 108 .
  • TMAH tetramethylammonium hydroxide
  • HNA hydrofluoric acid/nitric acid/acetic acid solution
  • the grid structure 108 formed by the wet etching process includes a frame portion 108 a consisting of the exposed portion of the dielectric isolating structure 103 and a plurality of recess portions 108 b defined by the frame portion 108 a and the backside surface 101 b of the semiconductor substrate 101 , wherein each of the recess portions 108 b is corresponding to one of the sub-pixel region 104 .
  • FIG. 2 is a top view illustrating a grid structure 108 in accordance with one embodiment of the present invention.
  • the grid structure 108 may be arranged with rows and columns to form a chessboard structure.
  • the arrangement of the grid structure 108 may not limited in this regard. In other embodiments, the arrangement of the grid structure 108 may varied in accordance with different layout designs (topographies) of the photoelectric transducer devices 102 .
  • a color filter (CF) 109 is formed on the grid structure 108 and the backside surface 101 b of the semiconductor substrate 101 , and a plurality of micro lenses 110 are then formed on the CF 109 .
  • the CF 109 includes a plurality of color filtering elements, e.g. including three color filtering elements 109 R, 109 G and 109 B; and each one of which is corresponding to each of the sub-pixel regions 104 .
  • each of the sub-pixel regions 104 may have one color filtering element; and the color filtering elements 109 R, 109 G and 109 B may at least partially extend into the corresponding recess portion 108 b of the grid structure 108 (see FIG. 1F ).
  • the micro lenses 110 preferably are made of glass, polymer and plastic material (such as, epoxy), propylene glycol mono-methyl ether acetate (PGMEA) or the arbitrary combinations thereof.
  • the metal interconnection structure 111 includes a plurality of metal wire layout layers 111 a and a plurality of via plugs 111 b used to electrically connect the metal wire layout layers 111 a and the pads 105 .
  • Incident light L coming from external circumstances, passing through the backside surface 101 b of the semiconductor substrate 101 and then directed to each of the sub-pixel regions 104 can be shielded and reflected by the grid structure 108 protruding from the backside surface 101 b and the portion of the dielectric isolating structure 103 buried in the semiconductor substrate 101 , whereby the incident light L can be confined in the corresponding sub-pixel regions 104 , and optical crosstalk occurring between different sub-pixel regions 104 can be avoided.
  • the photoelectric transducer devices 102 are isolated from each other by the dielectric isolating structure 103 , thus the photo-carriers generated by the photoelectric transducer devices 102 disposed in one of the isolated sub-pixel regions 104 cannot crosstalk with that generated by the photoelectric transducer devices 102 disposed in the other sub-pixel regions 104 adjacent to the isolated one.
  • FIGS. 3A-3C are cross-sectional views partially illustrating the process for fabricating a MOS image sensor 300 in accordance with another embodiment of the present invention.
  • the structure of the MOS image sensor 300 and the process for fabricating the same are similar to that of the MOS image sensor 100 , except that the MOS image sensor 300 further includes spacers 305 a formed on the grid structure 108 prior to the forming of the CF 109 . Since the processing steps prior to the forming of the grid structure 108 has described above, thus the identical elements and processing steps will not be redundantly repeated here, and the process for fabricating the MOS image sensor 300 may start to describe form the forming of the spacers 305 a.
  • the forming of the spacer 305 a includes steps as follows: Firstly, an insulating layer 312 and a capping layer 305 are formed in sequence on the structure depicted in FIG. 1E to blanket over the frame portion 108 a of the grid structure 108 and the portion of the backside surface 101 b of the semiconductor substrate 101 used to define the recess portions 108 b of the grid structure 108 (see FIG. 3A ). An anisotropic etching process, such as a RIE process, is then performed to remove a portion of the capping layer 305 , so as to form a plurality of spacers 305 a on the sidewalls of the frame portion 108 a of the grid structure 108 (see FIG. 3B ).
  • the insulating layer 312 may be a SiO 2 layer or a SiN layer.
  • the spacers 305 a are made of a light shielding material selected from a group consisting of metal (such as, copper (Cu), silver (Ag), aluminum (Al), titanium (Ti), tungsten (W), tantalum (Ta) etc.), metal oxide (such as, hafnium oxide (HfO 2 ), tantalum pentoxide (Ta 2 O 5 ) etc.), metal nitride (such as, titanium nitride (TiN) etc.), alloys (such as, aluminum alloys) and the arbitrary combinations thereof.
  • metal such as, copper (Cu), silver (Ag), aluminum (Al), titanium (Ti), tungsten (W), tantalum (Ta) etc.
  • metal oxide such as, hafnium oxide (HfO 2 ), tantalum pentoxide (Ta 2 O 5 ) etc.
  • metal nitride such as, titanium
  • a CF 109 is formed on the grid structure 108 and the backside surface 101 b of the semiconductor substrate 101 , and a plurality of micro lenses 110 are then formed on the CF 109 .
  • BEOL back-end-of-line
  • the image sensor 300 as shown in FIG. 3C can be accomplished.
  • Incident light L coming from external circumstances, passing through the backside surface 101 b of the semiconductor substrate 101 and then directed to each of the sub-pixel regions 104 can be shielded and reflected by the grid structure 108 protruding from the backside surface 101 b , the spacers 305 a and the portion of the dielectric isolating structure 103 buried in the semiconductor substrate 101 , whereby the incident light L can be confined in the corresponding sub-pixel regions 104 , and optical crosstalk occurring between different sub-pixel regions 104 can be avoided.
  • the photoelectric transducer devices 102 are isolated from each other by the dielectric isolating structure 103 , thus the photo-carriers generated by the photoelectric transducer devices 102 disposed in one of the isolated sub-pixel regions 104 cannot crosstalk with that generated by the photoelectric transducer devices 102 disposed in the other sub-pixel regions 104 adjacent to the isolated one.
  • FIGS. 4A-4D are cross-sectional views partially illustrating the process for fabricating a MOS image sensor 400 in yet accordance with another embodiment of the present invention.
  • the structure of the MOS image sensor 400 and the process for fabricating the same are similar to that of the MOS image sensor 100 , except that the dielectric isolating structure 403 of the MOS image sensor 400 is different from that of the MOS image sensor 100 . Since the processing steps prior to the forming of dielectric isolating structure 403 has described above, thus the identical elements and processing steps will not be redundantly repeated here, and the process for fabricating the MOS image sensor 400 may start to describe form the forming of the dielectric isolating structure 403 .
  • the forming of the dielectric isolating structure 403 includes steps as follows: Firstly, a first dielectric layer 403 a is formed on the structure depicted in FIG. 1B to blanket over the sidewalls 106 a and bottoms 106 b of the trenches 106 (see FIG. 4A ). An embedded light shielding layer 403 b is then formed on the first dielectric layer 403 a (see FIG. 4B ). A second dielectric layer 403 c is next formed on the embedded light shielding layer 403 b to make the embedded light shielding layer 403 b disposed between the first dielectric layer 403 a and the second dielectric layer 403 c (see FIG. 4C ).
  • the first dielectric layer 403 a and the second dielectric layer 403 c may be two single layer structures respectively made of SiO 2 and SiN. In some other embodiments, the first dielectric layer 403 a and the second dielectric layer 403 c may be two SiO 2 /SiN or SiO 2 /SiON bilayer structures. In yet other embodiments, the first dielectric layer 403 a and the second dielectric layer 403 c may be two multi-layer structures, such as two SiO 2 /SiN/SiO 2 or SiO 2 /SiON/SiO 2 tri-layer structures.
  • the embedded light shielding layer 403 b can be made by a material selected from a group consisting of SiN, SiON, poly-silicon, metal (such as, Cu, Ag, Al, Ti, W, Ta etc.), metal oxide (such as, HfO 2 , Ta 2 O 5 etc.), metal nitride (such as, TiN etc.) and the arbitrary combinations thereof.
  • a series front side processes are then performed on the front side surface 101 a of the semiconductor substrate 101 to form at least one photoelectric transducer device 102 on each of the sub-pixel regions 104 .
  • a portion of the semiconductor substrate 101 is removed from the backside surface 101 b to expose a portion of the dielectric isolating structure 403 , so as to form a grid structure 408 protruding from the backside surface 101 b of the semiconductor substrate 101 .
  • a CF 109 is formed on the grid structure 408 and the backside surface 101 b of the semiconductor substrate 101 , and a plurality of micro lenses 110 are then formed on the CF 109 .
  • the image sensor 400 as shown in FIG. 4D can be accomplished.
  • BEOL back-end-of-line
  • Incident light L coming from external circumstances, passing through the backside surface 101 b of the semiconductor substrate 101 and then directed to each of the sub-pixel regions 104 can be shielded and reflected by the grid structure 408 protruding from the backside surface 101 b and the portion of the dielectric isolating structure 403 buried in the semiconductor substrate 101 , whereby the incident light L can be confined in the corresponding sub-pixel regions 104 , and optical crosstalk occurring between different sub-pixel regions 104 can be avoided.
  • the photoelectric transducer devices 102 are isolated from each other by the dielectric isolating structure 403 , thus the photo-carriers generated by the photoelectric transducer devices 102 disposed in one of the isolated sub-pixel regions 104 cannot crosstalk with that generated by the photoelectric transducer devices 102 disposed in the other sub-pixel regions 104 adjacent to the isolated one.
  • FIGS. 5A-5C are cross-sectional views partially illustrating the process for fabricating a MOS image sensor 500 in yet accordance with another embodiment of the present invention.
  • the structure of the MOS image sensor 500 and the process for fabricating the same are similar to that of the MOS image sensor 100 , except that the dielectric isolating structure 503 of the MOS image sensor 500 is different from that of the MOS image sensor 100 . Since the processing steps prior to the forming of dielectric isolating structure 503 has described above, thus the identical elements and processing steps will not be redundantly repeated here, and the process for fabricating the MOS image sensor 500 may start to describe form the forming of the dielectric isolating structure 503 .
  • the forming of the dielectric isolating structure 503 includes steps as follows: Firstly, a light shielding liner 503 a is formed on the structure depicted in FIG. 1B to blanket over the sidewalls 106 a and bottoms 106 b of the trenches 106 (see FIG. 5A ). Next, a dielectric material 107 is formed to fill the trenches 106 (see FIG. 5B ).
  • the light shielding liner 503 a can be made by a material selected from a group consisting of SiN, poly-silicon, metal oxide (such as, HfO 2 , Ta 2 O 5 etc.), metal nitride (such as, TiN etc.) and the arbitrary combinations thereof.
  • a series front side processes are then performed on the front side surface 101 a of the semiconductor substrate 101 to form at least one photoelectric transducer device 102 on each of the sub-pixel regions 104 .
  • a portion of the semiconductor substrate 101 is removed from the backside surface 101 b to expose a portion of the dielectric isolating structure 503 , so as to form a grid structure 508 protruding from the backside surface 101 b of the semiconductor substrate 101 .
  • a CF 109 is formed on the grid structure 508 and the backside surface 101 b of the semiconductor substrate 101 , and a plurality of micro lenses 110 are then formed on the CF 109 .
  • the image sensor 500 as shown in FIG. 5C can be accomplished.
  • BEOL back-end-of-line
  • Incident light L coming from external circumstances, passing through the backside surface 101 b of the semiconductor substrate 101 and then directed to each of the sub-pixel regions 104 can be shielded and reflected by the grid structure 508 protruding from the backside surface 101 b and the portion of the dielectric isolating structure 503 buried in the semiconductor substrate 101 , whereby the incident light L can be confined in the corresponding sub-pixel regions 104 , and optical crosstalk occurring between different sub-pixel regions 104 can be avoided.
  • the photoelectric transducer devices 102 are isolated from each other by the dielectric isolating structure 503 , thus the photo-carriers generated by the photoelectric transducer devices 102 disposed in one of the isolated sub-pixel regions 104 cannot crosstalk with that generated by the photoelectric transducer devices 102 disposed in the other sub-pixel regions 104 adjacent to the isolated one.
  • a dielectric isolating structure is formed at a front side surface of a semiconductor substrate and extending downwards into the semiconductor substrate in a manner of dividing the semiconductor substrate into a plurality of sub-pixel regions.
  • at least one photoelectric transducer device is formed on each of the sub-pixel regions.
  • a portion of the semiconductor substrate is removed from the backside surface to expose a portion of the dielectric isolating structure, so as to form a grid structure protruding from the backside surface of the semiconductor substrate.
  • a CF 109 and a plurality of micro lenses are then formed on the grid structure 108 and the backside surface 101 b of the semiconductor substrate in sequence, wherein the CF extends into the grid structure 108 .
  • the grid structure is one portion of the dielectric isolating structure that is exposed from the backside surface of the substrate.
  • the grid structure and the dielectric isolating structure can be regarded as an integrated structure formed by the same patterning process with an identical reticle.
  • the grid structure can be form on the backside surface of the substrate without using additional reticles and alignment marks.
  • the process for fabricating the image sensor can be simplified; more precise process control and reduced manufacturing cost can be obtained.

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