US20040134418A1 - SiC substrate and method of manufacturing the same - Google Patents

SiC substrate and method of manufacturing the same Download PDF

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US20040134418A1
US20040134418A1 US10/702,806 US70280603A US2004134418A1 US 20040134418 A1 US20040134418 A1 US 20040134418A1 US 70280603 A US70280603 A US 70280603A US 2004134418 A1 US2004134418 A1 US 2004134418A1
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sic substrate
work
principal surface
substrate
affected layer
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Taisuke Hirooka
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Proterial Ltd
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Assigned to SUMITOMO SPECIAL METALS CO., LTD. reassignment SUMITOMO SPECIAL METALS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HIROOKA, TAISUKE
Assigned to NEOMAX CO., LTD. reassignment NEOMAX CO., LTD. CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: SUMITOMO SPECIAL METALS CO., LTD.
Publication of US20040134418A1 publication Critical patent/US20040134418A1/en
Assigned to HITACHI METALS, LTD. reassignment HITACHI METALS, LTD. MERGER (SEE DOCUMENT FOR DETAILS). Assignors: NEOMAX CO., LTD.
Priority to US13/152,524 priority Critical patent/US8530353B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/36—Carbides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/08—Etching
    • C30B33/12—Etching in gas atmosphere or plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide

Definitions

  • the present invention relates to a SiC (silicon carbide) substrate and a method of manufacturing the SiC substrate and, more particularly, to a method of manufacturing a SiC substrate in which at least one surface is polished.
  • a SiC single crystal substrate is demanded also as a substrate for forming a high-quality SiC semiconductor layer. Because a SiC semiconductor has a wide band gap, a large dielectric breakdown electric field and a large thermal conductivity in comparison with a GaAs semiconductor, research and development have been carried out to form high-quality SiC semiconductor layers on a SiC single crystal substrate and to realize semiconductor elements operating at high temperatures and power semiconductor elements having a high breakdown voltage. In addition, in the semiconductor process, dummy wafers made of SiC are demanded because these wafers have excellent heat resistance, high thermal conductivity, high-temperature strength, low thermal expansion, wear resistance, etc.
  • a sapphire single crystal substrate or a SiC single crystal substrate for such applications is required to provide high working accuracy in the flatness of the substrate, the smoothness of the substrate surface, etc.
  • a sapphire single crystal or SiC has high hardness and excellent corrosion resistance, and hence the workability of manufacturing such a substrate is bad and it is difficult to obtain a sapphire single crystal substrate and a SiC substrate having high working accuracy.
  • Japanese Laid-Open Patent Publication No. 55-20262 discloses a technique which involves immersing a sapphire single crystal substrate in heated phosphoric acid or potassium hydroxide solution and removing a work-affected layer remaining in the substrate by dissolving the work-affected layer thereby to eliminate a warp of the substrate.
  • the Japanese Laid-Open Patent Publication No. 55-20262 discloses that ion sputtering and ion etching may also be adopted as other processes for removing the work-affected layer of a sapphire single crystal substrate.
  • these processes involve performing the etching of a substrate surface by utilizing the physical energy of ions of argon, etc., which are accelerated by causing these ions to collide against the substrate surface.
  • these processes have the problem that the etching rate is low.
  • the melting point of SiC is not less than 2000° C., it is necessary to heat a SiC substrate to not less than 1600° C. in order to remove work strains by annealing. Large-scale equipment is necessary for subjecting the SiC substrate to heat treatment at such a high temperature.
  • preferred embodiments of the present invention provide a method of manufacturing a SiC substrate in which a work-affected layer is removed under practical conditions.
  • a method of manufacturing a SiC substrate which has a first principal surface and a second principal surface includes the steps of forming a work-affected layer by mechanical flattening or cutting on the first principal surface of the SiC substrate, and removing, by a vapor phase etching process, at least a portion of the work-affected layer which is formed by mechanical flattening or cutting on the first principal surface of the SiC substrate.
  • the vapor phase etching process is a reactive ion etching process.
  • the second principal surface is preferably a surface where an element is to be formed.
  • the method described above further includes a step of mirror polishing the second principal surface.
  • the SiC substrate has a work-affected layer which is formed by mechanical flattening or cutting, on the second principal surface
  • the method also includes the steps of removing at least a portion of the work-affected layer of the second principal surface by a vapor phase etching process, and mirror polishing at least the second principal surface after the steps of removing are performed.
  • the SiC substrate preferably has a work-affected layer which is formed by mechanical flattening or cutting, on the second principal surface, and the method further includes the step of removing the work-affected layer of the second principal surface by mechanical polishing and chemical mechanical polishing and mirror finishing the second principal surface.
  • the first principal surface obtained by the step of removing preferably has a surface roughness of about 10 nm to about 1 ⁇ m.
  • the method described above also preferably includes a step of cutting the SiC substrate from an ingot of SiC and the first principal surface and second principal surface are formed by the step of cutting.
  • the SiC substrate is preferably held so as to allow a change in the warp of the SiC substrate.
  • a gas containing fluorine is used in the vapor phase etching process.
  • the gas containing fluorine is preferably CF 4 or SF 6 .
  • the work-affected layer is preferably removed at an etching rate in a range of about 0.5 ⁇ m/hr to about 20 ⁇ m/hr.
  • the SiC substrate is preferably one of amorphous, a poly crystal and a single crystal.
  • Yet another preferred embodiment of the present invention provides a SiC substrate manufactured according to a method including a step of removing, by a vapor phase etching process, at least a portion of a work-affected layer which is formed by mechanical flattening or cutting on the first principal surface of the SiC substrate.
  • An additional preferred embodiment of the present invention provides a SiC substrate including two substantially parallel principal surfaces, wherein only one of the two principal surfaces is mirror finished and the warp is not more than about ⁇ 50 ⁇ m.
  • FIG. 1 is a schematic view showing how a substrate is cut from a SiC ingot.
  • FIG. 2 is a sectional view showing work-affected layers formed in a substrate cut by machining.
  • FIG. 3A shows a SiC sheet formed by sintering and FIGS. 3B and 3C each show a SiC substrate fabricated by a mechanical plane working from the SiC shown in FIG. 3A.
  • FIGS. 4A to 4 D are each a sectional view to explain a method of fabricating a SiC substrate according to a first preferred embodiment of the present invention.
  • FIG. 5 is a sectional view showing the state of a SiC substrate held in a substrate holder of a reacting ion etching device.
  • FIGS. 6A to 6 C are each a sectional view to explain a method of fabricating a SiC substrate according to a second preferred embodiment of the present invention.
  • FIGS. 7A to 7 C are each a sectional view to explain a method of fabricating a SiC substrate according to third preferred embodiment of the present invention.
  • FIG. 8 is a graph showing the relationship between the etched amount by reactive etching and the flatness of a substrate.
  • a work-affected layer formed on a SiC substrate by mechanical flattening or cutting is removed by a vapor phase etching process.
  • a reactive gas in the vapor phase etching process.
  • an ion etching process using a reactive gas or reactive ion etching (RIE) can be used in preferred embodiments of the present invention and it is more preferable to use reactive ion etching having high chemical reactivity.
  • a SiC substrate can be etched or lapped at a practical etching rate by vapor phase etching, preferably, by reactive ion etching using a gas including fluorine.
  • the idea of lapping a SiC substrate, which is not a thin film, by vapor phase etching on the order of several microns has not been proposed or performed in the field of the manufacturing of semiconductor devices.
  • one of the unique characteristics of the present invention is in removing a work-affected layer formed on a surface that is opposite to a surface on which a semiconductor element is to be formed by vapor phase etching.
  • the work-affected layer can be etched almost uniformly from the surface and the warp of the SiC substrate is eliminated in association with the removal of the work-affected layer. Therefore, it is possible to manufacture a SiC substrate that has excellent parallelism and TTV (total thickness variation) of the substrate.
  • the warp of a SiC substrate having a diameter of not more than about 4 inches can be reduced to within about ⁇ 50 ⁇ m. No SiC substrate having such a small warp has been obtained by conventional manufacturing methods.
  • a principal surface from which a work-affected layer is to be removed is a surface that is opposite to a surface which is to be mirror polished and on which a semiconductor element is to be formed.
  • a principal surface from which a work-affected layer is to be removed is a surface which can be further subjected to mirror polishing after the removal of the work-affected layer by reactive ion etching.
  • a SiC substrate 1 used in preferred embodiments of the present invention is preferably a cut piece which is cut from an ingot 2 of SiC.
  • the ingot 2 of SiC may be single crystal, polycrystal or amorphous.
  • the ingot 2 of SiC may include additional elements such as Al, Zr, Y and O other than Si and C or substituent elements.
  • a SiC substrate includes a SiC substrate including SiC which may include additive elements or constituent elements.
  • the shape of the SiC substrate 1 is not especially limited and SiC Substrates of various sizes, thicknesses and plane shapes can be used.
  • a SiC substrate 1 consisting of a single crystal is used as a substrate for the epitaxial growth of a GaN-base semiconductor layer
  • a disk-shaped SiC substrate 1 having a diameter of about 2 inches and a thickness of about 500 ⁇ m is preferably prepared.
  • a cutting blade which is an outside peripheral cutting edge or an inside peripheral cutting edge, a wire saw, or other suitable device.
  • the SiC substrate 1 cut by such cutting includes, as shown in FIG. 2, work-affected layers 3 a , 3 b in the vicinity of a first principal surface 1 a and a second principal surface 1 b formed by cutting.
  • cutting refers to the cutting by the cutting blade of the outside peripheral cutting edge or the inside peripheral cutting edge, the cutting by the wire saw described above, or other suitable cutting apparatus.
  • the compressive stresses acting on the work-affected layer 3 a and the work-affected layer 3 b become equal, with the result that scarcely any warp occurs in the SiC substrate 1 cut from the ingot 2 of SiC as a whole.
  • the thickness of the work-affected layers 3 a , 3 b depends on cutting conditions, such as a cutting method, and the properties of a substrate, it is said that generally this thickness is about 3 to about 10 times the maximum surface roughness Rmax of a surface formed by cutting.
  • a SiC substrate used in various preferred embodiments of the present invention may be obtained by thinning a SiC sheet, which is formed by sintering.
  • a SiC sheet 4 formed by sintering is prepared and subjected to mechanical flattening by polishing at least either of the first principal surface 4 a and the second principal surface 4 b by use of a lapping device or other suitable device.
  • the SiC substrate 4 ′ shown in FIG. 3B is obtained.
  • the SiC substrate 4 ′ In the SiC substrate 4 ′, only its second principal surface 4 ′ b is formed by mechanical polishing and a work-affected layer 3 b is formed by mechanical polishing in the vicinity of the surface of the second principal surface 4 ′ b . Because the first principal surface 4 a is a surface of the SiC sheet 4 formed by sintering, no work-affected layer 3 b is formed on the first principal surface 4 a . For this reason, in the SiC substrate 4 ′, the second principal surface 4 ′ b is warped to provide a convex state under compressive stresses due to the work-affected layer 3 b.
  • mechanical flattening refers to polishing by a lapping device by use of an abrasive, polishing by a vertical grinder, or other suitable apparatus.
  • a work-affected layer is present in the vicinity of the surface of a principal surface of a substrate, the work-affected layer is removed by polishing the substrate by mechanical flattening.
  • work strains are always generated in a region near the surface of a principal surface of the substrate and a new work-affected layer is formed.
  • a work-affected layer is always present on a principal surface of the substrate subjected to mechanical flattening.
  • the thickness of this work-affected layer depends on the maximum surface roughness Rmax of the surface.
  • a surface polished by mechanical flattening has a surface roughness Ra of about 10 nm to about 1 ⁇ m.
  • the SiC substrate 4 ′ in which the work-affected layers 3 a , 3 b are formed on the first principal surface 4 ′ a and the second principal surface 4 ′ b is obtained.
  • the thickness of the work-affected layer 3 b depends on the maximum surface roughness Rmax of the first principal surface 4 ′ a and the second principal surface 4 ′ b .
  • the thickness of the work-affected layer 3 a and work-affected layer 3 b becomes almost equal.
  • Generated compressive stresses are almost equal on the side of the first principal surface 4 ′ a and the side of the second principal surface 4 ′ b , and scarcely any warp occurs in the SiC substrate 4 ′ shown in FIG. 3C.
  • a reactive ion etching device used in the semiconductor manufacturing process, such as a parallel flat plate type reactive ion etching device, an ECR (Electron Cyclotron Resonance) reactive ion etching device and an ICP (Inductively Coupled Plasma) etching device can be used as the device used in the reactive ion etching process. It is desirable to use a gas including F in etching. Although it is possible to use F 2 , CF 4 , CHF 3 , CH 2 F 2 , CH 3 F, SF 6 , etc., it is more preferred to use CF 4 or SF 6 . A mixed gas obtained by adding other gasses such as Ar, H 2 , O 2 and N 2 to a gas including F may be used.
  • the SiC substrate 1 is held in a substrate holder in such a manner that the work-affected layer 3 to be removed is exposed within a chamber of a reactive ion etching device. At this time, it is preferred that the whole of the SiC substrate 1 is not bonded and fixed to the substrate holder so that the substrate holder can hold the SiC substrate 1 by allowing a change in the warp even when the warp of the SiC substrate 1 changes during etching.
  • the magnitude of power to be input, the gas pressure during a reaction and the flow rate of a reactant gas depend on the type of a device to be used, the crystallization state of a SiC substrate to be etched and the number of SiC substrates to be introduced at a time. It is preferable to adjust these parameters so that the etching rate for the removal of a work-affected layer becomes about 0.5 ⁇ m/hr to about 20 ⁇ m/hr. When the etching rate is lower than about 0.5 ⁇ m/hr, the etching efficiency is low and there is a problem in the process capability. In a general reactive etching device, it is difficult to increase the etching rate to rates higher than about 20 ⁇ m/hr. Practically, it is more preferred to cut a work-affected layer at an etching rate of about 1 ⁇ m/hr to about 5 ⁇ m/hr.
  • a work-affected layer of the SiC substrate 1 reacts chemically with the chemical species in an etching gas and becomes a gas, which is removed.
  • a work-affected layer is removed with the surface condition that exists before etching being kept as it is. Therefore, the surface roughness of the substrate surface is substantially maintained before and after the reactive ion etching.
  • the removal of a work-affected layer by the reactive ion etching process proceeds by the contact of the surface of the work-affected layer with an etching gas, it proceeds substantially uniformly from the surface of the work-affected layer even when the SiC substrate 1 is warped and hence the thickness of the work-affected layer decreases uniformly as a whole. Stresses by work-affected layer decrease with decreasing thickness of the work-affected layer and the warp of the SiC substrate 1 is eliminated. When the SiC substrate 1 is flat before the removal of a work-affected layer due to the balance of stresses, the balance of stresses is lost by the removal of the work-affected layer and, therefore, conversely a warp occurs. Because at this time, the SiC substrate 1 is not bonded to the substrate holder of the reactive ion etching device, the SiC substrate 1 can be held according to a change in the warp.
  • preferred embodiments of the present invention provide a unique advantage in that a work-affected layer is removed by reactive ion etching. And by combining the step of removing a work-affected layer by reactive ion etching with the step of polishing a SiC substrate, a SiC substrate having characteristics which previously have been incapable of being obtained can be fabricated.
  • the above-described mechanical flattening and mirror polishing can be used.
  • mirror polishing it is possible to use chemical mechanical polishing (CMP) which is accompanied by chemical etching.
  • CMP chemical mechanical polishing
  • Chemical mechanical polishing can remove a surface region of the substrate and reduce the surface roughness of the surface, with scarcely any new work strains being generated. For this reason, unlike mechanical flattening, a new work-affected layer is scarcely formed during chemical mechanical polishing and the thickness of a work-affected layer is very small even if it is formed. Therefore, the effect of compressive stresses by a work-affected layer are almost negligible.
  • a surface subjected to chemical mechanical polishing becomes a mirror surface.
  • a surface finished to a mirror state has a surface roughness Ra of not more than about 1 nm.
  • generally colloidal silica is used in chemical mechanical polishing, other materials for chemical mechanical polishing may be used.
  • a SiC substrate 1 is prepared. As described by referring to FIGS. 1 and 2, the SiC substrate 1 is cut from an ingot 2 of SiC by cutting by use of a wire saw or other suitable cutting apparatus. Work-affected layers 3 a and 3 b are formed on a first primary surface 1 a and a second primary surface 1 b of the SiC substrate 1 , respectively, by cutting.
  • the first primary surface 1 a and the second primary surface 1 b are polished by use of an appropriate abrasive or lapping device so that the first primary surface 1 a and the second primary surface 1 b of the SiC substrate 1 obtain surface roughnesses that are smaller than the surface roughness obtained by cutting.
  • an appropriate abrasive or lapping device so that the first primary surface 1 a and the second primary surface 1 b of the SiC substrate 1 obtain surface roughnesses that are smaller than the surface roughness obtained by cutting.
  • FIG. 4B a portion of the work-affected layers 3 a , 3 b of the first primary surface 1 a and the second primary surface 1 b is removed.
  • the second principal surface 1 b is a surface on which a semiconductor layer or other layers are to be formed later and a semiconductor element is to be formed.
  • a second principal surface 11 b finished to a mirror-polished state is formed. Because on the side of the first principal surface 1 a the work-affected layer 3 a remains as it is, the SiC substrate 1 is warped as a whole so that the first principal surface 1 a becomes concave.
  • the work-affected layer 3 a remaining on a surface that is opposite to a surface on which a semiconductor element is to be formed is removed by reactive etching.
  • Reactive etching is performed with the SiC substrate 1 held on a substrate holder within a reactive etching device so that the second principal surface 11 b faces downward, whereby the work-affected layer 3 a is completely removed. Because at this time the second principal surface 11 b is in contact with the substrate holder, the second principal surface 11 b is not etched in the least.
  • the warp of the SiC substrate 1 comes to be eliminated as the above-described work-affected layer 3 a is uniformly removed as a whole, and the work-affected layer 3 a is completely removed. Then, as shown in FIG. 4D, a substantially flat SiC substrate 11 with less warp is obtained.
  • the surface roughness of the first principal surface is maintained before and after etching. For this reason, a first principal surface 11 a which is formed after the removal of the work-affected layer 3 a has a surface roughness of the same degree as the surface roughness by mechanical flattening.
  • the first principal surface of the SiC substrate 11 has a surface roughness of a degree that can be obtained by mechanical flattening. More specifically, the surface roughness Ra of the first principal surface 11 a is about 10 nm to about 1 ⁇ m.
  • the second principal surface 11 b is finished to a mirror-polished state and has surface roughness Ra of not more than about 1 nm.
  • the flatness of the whole SiC substrate is within about ⁇ 20 ⁇ m in the case of a substrate having a diameter of about 2 inches.
  • the first principal surface is subjected to mechanical flattening, the first principal surface may be kept in an as-cut state depending on the application of the substrate.
  • a substrate in which only one surface is mirror finished in this manner has the advantage that, for example, in semiconductor manufacturing equipment, the identification of the front surface and back surface of a substrate can be easily performed and the advantage that because light scatters on a surface which is not mirror finished and hence light is not transmitted by this surface, exposure can be performed by use of an exposure device even when the substrate material is transparent to a light source.
  • the etching of a work-affected layer 3 a is performed by holding a SiC substrate 1 so that a second primary surface 11 b , which is the surface on which a semiconductor element is to be formed, is opposed to a substrate holder 20 of the reactive etching device.
  • the substrate holder 20 may be etched and a contaminant 20 ′, such as substances composing the etched substrate holder 20 , may adhere to an area near an outer periphery 11 e of the second primary surface 11 b of the SiC substrate 1 .
  • a contaminant 20 ′ such as substances composing the etched substrate holder 20
  • the second primary surface 11 b is the surface on which a semiconductor element is to be formed, it is undesirable that such a contaminant 20 ′ should adhere to an area near the outer periphery 11 e of the second primary surface 11 b.
  • the first principal surface 11 a has surface roughness of such an extent that can be obtained by mechanical flattening
  • the first principal surface 11 a may also be mirror finished by further performing chemical physical polishing.
  • the polishing time can be shortened compared to a case where polishing is performed by use of conventional techniques. Because no warp occurs in the SiC substrate 11 , there is no fear of worsening of the parallelism and a warp of the SiC substrate 11 by mirror finishing.
  • the step of performing reactive etching be performed after the mirror finishing of the second principal surface 11 b .
  • first the work-affected layer 3 a may be removed by reactive etching.
  • a SiC substrate 1 is prepared as shown in FIG. 6A.
  • Work-affected layers 3 a and 3 b are formed on a first primary surface 1 a and a second primary surface 1 b of the SiC substrate 1 , respectively, by cutting or mechanical flattening.
  • the work-affected layers 3 a and 3 b present on the first primary surface 1 a and the second primary surface 1 b are completely removed by reactive etching.
  • reactive etching is performed, whereby the work-affected layer 3 a is completely removed.
  • the work-affected layer 3 a is uniformly etched as a whole by reactive etching.
  • the second principal surface 1 ′ b is subjected to chemical mechanical polishing and finished to a mirror state.
  • a SiC substrate 11 having a mirror-like second principal surface 11 b is obtained. Because there is no remaining work-affected layer, no warp occurs in the SiC substrate 11 and in the case of a substrate having a diameter of about 2 inches, the flatness is within about ⁇ 20 ⁇ m.
  • the surface roughness of the first principal surface 1 a may be reduced by performing the chemical mechanical polishing of the first principal surface 1 ′ a .
  • the first principal surface 1 ′ a has a surface roughness which is large enough to be obtained by cutting or mechanical flattening, there is no work-affected layer. For this reason, the surface roughness of the first principal surface 1 a can be adjusted by performing chemical mechanical polishing which does not form a new work-affected layer for an arbitrary time.
  • a SiC substrate 1 is prepared (FIG. 7A) by following a procedure similar to that of the second preferred embodiment, and work-affected layers 3 a and 3 b are removed by reactive etching. As a result of this, as shown in FIG. 7B, a SiC substrate 1 ′ which is substantially flat and has no work-affected layer is prepared. A first principal surface 1 a and a second principal surface 1 ′ b of the SiC substrate 1 ′ have a surface roughness of such an extent that can be obtained by cutting.
  • a lapping device in which a bottom surface plate has a concave curved surface and a top surface plate has a convex curved surface, with the SiC substrate 1 ′ held so that the second principal surface 1 ′ b comes into contact with the bottom surface plate, the first principal surface 1 ′ a and the second principal surface 1 ′ b are simultaneously subjected to chemical mechanical polishing.
  • a SiC substrate 12 has a second principal surface 12 b that has convexity and a first principal surface 12 a that has concavity. That is, the obtained SiC substrate 12 is curved in such a manner that the second principal surface 12 b which is mirror finished is convex.
  • a substrate which has a mirror finished convex surface and the surface that is opposite to this convex surface is flat like a satin finished surface, a substrate in which the front and back surfaces have a substantially parallel curved shape, a substrate in which the two surfaces are concave surfaces, etc.
  • the work-affected layer 3 a was etched by reactive ion etching from the side of the first principal surface 1 a and the relationship between the etched amount and the parallelism of the SiC substrate 1 was investigated.
  • the second principal surface 11 b of the SiC single crystal substrate 1 having a diameter of about 2 inches is mirror finished and its surface roughness Ra is not more than about 0.3 nm.
  • the first principal surface 11 a is worked to provide a satin finished surface and its surface roughness Ra is not more than about 0.3 ⁇ m.
  • a parallel flat plate type reactive ion etching device is used for etching and the input power during etching is about 1.0 W/cm 2 .
  • Etching was performed by introducing CF 4 as a reactive gas into a chamber at a flow rate of about 100 sccm and keeping the degree of vacuum at about 2.0 ⁇ 10 ⁇ 3 torr. Parallelism was measured on the side of the second primary surface 11 b.
  • FIG. 8 is a graph showing the relationship between the etched amount and the parallelism of the substrate. As shown in FIG. 8, the flatness of the SiC substrate is about ⁇ 100 ⁇ m before etching (the etched amount: 0 ⁇ m). This shows that as shown in FIG. 4C, the SiC substrate 1 is warped so that the second principal surface 11 b becomes concave.
  • the step of removing a work-affected layer by reactive ion etching, the step of mechanical flattening and the step of mirror polishing may be performed for one surface or both surfaces of the SiC substrate in orders other than those shown in the above-described preferred embodiments.
  • a work-affected layer formed on a SiC substrate can be easily removed at a practical etching rate. Therefore, a flat SiC substrate can be easily manufactured. Furthermore, because a work-affected layer can be removed with scarcely any change in the surface roughness of a worked surface, it is also possible to manufacture a substrate in which only one surface is mirror finished. It is possible to use an obtained SiC substrate in a preferable manner as a substrate for forming semiconductor layers, such as high-quality GaN-base semiconductor layers, SiC semiconductor layers, and as a dummy wafer used in the semiconductor manufacturing process.

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