TWI568003B - Solar cell, method for manufacturing the same and solar cell module - Google Patents
Solar cell, method for manufacturing the same and solar cell module Download PDFInfo
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- TWI568003B TWI568003B TW101148367A TW101148367A TWI568003B TW I568003 B TWI568003 B TW I568003B TW 101148367 A TW101148367 A TW 101148367A TW 101148367 A TW101148367 A TW 101148367A TW I568003 B TWI568003 B TW I568003B
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- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 238000000034 method Methods 0.000 title description 30
- 239000000758 substrate Substances 0.000 claims description 37
- 238000002161 passivation Methods 0.000 claims description 24
- 239000000463 material Substances 0.000 claims description 20
- 238000005530 etching Methods 0.000 claims description 16
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 claims description 15
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 13
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 6
- 229910017604 nitric acid Inorganic materials 0.000 claims description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 5
- 230000007547 defect Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 229910000420 cerium oxide Inorganic materials 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- VQCBHWLJZDBHOS-UHFFFAOYSA-N erbium(iii) oxide Chemical compound O=[Er]O[Er]=O VQCBHWLJZDBHOS-UHFFFAOYSA-N 0.000 description 2
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 2
- 238000007788 roughening Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 125000000896 monocarboxylic acid group Chemical group 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- RUDFQVOCFDJEEF-UHFFFAOYSA-N yttrium(III) oxide Inorganic materials [O-2].[O-2].[O-2].[Y+3].[Y+3] RUDFQVOCFDJEEF-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/048—Encapsulation of modules
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Description
本發明是有關於一種光電轉換裝置，且特別是有關於一種太陽能電池。 The present invention relates to a photoelectric conversion device, and more particularly to a solar cell.
為了提升太陽能電池的效率，在目前的太陽能電池製作過程中，一種技術係在太陽能電池之受光面上進行粗化處理，藉以在受光面上形成許許多多的粗糙結構，來增進太陽能電池之受光面對於入射光的吸收效率。 In order to improve the efficiency of solar cells, in the current solar cell manufacturing process, a technique is used to roughen the light-receiving surface of a solar cell, thereby forming a plurality of rough structures on the light-receiving surface to enhance the light-receiving of the solar cell. The absorption efficiency of the incident light.
此外，為了增進太陽能電池之載子效率，通常會在受光面的粗糙結構形成後，再於受光面上覆蓋或成長氧化物等類型之鈍化層。然而，因為粗糙結構的凹凸不平，會導致鈍化層無法均勻地覆蓋在受光面上，例如在粗糙結構的頂部尖端或兩個表面相接的菱線上，皆會有覆蓋不易之問題，容易造成鈍化效果不佳。再加上，這些粗糙結構之頂部、或相鄰二粗糙結構之接合處會產生局部應力，例如在粗糙結構之頂部會產生反向壓縮應力。如此將使得鈍化層無法有效且全面性地鈍化受光面上之粗糙結構的所有表面，而嚴重影響太陽能電池之載子效率。 Further, in order to improve the carrier efficiency of the solar cell, a passivation layer of an oxide or the like is usually covered or grown on the light receiving surface after the rough structure of the light receiving surface is formed. However, because the roughness of the rough structure is uneven, the passivation layer cannot be uniformly covered on the light receiving surface, for example, at the top tip of the rough structure or the diamond line where the two surfaces meet, there is a problem that the covering is not easy, and the passivation is easily caused. not effectively. In addition, the top of these rough structures, or the joints of adjacent two rough structures, may generate local stresses, such as reverse compression stresses at the top of the rough structure. This will make it impossible for the passivation layer to effectively and completely passivate all surfaces of the roughness on the light-receiving surface, which seriously affects the carrier efficiency of the solar cell.
因此，本發明之一態樣就是在提供一種太陽能電池及其製造方法與太陽能電池模組，其可有效且全面性地鈍化太陽能電池之受光面。 Accordingly, an aspect of the present invention provides a solar cell, a method of fabricating the same, and a solar cell module that can effectively and comprehensively passivate a light receiving surface of a solar cell.
本發明之另一態樣是在提供一種太陽能電池及其製造方法與太陽能電池模組，其可使載子在摻雜層中的行進更 為順暢，而可提高載子的生命週期，進而可提升太陽能電池的開路電壓(Voc)。 Another aspect of the present invention is to provide a solar cell, a method of fabricating the same, and a solar cell module, which can make the carrier travel in the doped layer more For smoothness, the life cycle of the carrier can be increased, thereby increasing the open circuit voltage (Voc) of the solar cell.
根據本發明之上述目的，提出一種太陽能電池。此太陽能電池包含一基板、複數個粗糙結構、一第一層、一鈍化層以及一電極。基板包括一第一面。複數個粗糙結構配置於第一面上，其中各粗糙結構具有複數個表面，這些表面相互連接並共同具有一頂部，且每一粗糙結構的這些表面彼此之間的複數個連接處及前述頂部為弧形。第一層具有第一導電型，且位於第一面上。此第一層沿各粗糙結構的複數個表面及前述頂部延伸配置，且此第一層在各頂部處的摻雜深度小於或等於在這些表面處的摻雜深度。鈍化層位於第一面上方之第一層上。電極位於第一面上，且穿過鈍化層並與第一層接觸。 According to the above object of the present invention, a solar cell is proposed. The solar cell comprises a substrate, a plurality of roughness structures, a first layer, a passivation layer, and an electrode. The substrate includes a first side. a plurality of rough structures disposed on the first surface, wherein each of the rough structures has a plurality of surfaces that are connected to each other and have a top portion, and the plurality of joints of the surfaces of each of the rough structures and the top portion are arc. The first layer has a first conductivity type and is located on the first side. The first layer is disposed along a plurality of surfaces of the respective roughness structures and the top portion, and the doping depth of the first layer at each top is less than or equal to the doping depth at the surfaces. The passivation layer is on the first layer above the first side. The electrode is on the first side and passes through the passivation layer and is in contact with the first layer.
依據本發明之一實施例，上述之複數個粗糙結構中的任二相鄰之粗糙結構的相鄰表面之間的另一連接處為弧形。 According to an embodiment of the invention, the other junction between adjacent surfaces of any two adjacent coarse structures of the plurality of rough structures is curved.
依據本發明之另一實施例，上述之基板為第一導電型或第二導電型之基板。 According to another embodiment of the present invention, the substrate is a substrate of a first conductivity type or a second conductivity type.
依據本發明之又一實施例，垂直上述基板之第一面的基板材料的晶格方向為100方向，垂直各粗糙結構的複數個表面的基板材料的晶格方向為111方向。 According to still another embodiment of the present invention, a lattice direction of the substrate material perpendicular to the first surface of the substrate is 100 directions, and a lattice direction of the substrate material of the plurality of surfaces perpendicular to each of the rough structures is 111 directions.
依據本發明之再一實施例，上述之複數個連接處的摻雜深度小於或等於在各粗糙結構的複數個表面處的摻雜深度。 According to still another embodiment of the present invention, the doping depth of the plurality of junctions is less than or equal to the doping depth at a plurality of surfaces of each of the roughness structures.
根據本發明之上述目的，另提出一種太陽能電池模 組。此太陽能電池模組包含一上板、一下板、一如上述之太陽能電池以及至少一個封裝材料層。前述之太陽能電池設於上板與下板之間。前述之封裝材料層位於上板與下板之間，將太陽能電池與上板和下板結合。 According to the above object of the present invention, another solar battery module is proposed group. The solar cell module includes an upper plate, a lower plate, a solar cell as described above, and at least one layer of encapsulating material. The aforementioned solar cell is disposed between the upper plate and the lower plate. The aforementioned encapsulating material layer is located between the upper plate and the lower plate, and the solar cell is combined with the upper plate and the lower plate.
根據本發明之上述目的，亦提出一種太陽能電池之製造方法，包含下列步驟。提供一基板，其中此基板包括一第一面。進行一粗化製程，使基板的第一面形成複數個粗糙結構，其中各粗糙結構具有複數個表面以及一頂部，且這些表面相互連接並共同具有前述頂部。進行一摻雜製程，使第一面上形成具有第一導電型之一第一層，其中此第一層沿各粗糙結構的複數個表面及頂部延伸配置。進行一蝕刻製程，使各粗糙結構之複數個表面之間的複數個連接處及頂部形成弧形，其中透過此蝕刻製程，使第一層在各頂部處的摻雜深度小於或等於在這些表面處的摻雜深度。形成一鈍化層於第一面上方之第一層上。形成一電極於第一面上，其中電極穿過鈍化層與第一層接觸。 According to the above object of the present invention, a method of manufacturing a solar cell is also provided, comprising the following steps. A substrate is provided, wherein the substrate includes a first side. A roughening process is performed to form a plurality of rough structures on the first side of the substrate, wherein each of the rough structures has a plurality of surfaces and a top portion, and the surfaces are connected to each other and have the aforementioned top portion. A doping process is performed to form a first layer having a first conductivity type on the first surface, wherein the first layer is disposed along a plurality of surfaces and top portions of each of the roughness structures. Performing an etching process to form a plurality of junctions and top portions between the plurality of surfaces of each of the rough structures, wherein the doping depth of the first layer at each of the top portions is less than or equal to the surface through the etching process The doping depth at the location. A passivation layer is formed on the first layer above the first side. An electrode is formed on the first side, wherein the electrode is in contact with the first layer through the passivation layer.
依據本發明之一實施例，透過上述蝕刻製程使複數個粗糙結構中的任二相鄰之粗糙結構的相鄰表面之間的另一連接處形成弧形。 According to an embodiment of the present invention, another connection between adjacent surfaces of any two adjacent rough structures of the plurality of rough structures is curved through the etching process.
依據本發明之另一實施例，上述之基板為第一導電型或第二導電型之基板。 According to another embodiment of the present invention, the substrate is a substrate of a first conductivity type or a second conductivity type.
依據本發明之又一實施例，透過上述蝕刻製程使複數個表面之間的複數個連接處的摻雜深度小於或等於在各粗糙結構之複數個表面處的摻雜深度。 According to still another embodiment of the present invention, the doping depth of the plurality of junctions between the plurality of surfaces is less than or equal to the doping depth at the plurality of surfaces of the respective roughness structures through the etching process.
依據本發明之再一實施例，上述之蝕刻製程所使用之 一蝕刻液包含硝酸(HNO3)、氫氟酸(HF)、醋酸(CH3COOH)以及水。 According to still another embodiment of the present invention, one of the etching solutions used in the etching process comprises nitric acid (HNO 3 ), hydrofluoric acid (HF), acetic acid (CH 3 COOH), and water.
請參照第1圖，其係繪示依照本發明之一實施方式的一種太陽能電池模組的剖面示意圖。在本實施方式中，太陽能電池模組100主要包含一上板104、一下板106、一太陽能電池102、以及一個或多個封裝材料層，例如封裝材料層108與110，實施上可採用EVA材質。 Please refer to FIG. 1 , which is a cross-sectional view showing a solar cell module according to an embodiment of the present invention. In the present embodiment, the solar cell module 100 mainly includes an upper plate 104, a lower plate 106, a solar cell 102, and one or more layers of encapsulating material, such as encapsulation material layers 108 and 110, which may be made of EVA material. .
如第1圖所示，在太陽能電池模組100中，太陽能電池102設於下板106上，且設於上板104之下。因此，上板104設於下板106之上，且太陽能電池102設於下板106與上板104之間。另外，二層封裝材料層108與110則分別設置在上板104與太陽能電池102、以及下板106與太陽能電池102之間。藉由高溫壓合的程序，封裝材料層108和110於熔融態時可將太陽能電池102與下板106和上板104結合。 As shown in FIG. 1, in the solar cell module 100, the solar cell 102 is disposed on the lower plate 106 and disposed under the upper plate 104. Therefore, the upper plate 104 is disposed above the lower plate 106, and the solar cell 102 is disposed between the lower plate 106 and the upper plate 104. In addition, the two layers of encapsulation material layers 108 and 110 are disposed between the upper plate 104 and the solar cell 102, and the lower plate 106 and the solar cell 102, respectively. The solar cell 102 can be bonded to the lower plate 106 and the upper plate 104 when the encapsulating material layers 108 and 110 are in the molten state by a high temperature press-fitting procedure.
請參照第2圖至第5圖，其係繪示依照本發明之一實施方式的一種太陽能電池的製程剖面圖。在本實施方式中，製作如第5圖所示之太陽能電池102時，可先提供基板112。基板112之材料可例如為矽等半導體材料。如第2圖所示，基板112包含第一面114，於本實施例中即為基板112之正面。基板112可為第一導電型或第二導電型基板，其中第一導電型可例如為p型，而第二導電型可為n型。接著，可對基板112進行粗化製程，藉以在基板112之第一面114上形成複數個粗糙結構116。 Please refer to FIG. 2 to FIG. 5 , which are schematic cross-sectional views showing a process of a solar cell according to an embodiment of the present invention. In the present embodiment, when the solar cell 102 shown in Fig. 5 is produced, the substrate 112 can be provided first. The material of the substrate 112 may be, for example, a semiconductor material such as germanium. As shown in FIG. 2, the substrate 112 includes a first surface 114, which is the front side of the substrate 112 in this embodiment. The substrate 112 may be a first conductivity type or a second conductivity type substrate, wherein the first conductivity type may be, for example, a p-type, and the second conductivity type may be an n-type. Next, the substrate 112 may be subjected to a roughening process to form a plurality of roughness structures 116 on the first side 114 of the substrate 112.
請一併參照第2圖與第6圖，每一粗糙結構116可具有複數個表面118。而且，在每一粗糙結構116中，這些表面118彼此互相連接而對應形成多個連接處138，且共同具有一頂部120。在一實施例中，每一粗糙結構116可為金字塔型結構，即四角錐狀結構。因此，這些粗糙結構116均具有四個表面118。在其他實施例中，太陽能電池之粗糙結構可為其他多邊形錐狀結構。 Referring to Figures 2 and 6, together, each of the roughness structures 116 can have a plurality of surfaces 118. Moreover, in each of the roughness structures 116, the surfaces 118 are interconnected to each other to form a plurality of joints 138, and together have a top portion 120. In an embodiment, each of the roughness structures 116 may be a pyramidal structure, ie, a quadrangular pyramidal structure. Therefore, these roughness structures 116 each have four surfaces 118. In other embodiments, the rough structure of the solar cell can be other polygonal pyramidal structures.
此外，任二相鄰之粗糙結構116的相鄰表面118，即一粗糙結構116之一表面118與相鄰之另一粗糙結構116之相鄰表面118互相連接而形成連接處122。在一實施例中，垂直基板112之第一面114的基板112之材料的晶格方向為100方向，而垂直各粗糙結構116之各表面118的基板122之材料的晶格方向為111方向。 In addition, adjacent surfaces 118 of any two adjacent roughness structures 116, i.e., one surface 118 of one of the roughness structures 116, are interconnected with adjacent surfaces 118 of another adjacent roughness structure 116 to form a joint 122. In one embodiment, the orientation of the material of the substrate 112 of the first side 114 of the vertical substrate 112 is 100 directions, and the orientation of the material of the substrate 122 of each surface 118 of each of the vertical structures 116 is 111.
接下來，請再次參照第2圖，對基板112進行摻雜製程，藉以使基板112之第一面114形成具有第一導電型的第一層124。此第一層124延伸配置於每個粗糙結構116的所有表面118與頂部120。在一實施例中，第一層124所具有的第一導電型可為p型，且摻雜製程所採用之摻質可例如為硼。或是採用磷摻雜而得n型即本發明所謂之第二導電型。一般而言，因摻雜製程之特性的緣故，第一層124表面的摻質濃度較高。此外，因結構形狀的關係，在粗糙結構116之頂部120、連接處138(請先參照第6圖)以及在二相鄰粗糙結構116之相鄰表面118之間的連接處122的谷底等處可能會有局部應力產生，因此摻雜製程在粗糙結構116之頂部120、連接處138與連接處122所形成之 摻雜深度較大，亦即摻雜濃度較大。 Next, referring again to FIG. 2, the substrate 112 is doped so that the first surface 114 of the substrate 112 forms the first layer 124 having the first conductivity type. This first layer 124 extends over all of the surface 118 and top 120 of each of the roughness structures 116. In an embodiment, the first conductivity type of the first layer 124 may be p-type, and the dopant used in the doping process may be, for example, boron. Alternatively, the n-type is obtained by doping with phosphorus, that is, the so-called second conductivity type of the present invention. In general, the dopant concentration on the surface of the first layer 124 is higher due to the characteristics of the doping process. Further, due to the shape of the structure, at the top 120 of the roughness 116, the joint 138 (please refer to FIG. 6 first), and the valley of the joint 122 between the adjacent surfaces 118 of the two adjacent roughness 116, etc. There may be localized stresses, so the doping process is formed at the top 120 of the roughness 116, the junction 138, and the junction 122. The doping depth is large, that is, the doping concentration is large.
接著，對基板112之第一面114的粗糙結構116進行導圓(rounding)處理。在一實施例中，如第3圖所示，可利用蝕刻製程來進行粗糙結構116的導圓處理，以使每個粗糙結構116的所有表面118之間所形成之連接處138與頂部120形成弧形。在另一實施例中，蝕刻製程也會在任二相鄰之粗糙結構116的相鄰表面118互相連接所形成之連接處122產生導圓效果，而使連接處112呈弧形。 Next, the rough structure 116 of the first surface 114 of the substrate 112 is rounded. In one embodiment, as shown in FIG. 3, the etching process can be utilized to perform the rounding process of the roughness 116 such that the junctions 138 and the top 120 formed between all of the surfaces 118 of each of the roughness structures 116 are formed. arc. In another embodiment, the etch process also produces a rounding effect at the junction 122 formed by the interconnection of adjacent surfaces 118 of any two adjacent roughness structures 116, leaving the junction 112 curved.
在一實施例中，此蝕刻製程所使用之蝕刻液可例如包含硝酸、氫氟酸、醋酸以及水。在此實施例中，硝酸可與粗糙結構116之表面118、連接處138、連接處122以及頂部120等處的矽反應而形成氧化矽，而氫氟酸可將生成在粗糙結構116之表面118上的氧化矽蝕刻掉。在粗糙結構116之表面118上所重複進行之氧化矽生成與氧化矽蝕刻的過程，可使得粗糙結構116之表面118的連接處138、粗糙結構116的頂部120、以及任二相鄰之粗糙結構116的相鄰表面118之間的連接處122形成弧形。 In an embodiment, the etching solution used in the etching process may include, for example, nitric acid, hydrofluoric acid, acetic acid, and water. In this embodiment, nitric acid may react with the ruthenium at the surface 118 of the roughness 116, the junction 138, the junction 122, and the top 120 to form yttrium oxide, and hydrofluoric acid may be formed on the surface 118 of the roughness 116. The ruthenium oxide on the etched away. The erbium oxide formation and yttria etch process repeated on the surface 118 of the roughness 116 may result in the junction 138 of the surface 118 of the roughness 116, the top 120 of the roughness 116, and any adjacent roughness. The junction 122 between adjacent surfaces 118 of 116 forms an arc.
在一示範例子中，蝕刻液可包含濃度70%的硝酸、濃度49%的氫氟酸、濃度100%的醋酸與濃度100%的水，且硝酸、氫氟酸、醋酸與水的體積比可為3：6：1：40。 In an exemplary embodiment, the etching solution may include 70% nitric acid, 49% hydrofluoric acid, 100% acetic acid, and 100% water, and the volume ratio of nitric acid, hydrofluoric acid, acetic acid to water may be It is 3:6:1:40.
於本實施方式中，在蝕刻過程中，由於粗糙結構116之表面118的連接處138、粗糙結構116的頂部120、以及任二相鄰之粗糙結構116的相鄰表面118之間的連接處122具有局部應力以及摻雜較深，亦即摻雜濃度較表面118為高的緣故，導致連接處138與122和頂部120處表面的矽 生成氧化矽的速率較快。而由於所生成之氧化矽會遭蝕刻移除，因此連接處138與122和頂部120處的矽消減的量也較表面118為多。 In the present embodiment, during the etching process, the junction 138 between the surface 118 of the roughness 116, the top 120 of the roughness 116, and the junction 122 between the adjacent surfaces 118 of any two adjacent roughness 116 With local stress and deeper doping, i.e., the doping concentration is higher than surface 118, resulting in defects at the surfaces of junctions 138 and 122 and top 120 The rate of formation of cerium oxide is faster. Since the generated cerium oxide is removed by etching, the amount of enthalpy reduction at the junctions 138 and 122 and the top 120 is also greater than the surface 118.
故，請一併參照第3圖、第7A圖與第7B圖，其中第7A圖與第7B圖係分別係繪示依照本發明之一實施方式的一種太陽能電池之粗糙結構的二局部放大圖。如第7A圖之局部區域126的放大圖所示，經導圓處理後，在每一粗糙結構116中，第一層124在頂部120處的摻雜深度130小於或等於在各表面118處的摻雜深度132。此外，如第7B圖之局部區域128的放大圖所示，任二相鄰之粗糙結構116的相鄰表面118之間的連接處122的摻雜深度134、以及第一層124在粗糙結構116之表面118的連接處138的摻雜深度，小於或等於在各表面118處的摻雜深度132。 Therefore, please refer to FIG. 3, FIG. 7A and FIG. 7B together, wherein FIG. 7A and FIG. 7B respectively show two partial enlarged views of a rough structure of a solar cell according to an embodiment of the present invention. . As shown in the enlarged view of the partial region 126 of FIG. 7A, after each of the roughness 116, the doping depth 130 of the first layer 124 at the top 120 is less than or equal to the surface 118 at each surface 118. Doping depth 132. Moreover, as shown in the enlarged view of partial region 128 of FIG. 7B, the doping depth 134 of junction 122 between adjacent surfaces 118 of any two adjacent roughness structures 116, and first layer 124 are in roughness 116. The doping depth of the junction 138 of the surface 118 is less than or equal to the doping depth 132 at each surface 118.
此外，由於粗糙結構116是先經摻雜再經導圓處理，因此導圓處理可將摻雜時在第一層124之表面中所產生之缺陷或所造成之不平整結構磨平，而可有利於後續之鈍化處理的進行。而且，導圓處理時更可將第一層124表面摻雜濃度較高的部分移除，如此可有效提升載子在第一層124中的行進。 In addition, since the roughness 116 is doped and then subjected to a rounding process, the rounding treatment can smooth the defects generated in the surface of the first layer 124 during doping or the uneven structure caused by the doping. Conducive to the subsequent passivation treatment. Moreover, the portion of the first layer 124 having a higher surface doping concentration can be removed during the rounding process, so that the travel of the carrier in the first layer 124 can be effectively improved.
接著，如第4圖所示，於基板112之第一面114上方的第一層124上形成鈍化層136。在一實施例中，鈍化層136之材料可為氧化物、氮化物等材質。鈍化層136可與第一層124表面的懸鍵接合，而可避免這些懸鍵捕抓在第一層124中運行的載子，進而可使載子在第一層124中的行進較為順暢。如此一來，載子在第一層124中的壽命(life time)較長，進而可提升太陽能電池102(請參照第5圖)之開路電壓。 Next, as shown in FIG. 4, a passivation layer 136 is formed on the first layer 124 above the first side 114 of the substrate 112. In an embodiment, the material of the passivation layer 136 may be a material such as an oxide or a nitride. The passivation layer 136 can be bonded to the dangling bonds on the surface of the first layer 124, and the dangling bonds can be prevented from catching the carriers running in the first layer 124, thereby allowing the carriers to travel smoothly in the first layer 124. As a result, the life of the carrier in the first layer 124 (life The time is longer, and the open circuit voltage of the solar cell 102 (refer to FIG. 5) can be increased.
在本實施方式中，由於第一層124之表面已在導圓程序中被磨平，因此鈍化層136可順利蓋在整個第一層124上，同時在粗糙結構116的表面118、頂部120、連接處138等處，也不會因應力問題或尖銳之形狀關係，產生鈍化層136覆蓋性不佳之問題，故可有效避免鈍化層136因覆蓋不完整而產生缺陷。 In the present embodiment, since the surface of the first layer 124 has been smoothed in the rounding procedure, the passivation layer 136 can be smoothly covered over the entire first layer 124 while at the surface 118, the top 120 of the roughness 116, At the joint 138 or the like, the problem of poor coverage of the passivation layer 136 is not caused by the stress problem or the sharp shape relationship, so that the passivation layer 136 can be effectively prevented from being defective due to incomplete coverage.
如第5圖所示，於完成鈍化層136的設置後，可利用例如網印等方式在電極140所欲設置之處印刷上金屬材質之漿料，之後並透過溫度為八~九百度的燒結製程，讓金屬漿料穿透過鈍化層136而與第一層124接觸，藉此完成電極140的設置，從而完成太陽能電池102的製作。 As shown in FIG. 5, after the setting of the passivation layer 136 is completed, a slurry of a metal material can be printed at a place where the electrode 140 is to be mounted by, for example, screen printing, and then passed through a sintering temperature of eight to nine ***. The process allows the metal paste to pass through the passivation layer 136 to contact the first layer 124, thereby completing the arrangement of the electrodes 140, thereby completing the fabrication of the solar cell 102.
由上述之實施方式可知，本發明之一優點就是因為本發明係先對基板之粗糙結構進行摻雜，再進行導圓程序，因此導圓處理可將摻雜程序在延伸設置在粗糙結構上的摻雜層之表面中所產生之缺陷或不平整結構磨平，使得摻雜層之表面更為平整。於是，可順利且全面性地鈍化摻雜層之表面，進而可大幅提升載子的效率。 It can be seen from the above embodiments that one of the advantages of the present invention is that since the present invention first performs doping on the rough structure of the substrate and then performs a circular guiding process, the rounding process can extend the doping process on the rough structure. Defects or irregularities generated in the surface of the doped layer are flattened such that the surface of the doped layer is flatter. Thus, the surface of the doped layer can be passivated smoothly and comprehensively, and the efficiency of the carrier can be greatly improved.
由上述之實施方式可知，本發明之另一優點就是因為本發明在導圓程序時可將摻雜層表面摻雜濃度相對較高的部分移除的更多，亦即對於粗糙結構上較為尖銳之處可有效導圓，增加鈍化層之覆蓋效果，因此可使載子在摻雜層中的行進更為順暢，進而可提高載子的生命週期，達到提升太陽能電池之開路電壓功效。 It can be seen from the above embodiments that another advantage of the present invention is that the present invention can remove more portions of the doping layer having a relatively higher doping concentration during the circular guiding process, that is, sharper for the rough structure. The position can be effectively rounded, and the coverage effect of the passivation layer is increased, so that the carrier can travel more smoothly in the doped layer, thereby improving the life cycle of the carrier and improving the open circuit voltage of the solar cell.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何在此技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 While the present invention has been described above by way of example, it is not intended to be construed as a limitation of the scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.
100‧‧‧太陽能電池模組 100‧‧‧Solar battery module
102‧‧‧太陽能電池 102‧‧‧ solar cells
104‧‧‧上板 104‧‧‧Upper board
106‧‧‧下板 106‧‧‧ Lower board
108‧‧‧封裝材料層 108‧‧‧Package material layer
110‧‧‧封裝材料層 110‧‧‧Package material layer
112‧‧‧基板 112‧‧‧Substrate
114‧‧‧第一面 114‧‧‧ first side
116‧‧‧粗糙結構 116‧‧‧Rough structure
118‧‧‧表面 118‧‧‧ surface
120‧‧‧頂部 120‧‧‧ top
122‧‧‧連接處 122‧‧‧ Connection
124‧‧‧第一層 124‧‧‧ first floor
126‧‧‧局部區域 126‧‧‧Local area
128‧‧‧局部區域 128‧‧‧Local area
130‧‧‧摻雜深度 130‧‧‧Doping depth
132‧‧‧摻雜深度 132‧‧‧Doping depth
134‧‧‧摻雜深度 134‧‧‧Doping depth
136‧‧‧鈍化層 136‧‧‧passivation layer
138‧‧‧連接處 138‧‧‧ Connection
140‧‧‧電極 140‧‧‧electrode
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂，所附圖式之說明如下：第1圖係繪示依照本發明之一實施方式的一種太陽能電池模組的剖面示意圖。 The above and other objects, features, advantages and embodiments of the present invention will become more <RTIgt; Schematic diagram of the section.
第2圖至第5圖係繪示依照本發明之一實施方式的一種太陽能電池的製程剖面圖。 2 to 5 are cross-sectional views showing a process of a solar cell according to an embodiment of the present invention.
第6圖係繪示依照本發明之一實施方式的一種太陽能電池之粗糙結構的立體示意圖。 6 is a perspective view showing a rough structure of a solar cell according to an embodiment of the present invention.
第7A圖係繪示依照本發明之一實施方式的一種太陽能電池之粗糙結構的一局部放大圖。 FIG. 7A is a partially enlarged view showing a rough structure of a solar cell according to an embodiment of the present invention.
第7B圖係繪示依照本發明之一實施方式的一種太陽能電池之粗糙結構的另一局部放大圖。 FIG. 7B is another partial enlarged view of a rough structure of a solar cell according to an embodiment of the present invention.
112‧‧‧基板 112‧‧‧Substrate
114‧‧‧第一面 114‧‧‧ first side
116‧‧‧粗糙結構 116‧‧‧Rough structure
118‧‧‧表面 118‧‧‧ surface
120‧‧‧頂部 120‧‧‧ top
122‧‧‧連接處 122‧‧‧ Connection
124‧‧‧第一層 124‧‧‧ first floor
126‧‧‧局部區域 126‧‧‧Local area
128‧‧‧局部區域 128‧‧‧Local area
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| CN1213187A (en) * | 1997-07-25 | 1999-04-07 | 佳能株式会社 | Photovaltaic device, process for production thereof, and zinc oxide thin film |
| TW200945609A (en) * | 2008-04-21 | 2009-11-01 | Chii-Rong Yang | Solar battery with an anti-reflect surface and the manufacturing method thereof |
| CN101369630A (en) * | 2008-09-26 | 2009-02-18 | 电子科技大学 | Organic opto-electronic device with protection layer and preparation method thereof |
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