KR20100089473A - High efficiency back contact solar cell and method for manufacturing the same - Google Patents

High efficiency back contact solar cell and method for manufacturing the same Download PDF

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Publication number
KR20100089473A
KR20100089473A KR1020090008733A KR20090008733A KR20100089473A KR 20100089473 A KR20100089473 A KR 20100089473A KR 1020090008733 A KR1020090008733 A KR 1020090008733A KR 20090008733 A KR20090008733 A KR 20090008733A KR 20100089473 A KR20100089473 A KR 20100089473A
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South Korea
Prior art keywords
electrode
solar cell
conductivity type
silicon substrate
high efficiency
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KR1020090008733A
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Korean (ko)
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이창재
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(주)제스솔라
이창재
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Priority to KR1020090008733A priority Critical patent/KR20100089473A/en
Publication of KR20100089473A publication Critical patent/KR20100089473A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H01L31/02245—Electrode arrangements specially adapted for back-contact solar cells for metallisation wrap-through [MWT] type solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02366—Special surface textures of the substrate or of a layer on the substrate, e.g. textured ITO/glass substrate or superstrate, textured polymer layer on glass substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Abstract

PURPOSE: A high efficiency back contact solar cell and a method for manufacturing the same are provided to reduce the amount of the recombination of a carrier to improve efficiency by adopting a reach-through collector structure. CONSTITUTION: A silicon substrate(110) comprises a front side and a rear side. A plurality of grooves are formed in the rear side of a silicon substrate. A first conductive doped region(132) is formed in the rear side of the silicon substrate. A second conductive doped region(134) is separated from the first conductive doped region. A first conductive electrode(122) and a second conductive type electrode(124) are connected to each of the second conductive doped region and the first conductive doped region.

Description

High efficiency back electrode solar cell and method of manufacturing the same {High efficiency back contact solar cell and method for manufacturing the same}

The present invention relates to a high efficiency back electrode solar cell and a method for manufacturing the same, and particularly, to a high efficiency back electrode solar cell and a method for manufacturing the same, which can overcome the problems caused by carrier recombination even when using a low-cost wafer of low quality as a substrate. It is about.

A solar cell is a battery that converts solar energy into electrical energy. In general, a solar cell generates electric energy from solar light using a large area, p-n junction diode structure. Such solar cells are typically manufactured using a silicon wafer doped to include one or more n-type doped regions and one or more p-type doped regions. In the production of silicon wafer-based commercial solar cells, a structure referred to as an interdigitated back contact (IBC) cell has recently been proposed and actively studied. Such IBC solar cells comprise a semiconductor wafer such as silicon and alternating lines (interdigitated stripes) of p-type and n-type doping. The structure of this cell has the advantage that all electrical contact to the p-type and n-type regions can be made through the underside of the cell. As described above, a structure in which a cross electrode having a positive electrode and a negative electrode interlocked with each other is present only at a rear surface thereof is disclosed in US Pat. No. 7,339,110.

On the other hand, the biggest concern in the manufacture of solar cells is to lower the manufacturing cost while increasing the conversion efficiency of the solar cell. In order to improve the conversion efficiency of the solar cell, it is important to increase the solar cell absorption rate and reduce the recombination degree of the carriers. Typically, a back electrode structure is employed to increase the absorption of sunlight, and single crystal growth is performed by a high quality wafer having a long carrier lifetime, for example, a float zone (FZ) method, to reduce the degree of recombination of carriers. Adopted wafer is adopted. In the case of such FZ wafers, the carrier lifetime is about 200 to 400 microns, so that a problem of carrier collection does not occur even in a thick film substrate having a thickness of 300 μm or more, but the price of such FZ wafers is high. Has its drawbacks. It is also conceivable to use a low-cost, low-quality substrate such as a CZ (Czochralski) wafer without using such an expensive substrate. However, CZ wafers have many defects that act as recombination centers of carriers such as defects, dislocations, and various impurities (carbon, oxygen, or metal ions). This decreasing phenomenon, i.e., a shortening of the diffusion distance of the carrier, occurs. If the carrier diffusion distance is shortened, especially the short wavelength light among the components of solar light generates a carrier on the front side of the substrate, so that the generated carriers are recombined before the carrier collection is performed on the back side of the substrate. There is a problem.

On the other hand, Korean Patent Application No. 2007-29415 discloses a technique for simplifying the manufacturing process and reducing the manufacturing cost by improving the manufacturing process of the IBC-type solar cell, such as by introducing a screen printing method to the conductive layer formation have. Referring to FIG. 3 of this patent application, although the p + conductive layer is shown as protruding substantially into the inside of the silicon substrate, the p + conductive layer is spread by applying a composition containing a p-type dopant using screen printing, followed by diffusion. Since it is formed by heat treatment in the furnace, it can be seen that the p + conductive layer is substantially shown in FIG. 3. This is because, in the case of heat treatment in a diffusion furnace, the depth of diffusion does not exceed a few micrometers, no matter how deep.

Accordingly, an object of the present invention is to provide a high efficiency back electrode solar cell and a method of manufacturing the same, which can overcome the carrier life reduction problem that occurs when a relatively low quality low cost substrate is used.

The high efficiency rear electrode solar cell of the present invention for solving the above technical problem:

A silicon substrate having a front side and a back side;

A plurality of recesses formed on a rear surface of the silicon substrate;

First conductive doped regions formed on the back surface of the silicon substrate, the first conductive doped regions formed to include all of the recessed portions, and the second conductive doped regions separated from the first conductive doped regions; ;

A first conductivity type electrode and a second conductivity type electrode connected to each of the first conductivity type doped region and the second conductivity type doped region;

And FIG.

Here, the silicon substrate is preferably a CZ (Czochralski) wafer, in this case it is more preferable that the thickness of the CZ wafer is 150 ~ 300㎛.

On the other hand, the depth of the groove is preferably 10 to 70% of the thickness of the silicon substrate.

Method of manufacturing a high efficiency rear electrode solar cell of the present invention for solving the above technical problem:

Forming a plurality of recesses in a back side of the silicon substrate having a front side and a back side, and forming a first conductivity type doped region in the entire back side region of the silicon substrate;

A second step of forming a second conductive doped region separate from the first conductive doped region in a portion not including the recesses;

Forming an antireflective coating layer on an upper surface of the silicon substrate;

Forming a first conductivity type electrode and a second conductivity type electrode connected to the first conductivity type doped region and the second conductivity type doped region, respectively;

Respectively,

The first conductive type electrode and the second conductive type electrode may be formed by a pattern-type successful tablet by screen printing.

Here, the step of forming the FSF layer between the front surface of the silicon substrate and the anti-reflective coating layer may be further roughened before the third step of forming the anti-reflective coating layer on the upper surface of the silicon substrate.

According to the present invention, when using a relatively low quality low-cost substrate as a substrate of the back-electrode solar cell, even if the carrier life time is reduced, it is possible to reduce the degree of carrier recombination by employing a reach-through collector structure. It is possible to implement a back electrode solar cell. Therefore, a high efficiency rear electrode solar cell can be manufactured at low cost.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Figure 1a is a plan view showing the back structure of the high-efficiency back electrode solar cell according to an embodiment of the present invention, Figure 1b is a partial cross-sectional structure along the AA 'line of Figure 1a, but showing the top surface of the solar cell up Drawing. 1A and 1B, an N-type CZchralski (CZ) wafer 110 having a thickness of 150 μm to 300 μm is used as a substrate of the solar cell of the present invention. On the back side of the CZ wafer 110, the P-electrode 122 corresponding to the first conductivity type electrode and the N-electrode 124 corresponding to the second conductivity type electrode are arranged to form an interdigitated structure. have. The P-electrode 122 is a P + diffusion region corresponding to the first conductivity type doped region by a RTC (Reach-Through Collector) structure 126 formed of a metal plug filled in a recess formed in the CZ wafer 110. (diffusion region; 132) is in ohmic contact. In addition, the N-electrode 124 corresponds to the second conductivity type doped region by the contact plug 128 penetrating through the oxide film 160 (formed on the back surface of the CZ wafer 110) corresponding to the protective insulating layer. Ohmic contact is made with the N + diffusion region 134. On the other hand, the oxide film 160 is formed on the back of the CZ wafer 110, which forms a double antireflection layer together with the anti-reflection (AR) coating layer 140 made of a silicon nitride film to be described later.

The biggest feature of the solar cell of the present invention having such a structure is that the P-electrode 122 is deeply connected inside the CZ wafer 110 by the recess structure. The reason for such a structure is that if the quality of the substrate is somewhat poor, such as the CZ wafer 110, defects, dislocations, and various impurities (carbon, oxygen, or metal) are formed inside the CZ wafer 110. The defects that act as recombination centers of the carriers increase, resulting in a shorter carrier lifetime, that is, a decrease in carrier diffusion distance. If the structure 126 is deeply connected to the inside of the CZ wafer 110, even if the diffusion distance of the carrier becomes short, electrons move toward the P-electrode 122 before the carrier recombines, thereby easily reducing the degree of recombination of the carrier. Because it can. The depth of the RTC structure 126 with respect to the thickness of the CZ wafer 110 is not particularly limited, provided that only the mechanical strength is maintained, but the thickness of the CZ wafer 110 in the solar cell structure of the present invention is 150 to 300 μm. If the RTC structure 126 is adjusted to an appropriate value within the range of 10 to 70% of the thickness of the CZ wafer 110, the thickness of the effective wafer can be easily adjusted to within 100 μm. Reference numeral 150, which is not described in FIGS. 1A and 1B, is an N + FSF (Front Surface Field) layer, and this structure is employed in the prior art, and thus a separate description thereof will be omitted.

2A to 2E are cross-sectional views illustrating a process of manufacturing a high efficiency back electrode solar cell according to an embodiment of the present invention.

Referring to FIG. 2A, first, grooves 180 such as holes or grooves having a predetermined depth are formed on the back side of an N-type CZ wafer 110 having a thickness of 150 to 300 μm, and sawing and After the cleaning process to remove the damage of the wafer due to the laser operation, the P + diffusion region 132 is formed on the back surface of the wafer 110 by a P + doping and drive-in process using B 2 O 5 . Form. Before proceeding with this process, a gettering process may be performed on the CZ wafer 110 in advance in order to cure defects of the CZ wafer 110 itself.

Subsequently, a resist is coated on the back side of the CZ wafer 110 by a screen printing method to form an N + pattern, and subjected to resist curing and thermosetting. Next, N + is etched by a chemical solution and a resist removal process, a silicon etch process (2 占 퐉 or more) by a chemical solution such as KOH, N + doping and a drive-in process using P 2 O 5 is performed. A process of forming the diffusion region 134 is sequentially performed, and in this process, the process of removing the PSG (Phospho Silicate Glass) formed on the front surface of the wafer 110 is completed, thereby forming a structure as shown in FIG. 2B.

Next, in order to increase the absorption of sunlight, a texturing process is performed on the front surface of the wafer 110 using a chemical solution such as KOH / IPA or a plasma process, and after wet cleaning, doping using POCl 3 is performed. And an N + FSF layer 150 having a thickness of about 0.25 μm and a sheet resistance of 100 μs / sq by a drive-in process on the front surface of the wafer 110. In this case, a process of removing the PSG formed during the doping process is performed to make the structure shown in FIG. 2C. The N + FSF layer 150 is not necessarily formed and may be omitted in some cases.

Subsequently, the step of forming the oxide film 160 corresponding to the protective insulating layer and the step of forming a silicon nitride film on the N + FSF layer 150 for use as the antireflective coating layer 140 by PECVD are performed in a screen printing manner. N + / P + contact patterning is performed on the backside of the wafer 110 to complete the structure of FIG. 2D through resist curing and thermal curing, contact etching, resist removal and cleaning. In this embodiment, both the oxide film 160 and the silicon nitride antireflective coating layer 140 may be used for antireflection. The silicon nitride antireflective coating layer 140 may be performed before the oxide film forming process. In this case, the oxide layer 160 is hardly generated on the silicon nitride antireflection coating layer 140.

Finally, in order to make an IBC electrode, silver (Ag) paste for direct contact with a silicon wafer is applied to the back side of the wafer 110 by screen printing and subjected to curing and sintering. The pattern of the silver paste is made as shown in FIG. 1A, so that the P-electrode 122 and the N-electrode 124 have a structure of interdigitated stripes. The coated silver paste fills the inside of the recess 180 and the opening of the N + contact, so that the P-electrode 122 and the N-electrode 124 are formed through the RTC structure 126 and the contact plug 128, respectively. It is electrically connected to the P + diffusion region 132 and the N + diffusion region 134, and can finally complete the structure of FIG. 2E. The high efficiency back electrode solar cell of the present invention made by such a process can easily reduce the degree of recombination of carriers as described above, so that the conversion efficiency is high, but most of the complicated pattern forming process for manufacturing the same is not photolithography. Because of screen printing, the process is simple and the process cost is low.

In the above embodiment, an N-type wafer is used and the P-type is selected as the first conductivity type and the N-type is selected as the second conductivity type. However, when the P-type wafer is used, the N-type is selected as the first conductivity type. In this case, the P-type may be selected as the second conductivity type.

As described above, the embodiment of the present invention has been described, but it is only presented to understand the content of the present invention and those skilled in the art will be able to many modifications within the spirit of the present invention. Therefore, the scope of the present invention should not be construed as being limited to these examples. For example, in the present invention, the recessed portion refers to a structure that penetrates into the silicon substrate irrespective of the opening shape, and includes all structures such as holes or grooves having a predetermined depth.

1A is a plan view showing a back structure of a high efficiency back electrode solar cell according to an embodiment of the present invention;

FIG. 1B is a partial cross-sectional view taken along line AA ′ of FIG. 1A, but showing the top surface of the solar cell up; FIG. And

2A to 2E are cross-sectional views illustrating a process of manufacturing a high efficiency back electrode solar cell according to an embodiment of the present invention.

Explanation of reference numerals for main parts of the drawings

110: CZ wafer

122: P-electrode

124: N-electrode

126: RTC structure

128: contact plug

132: P + diffusion region

134: N + diffusion region

140: antireflection (AR) coating layer

150: N + Front Surface Field (FSF) layer

160: oxide film

Claims (9)

A silicon substrate having a front side and a back side; A plurality of recesses formed on a rear surface of the silicon substrate; First conductive doped regions formed on the back surface of the silicon substrate, the first conductive doped regions formed to include all of the recessed portions, and the second conductive doped regions separated from the first conductive doped regions; A first conductivity type electrode and a second conductivity type electrode connected to each of the first conductivity type doped region and the second conductivity type doped region; High efficiency rear electrode type solar cell having a. The high efficiency back electrode solar cell of claim 1, wherein the silicon substrate is a CZ wafer. The high efficiency back electrode solar cell of claim 2, wherein the CZ wafer has a thickness of 150 to 300 µm. The high efficiency back electrode solar cell of claim 1, wherein the depth of the groove is 10 to 70% of the thickness of the silicon substrate. The high efficiency back-electrode solar cell of claim 1, wherein the recess is formed in a hole or groove. The high efficiency back electrode type solar cell of claim 1, wherein the CZ wafer undergoes a gathering process. The method of claim 1, wherein the second conductivity type is P-type when the first conductivity type is N-type, and the second conductivity type is N-type when the first conductivity type is P-type. High efficiency rear electrode solar cell. Forming a plurality of recesses in a back side of the silicon substrate having a front side and a back side, and forming a first conductivity type doped region in the entire back side region of the silicon substrate; A second step of forming a second conductive doped region separate from the first conductive doped region in a portion not including the recesses; Forming an antireflective coating layer on an upper surface of the silicon substrate; Forming a first conductivity type electrode and a second conductivity type electrode connected to the first conductivity type doped region and the second conductivity type doped region, respectively; Respectively, The first conductive electrode and the second conductive electrode is a method of manufacturing a high efficiency back-electrode type solar cell, characterized in that made by a pattern forming process by screen printing. The method of claim 8, further comprising forming an FSF layer between the front surface of the silicon substrate and the antireflective coating layer before the third step of forming the antireflective coating layer on the front surface of the silicon substrate. Manufacturing method of high efficiency back electrode solar cell.
KR1020090008733A 2009-02-04 2009-02-04 High efficiency back contact solar cell and method for manufacturing the same KR20100089473A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2428992A2 (en) 2010-09-13 2012-03-14 Jusung Engineering Co. Ltd. Apparatus and method for manufacturing thin film type solar cell
KR20120067619A (en) * 2010-12-16 2012-06-26 엘지전자 주식회사 Solar cell and manufacturing mathod thereof
KR101219241B1 (en) * 2011-05-18 2013-01-21 현대중공업 주식회사 Back contact solar cell and method for fabricating the same
KR101238988B1 (en) * 2011-05-18 2013-03-04 현대중공업 주식회사 Back contact solar cell and method for fabricating the same
US9312405B2 (en) 2012-03-02 2016-04-12 Intellectual Keystone Technology Llc Thin film type solar cell and fabrication method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2428992A2 (en) 2010-09-13 2012-03-14 Jusung Engineering Co. Ltd. Apparatus and method for manufacturing thin film type solar cell
KR20120067619A (en) * 2010-12-16 2012-06-26 엘지전자 주식회사 Solar cell and manufacturing mathod thereof
KR101219241B1 (en) * 2011-05-18 2013-01-21 현대중공업 주식회사 Back contact solar cell and method for fabricating the same
KR101238988B1 (en) * 2011-05-18 2013-03-04 현대중공업 주식회사 Back contact solar cell and method for fabricating the same
US9312405B2 (en) 2012-03-02 2016-04-12 Intellectual Keystone Technology Llc Thin film type solar cell and fabrication method thereof

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