TWI555080B - Dry etching method - Google Patents

Dry etching method Download PDF

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TWI555080B
TWI555080B TW103121224A TW103121224A TWI555080B TW I555080 B TWI555080 B TW I555080B TW 103121224 A TW103121224 A TW 103121224A TW 103121224 A TW103121224 A TW 103121224A TW I555080 B TWI555080 B TW I555080B
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gas
film
ratio
mask
dry etching
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TW201530648A (zh
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Satoshi Terakura
Masahito Mori
Takao Arase
Ryuta Machida
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Hitachi High Tech Corp
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Description

乾式蝕刻方法
本發明係採用電漿之乾式蝕刻方法,尤其有關於3維構造裝置的蝕刻方法。
近年來,隨著快閃記憶體的高積體化,將各記憶元件之通道、或閘極電極積層化於垂直方向這樣的3維記憶體構造受到檢討。為了實現如此之3維記憶體構造,係變得需要以下蝕刻技術:將多晶矽膜與SiO2膜、或者將SiN膜與SiO2膜作成對層,可對於複數個對層一貫加工高縱橫比之導孔、或溝渠。
例如,依專利文獻1,揭露:使非晶碳層(Amorphous Carbon Layer:ACL,以下稱作ACL)為遮罩膜,對於由多晶矽膜與SiO2膜的對層所成之高縱橫比積層構造作乾式蝕刻時,利用含NF3與CH2F2之混合氣體。再者,揭露以下技術:在該氣體系統中,以主蝕刻作成錐狀,接著應用使壓力下降之過蝕,從而將錐狀的底部擴大,垂直對於高縱橫比之導孔進行蝕刻。
[先前技術文獻] [專利文獻]
[專利文獻1]日本發明專利公開2013-80909號公報
將利用在專利文獻1所揭露之蝕刻方法對於如示於圖1之是供以形成硬遮罩之膜的無機膜105與由多晶矽膜104及SiO2膜103所成之對層被複數積層的積層膜107在相同處理室進行一貫蝕刻之情況下的加工剖面之示意圖繪示於圖2。發生是ACL遮罩之遮罩106殘量的不足所造成之無機膜105的一方缺落108,或發生側蝕109。
此外,在積層膜107方面係成為錐狀,或產生多晶矽層104之越上層部越發生大的側蝕這樣的扇(Scallopping)形狀110。此時,圖2之以b-a定義的CD偏移量係成為27nm程度,此CD偏移量係引起記憶體特性在上層部與下層部不同這樣的問題。
為此,本發明,係在對於供以形成硬遮罩之無機膜與複數個對層作電漿蝕刻之乾式蝕刻方法方面,提供可抑制在前述無機膜之側蝕及扇(Scallopping)形狀的乾式蝕刻方法。
本發明,係一種乾式蝕刻方法,對於積層了 含矽膜與氧化矽膜之第一積層膜被複數積層的第二積層膜及配置於前述第二積層膜之上方的無機膜作電漿蝕刻,特徵在於:利用NF3氣體與CH3F氣體的混合氣體而對於前述無機膜與前述第二積層膜作蝕刻。
依本發明,即可在對於供以形成硬遮罩之無機膜與複數個對層作電漿蝕刻之乾式蝕刻方法方面,抑制在前述無機膜的側蝕及扇(Scallopping)形狀。
101‧‧‧晶圓基板
102‧‧‧阻擋膜
103‧‧‧SiO2
104‧‧‧多晶矽膜
105‧‧‧無機膜
106‧‧‧遮罩
107‧‧‧積層膜
108‧‧‧一方缺落
109‧‧‧側蝕
110‧‧‧扇(Scallopping)形狀
401‧‧‧源用電源
402‧‧‧來源電磁波用整合器
404‧‧‧第一電磁鐵
405‧‧‧第二電磁鐵
406‧‧‧蝕刻室
407‧‧‧第一氣體導入口
409‧‧‧第二氣體導入口
411‧‧‧VHF放射天線
412‧‧‧噴淋板
413‧‧‧晶圓
414‧‧‧聚焦環
415‧‧‧基座
416‧‧‧晶圓台
417‧‧‧高頻偏壓整合器
418‧‧‧ESC用直流電源
419‧‧‧高頻偏壓電源
420‧‧‧偏壓路徑控制機構
[圖1]對於應用本發明之3維記憶體元件部分的剖面作繪示之圖。
[圖2]對於應用現有技術之情況下的蝕刻形狀作繪示之圖。
[圖3]對於本發明之情況下的蝕刻形狀作繪示之圖。
[圖4]有磁場VHF乾式蝕刻裝置的剖面圖。
[圖5]對於關於Ar氣體添加量之CD偏移量501依存性與關於Ar氣體添加量之對遮罩選擇比502依存性作繪示的圖。
[圖6]對於關於N2氣體添加量之CD偏移量601依存性與關於N2氣體添加量之對遮罩選擇比602依存性作繪示的圖。
[圖7]對於關於O2氣體添加量為20sccm情況下的ACL遮罩之圖案開口率的CD偏移量701依存性與關於在ACL遮罩之圖案開口率為8%的O2氣體添加量為30sccm情況下之CD偏移量702作繪示的圖。
[圖8]對於關於2級的時間調變之高頻偏壓功率的工作比之CD偏移量依存性作繪示的圖。
首先,說明有關於供以實施本發明之乾式蝕刻裝置。圖4,係平行平板型的有磁場VHF(Very High Frequency,以下稱作VHF)乾式蝕刻裝置的縱剖面圖。在此乾式蝕刻裝置的真空容器,係具備:作為電漿處理室之蝕刻室406、放射VHF波之VHF放射天線411、將真空容器內抽真空之真空泵浦(未圖示)、對於電漿處理室內的壓力作控制之壓力控制閥(未圖示)。
蝕刻用的氣體,係通過質流控制器(未圖示)與停止閥(未圖示)後,通過第一氣體導入口407與第二氣體導入口409,而噴淋板412的同心圓狀地分別導入至蝕刻室406內。然後從設於真空容器下部之排氣口(未圖示)藉渦輪分子泵浦(未圖示)及乾式泵浦(未圖示)而作排氣。如此所導入之氣體係因藉電漿產生手段所照射的電磁波之能量被解離而生成、維持電漿。
電漿的產生手段,係具有:200MHz的VHF波之源用電源401、來源電磁波用整合器402、由第一電 磁鐵404與第二電磁鐵405所成之磁場生成手段。利用此等2個電磁鐵,而將電漿生成分布予以均勻化。所生成之磁場,係在噴淋板412附近為10mT以下。
載置是樣品之晶圓413的晶圓台416,係具備覆蓋晶圓413之載置面的外周側及側壁而配置之環狀的聚焦環414與基座415,可使用複數個溫度控制手段等(未圖示),而將晶圓台416之複數部分控制成不同的既定之溫度。此外,藉ESC用直流電源418而供應之直流電壓使得晶圓413係靜電吸附於是樣品台的晶圓台416之載置面。再者在晶圓台416方面,係連接著:供以從電漿中對於晶圓413引入離子並控制該離子能之4MHz的高頻偏壓電源419與高頻偏壓整合器417。
高頻偏壓電源419,係可對於12英寸徑的晶圓413,連續正弦波時相當下從最低1W程度輸出至最大功率6000W程度。再者,為了獲得充電損傷(電子屏蔽)減低及垂直加工性的效果,高頻偏壓電源419係可供應2級的時間調變之高頻功率。時間調變之高頻功率,係在0.1~10kHz的範圍之頻率重複高偏壓功率與低偏壓功率這樣的2級之功率。此外,高偏壓功率之期間與低偏壓功率之期間,係依重複頻率與工作比而作控制。另外,工作比,係關於一週期之高偏壓功率的期間之比。此外,低功率的功率範圍,係可在0W以上、不足高偏壓功率下作設定。
此外,具備對於透過電漿之偏壓電流的至 VHF放射天線411之比例作控制的偏壓路徑控制機構420,可更高準確度地對於電漿的分布作控制。再者為了依時間調變之偏壓功率的高功率與低功率,跟隨電漿阻抗的變化而將電漿予以穩定,於來源電磁場用整合器402與偏壓路徑控制機構420,係輸入來自高頻偏壓電源419的時間調變之週期資訊。
對於採用上述之乾式蝕刻裝置而應用了本發明之實施例在以下作說明。
首先,將應用本發明之3維構造的記憶體元件部分之剖面構造繪示於圖1。在晶圓基板101上從下配置:阻擋膜102、由是氧化矽膜之SiO2膜103與是多晶矽膜之多晶矽膜104所成之對層被複數積層之積層膜107、無機膜105、遮罩106。是積層膜107的各層之對層的厚度,係15~40nm之厚度。此外,無機膜105,係供以形成硬遮罩之膜,為SiN膜、SiON膜、SiO2膜等。再者無機膜105之厚度,係100~300nm之厚度。
此外,在本實施例中,係作為遮罩106採用ACL遮罩。另外,ACL遮罩,係預先藉乾式顯影而形成之遮罩。於此乾式顯影,係如下的遮罩之形成方法:利用預先圖案化之抗蝕遮罩而藉電漿蝕刻形成是中間層的SiON膜之硬遮罩,接著利用在硬遮罩形成時殘留之抗蝕遮罩與硬遮罩而藉電漿蝕刻於ACL膜形成圖案。
利用NF3氣體與CH3F氣體的混合氣體而對於如示於圖1之剖面構造的無機膜105與積層膜107一貫到 底作蝕刻之結果,如圖3(a)所示遮罩106的殘量為充分,可獲得抑制了在無機膜105之側蝕及扇(Scallopping)形狀的形狀。可獲得如此圖3(a)之形狀的理由思考如下。
首先,ACL遮罩之殘量的不足或發生側蝕及扇(Scallopping)形狀之原因,係在於:所電漿化之氣體組成的F元素相對於CHx過剩。亦即,原因在於:由於過剩之F元素,ACL遮罩之蝕刻率變大,且SiO2膜103、多晶矽膜104、無機膜105被側蝕同時從曝於電漿之時間長的上層側面往下層之線尺寸會後退。為此,為了抑制側蝕及扇(Scallopping)形狀的發生,係在蝕刻氣體方面以是含氟氣體之NF3氣體作為主氣體的情況下,為了將相對於構成含有含氟氣體之混合氣體的元素總數之氟元素的比例予以降低而需要混合具有堆積性之CHx系氣體。
例如,在NF3氣體與CHF3氣體之混合氣體方面,係相對於混合氣體的構成元素之F元素的比為高,故即使將相對於NF3氣體與CHF3氣體的混合氣體之NF3氣體的比例予以降低至5%在無機膜105仍會發生側蝕,將NF3氣體的比例予以增加之情況下,側蝕會進一步變大,產生扇(Scallopping)形狀。
此外,在NF3氣體與CH2F2氣體之混合氣體方面,係相對於混合氣體之NF3氣體的比例為50%以上之情況下,在無機膜105發生側蝕,在25%以下係發生上部的堆積物所造成之孔阻塞。此外,在25%~50%的範圍之 比例,係不發生側蝕及扇(Scallopping)形狀,惟對遮罩選擇比低至1.1程度,發生ACL遮罩之一方缺落108。
再者利用了NF3氣體與CH3F氣體的混合氣體之情況下,ACL遮罩之殘量為充分,可抑制側蝕及扇(Scallopping)形狀的發生。此外,依圖案的開口率或1晶片內之疏密圖案等的圖案尺寸,對於NF3氣體的流量與CH3F氣體的流量作調整使得可抑制側蝕。另外,圖案的開口率,係指佔晶圓基板101整體的面積之被蝕刻面積的比例。
具體而言使相對於NF3氣體與CH3F氣體的混合氣體之NF3氣體的流量比例為40~70%之間使得可獲得抑制了側蝕及扇(Scallopping)的發生之形狀。在本實施例中,係使相對於NF3氣體與CH3F氣體的混合氣體之NF3氣體的流量比例為11/20之情況為最佳。
再者,在NF3氣體與CH3F氣體的混合氣體進一步將稀有氣體、N2氣體予以混合,使得可使ACL遮罩之殘量增加與CD(Critical Dimension,以下稱作CD)偏移量抑制並存。首先,將關於Ar氣體添加量之CD偏移量501依存性與關於Ar氣體添加量之對遮罩選擇比502依存性繪示於圖5。於此,對遮罩選擇比,係採取相對於ACL遮罩之蝕刻率的對層之蝕刻率比。
如圖5所示得知:隨著Ar氣體添加量的增加,CD偏移量501與對遮罩選擇比502降低。CD偏移量501的改善理由,係可想作:Ar氣體添加使得氟碳氣體被 稀釋,可自由基的堆積量。在本實施例係在稀有氣體方面使用了Ar氣體,惟在本發明方面,係除了Ar氣體以外亦可採用He氣體、Ne氣體或Kr氣體。
然後,為了將因此Ar氣體添加而降低之對遮罩選擇比予以改善係N2氣體添加為有效的。將關於N2氣體添加量之CD偏移量601依存性與關於N2氣體添加量之對遮罩選擇比602依存性繪示於圖6。如圖6所示得知:隨著N2氣體添加量的增加,CD偏移量601與對遮罩選擇比602增加。此結果,係展現與示於圖5之Ar氣體添加的特性相反之特性,惟藉Ar氣體添加之CD偏移量減低效果較大。
亦即,藉Ar氣體添加而改善CD偏移量,藉N2氣體添加而改善因Ar氣體添加之對遮罩選擇比的不良化,使得總結而言可維持對遮罩選擇比同時獲得各向異性高之形狀。在本實施例中,係對於NF3氣體、CH3F氣體、Ar氣體、N2氣體的混合氣體,NF3:CH3F:Ar:N2=11:9:10:4之氣體流量比為最佳。
此外,代替稀有氣體(例如Ar氣體)而採用CH4氣體與Ar氣體的混合氣體(CH4氣體的對於Ar氣體之稀釋率係4%)仍可一邊改善CD偏移量,一邊抑制對遮罩選擇比的降低。此係作為CH4氣體與Ar氣體的混合氣體(CH4氣體的對於Ar氣體之稀釋率係4%)而添加NH仍可獲得同樣的效果。
再者在本發明中,係對於NF3氣體、CH3F氣 體、Ar氣體、N2氣體的混合氣體添加O2氣體使得可調整CD偏移量,可應對圖案開口率的變化。將O2氣體添加量為20sccm情況下的關於ACL遮罩之圖案開口率的CD偏移量701依存性、在ACL遮罩之圖案開口率為8%之O2氣體添加量為30sccm情況下的CD偏移量702繪示於圖7。
得知:隨著圖案開口率的降低,CD偏移量701增加。此結果,係可想作:隨著溝渠圖案的開口率之減少,在電漿中來自ACL遮罩的碳系反應生成物會增加,再入射於溝渠圖案之量亦增加之故。因此,圖案開口率變小之情況下,將O2氣體添加量予以增加,從而除去因再入射而增加之碳系堆積膜而改善CD偏移量,使得可獲得各向異性高之形狀。
然而,隨著O2氣體添加量的增加,對於ACL遮罩之選擇比會降低,故需要依圖案開口率,而避開過剩之O2氣體添加量。8%的圖案開口率之情況下,使O2氣體添加量為9%以下時,獲得是對層處理所需之選擇比的1.7以上之選擇比,故8%的圖案開口率之情況下,使O2氣體添加量為9%以下較佳。
此外,作為O2氣體的替代氣體而採用含有CO氣體或CO2氣體的碳元素與氧元素之氣體時,碳系堆積膜的除去力會變弱,故變得需要比氧氣多的添加量。藉此,O2氣體添加量為少之情況下,具有在廣的氣體流量範圍下之調整變容易的優點。
再者採用NF3氣體、CH3F氣體、Ar氣體、N2氣體的混合氣體同時應用2級的時間調變之高頻偏壓使得可減低CD偏移量。將關於2級的時間調變之高頻偏置電力的工作比之CD偏移量依存性繪示於圖8。另外,以在各工作比之時間調變的高頻偏壓功率之時間平均成為相等的方式設定在各工作比之高偏壓功率。於此,時間調變之高頻偏壓功率的時間平均,係採用以高偏壓功率與工作比之積而求得之值。此外,時間調變的重複頻率係採取1kHz,低功率係採取0W。
如圖8所示是圖案開口率為8%之情況下的結果之801,係在工作比為80%之情況下CD偏移量成為極小值,是圖案開口率為50%之情況下的結果之802,係工作比為50%之情況下,CD偏移量成為極小值。此結果,係表示:在如本發明為了使側蝕減低效果與ACL遮罩之選擇比提升效果並存而使用之堆積性強的氣體電漿方面,相對於圖案開口率為低之情況下係低功率時間成為短之高工作比較可減低堆積物的堆積期間使得可迴避孔上部的堆積物所造成之孔阻塞,圖案開口率為高之情況下,係碳系堆積物的再入射量減少,故低功率時間變長之低工作比在堆積物的堆積期間方面增加使得可改善CD偏移量。亦即,此結果,係表示可應對圖案開口率。
根據上述時,本發明係應用於5%~70%的圖案開口率之情況下較佳。此外,關於工作比,係是30%以下的圖案開口率之低圖案開口率的情況下,在從具有再堆 積之50%以上至具有設定堆積期間之效果的95%以下作使用較佳。再者,發生圖案上部的堆積物所造成之阻塞的情況下,係低功率期間中,採取可除去堆積物之最小功率,使得可迴避圖案的阻塞同時維持時間調變之高頻偏壓的效果。
以上,本發明,係採用NF3氣體、CH3F氣體、Ar氣體、N2氣體、O2氣體的混合氣體,依圖案開口率、ACL遮罩之厚度及開口尺寸而使處理壓力為0.6~4Pa,對於2級的時間調變之高頻偏壓的工作比、高功率、及低功率作調整,使得可獲得如圖3(b)所示之大致垂直之形狀。再者本發明,係與揭露於專利文獻1之蝕刻方法不同,無須在中途變更壓力,故可減低產量之降低。
關於處理壓力,係如上所述,壓力越高,越以高蝕刻率獲得高遮罩選擇性故在0.6Pa以上作使用較佳,且在圖案的開口部之尺寸為50nm以下的尺寸方面係抑制離子屏蔽的效果故在4Pa以下作使用較佳。
此外,本發明的NF3氣體、CH3F氣體、Ar氣體、N2氣體、O2氣體的混合氣體中之CH3F氣體與O2氣體,係成為***性氣體與助燃性氣體的組合,惟在10Pa以下的處理壓力下之使用,係基本上沒有問題。再者採取在氣體接觸之部分無超過200℃之熱源從而進一步提升安全性。例如,在示於圖4之平行平板型的有磁場VHF乾式蝕刻裝置,係使用採用不需燈絲加熱至200℃程度之石 英晶體諧振器的壓力系統或採用膜片式冷陰極之壓力計。再者蝕刻室406的溫度亦控制成100℃以下較佳。
再者本實施例的對層,係由氧化矽膜與多晶矽膜所成之對層,惟在本發明方面,係由氧化矽膜與氮化矽膜(SiN膜)所成之對層或、由氧化矽膜與矽化鎢膜(WSi膜)所成之對層亦可。
此外,在本實施例係採用平行平板型的有磁場VHF乾式蝕刻裝置,惟本發明係應用於採用電容耦合型、電感耦合型、微波Electron Cyclotron Resonance(ECR)等之其他電漿源的電漿蝕刻裝置仍可獲得與本發明同樣之效果。
101‧‧‧晶圓基板
102‧‧‧阻擋膜
103‧‧‧SiO2
104‧‧‧多晶矽膜
105‧‧‧無機膜
106‧‧‧遮罩
107‧‧‧積層膜

Claims (6)

  1. 一種乾式蝕刻方法,對交替積層了含矽膜與氧化矽膜的積層膜及配置於前述積層膜的上方的無機膜作電漿蝕刻,特徵在於:利用NF3氣體、CH3F氣體、O2氣體、N2氣體、He氣體的混合氣體而蝕刻前述無機膜與前述積層膜。
  2. 一種乾式蝕刻方法,對交替積層了含矽膜與氧化矽膜的積層膜及配置於前述積層膜的上方的無機膜作電漿蝕刻,特徵在於:利用NF3氣體與CH3F氣體的混合氣體,一貫地蝕刻前述無機膜與前述積層膜。
  3. 如申請專利範圍第1項之乾式蝕刻方法,其中,前述無機膜與前述積層膜的蝕刻,係利用前述NF3氣體、CH3F氣體、O2氣體、N2氣體、He氣體的混合氣體的一貫的蝕刻。
  4. 如申請專利範圍第1~3中任一項之乾式蝕刻方法,其中,前述含矽膜係多晶矽膜,相對於前述混合氣體的流量之前述NF3氣體的流量之比例為40%~70%的範圍內之值。
  5. 如申請專利範圍第1至3項中任一項之乾式蝕刻方法,其中, 對配置前述無機膜與前述積層膜的樣品供應被時間調變的高頻電力,前述時間調變的工作比,係基於是相對於前述試料的面積的被蝕刻面積的比例的圖案開口率而求出。
  6. 如申請專利範圍第5項之乾式蝕刻方法,其中,前述時間調變的工作比,係50%~95%的範圍內之值。
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JP6498152B2 (ja) * 2015-12-18 2019-04-10 東京エレクトロン株式会社 エッチング方法
JP6458156B2 (ja) 2016-03-28 2019-01-23 株式会社日立ハイテクノロジーズ プラズマ処理方法
JP6763750B2 (ja) * 2016-11-07 2020-09-30 東京エレクトロン株式会社 被処理体を処理する方法
KR20190009020A (ko) 2017-07-17 2019-01-28 삼성디스플레이 주식회사 표시 장치 및 이의 제조 방법
WO2020031224A1 (ja) 2018-08-06 2020-02-13 株式会社日立ハイテクノロジーズ プラズマ処理方法およびプラズマアッシング装置
JP6778822B2 (ja) 2018-10-26 2020-11-04 株式会社日立ハイテク プラズマ処理方法
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