TWI485754B - 陣列基板、具有其之液晶顯示裝置及其製造方法 - Google Patents
陣列基板、具有其之液晶顯示裝置及其製造方法 Download PDFInfo
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- TWI485754B TWI485754B TW101112678A TW101112678A TWI485754B TW I485754 B TWI485754 B TW I485754B TW 101112678 A TW101112678 A TW 101112678A TW 101112678 A TW101112678 A TW 101112678A TW I485754 B TWI485754 B TW I485754B
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- 239000000758 substrate Substances 0.000 title claims description 125
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 44
- 238000000034 method Methods 0.000 title claims description 30
- 238000004519 manufacturing process Methods 0.000 title claims description 24
- 239000010410 layer Substances 0.000 claims description 396
- 229910052751 metal Inorganic materials 0.000 claims description 65
- 239000002184 metal Substances 0.000 claims description 65
- 230000004888 barrier function Effects 0.000 claims description 55
- 239000000463 material Substances 0.000 claims description 27
- 239000011241 protective layer Substances 0.000 claims description 15
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 8
- 239000010409 thin film Substances 0.000 claims description 7
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052733 gallium Inorganic materials 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 239000011787 zinc oxide Substances 0.000 claims description 4
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 3
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims 2
- 238000000059 patterning Methods 0.000 claims 2
- SCCCLDWUZODEKG-UHFFFAOYSA-N germanide Chemical compound [GeH3-] SCCCLDWUZODEKG-UHFFFAOYSA-N 0.000 claims 1
- 150000002500 ions Chemical class 0.000 claims 1
- 238000010030 laminating Methods 0.000 claims 1
- 150000004772 tellurides Chemical class 0.000 claims 1
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- 238000005530 etching Methods 0.000 description 7
- 239000010408 film Substances 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 239000004988 Nematic liquid crystal Substances 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 2
- 101100353912 Arabidopsis thaliana PSBP1 gene Proteins 0.000 description 1
- 241001589086 Bellapiscis medius Species 0.000 description 1
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- 101100245627 Nicotiana tabacum PSBP2 gene Proteins 0.000 description 1
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- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
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- 239000002356 single layer Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
Classifications
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Description
本發明是有關於一種陣列基板及製造此種陣列基板的方法,且特別是有關於一種具有此種陣列基板之液晶顯示裝置。
近年來,液晶顯示器已經廣泛應用於電子產品的顯示螢幕。液晶顯示器有許多不同的形式,包括扭轉向列(twister nematic),超扭曲向列(super twisted nematic,STN),平面切換(in-plane switching),多區域垂直排列(multi-domain vertical alignment,MVA)等。當施加電壓時可以控制液晶分子的旋轉方向,並調變光的偏振方向,進而影響光通過量而造成亮態及暗態之反差作為顯示結果。
為了控制液晶分子方向,傳統使用向列型液晶(nematic liquid crystal)之形式的顯示器,常將基板之表面配向處理以控制液晶分子的配向,例如進行摩擦(rubbing)處理,用布材摩擦與液晶接觸之基板表面上所塗佈之配向膜表面,不但使製程成本升高且容易降低顯示品質。且前述使用向列(nematic)液晶的顯示器,其應答時間過長,不利於色序法之動態圖像顯示的應用,需要設置彩色濾光片薄膜來呈現彩色的顯示效果。因此,生產成本及製程複雜度較高。
本發明係有關於一種陣列基板及製造此種陣列基板之方法,具有此種陣列基板之液晶顯示裝置,可以降低驅動電壓。
根據本發明之第一方面,提出一種陣列基板,包括一基板、一層狀電極及一開關元件。層狀電極設於基板上,包括一導電層及一第一蝕刻阻擋層,導電層覆蓋於第一蝕刻阻擋層。開關元件設於基板上且電性連接層狀電極,開關元件具有一第二蝕刻阻擋層,且第一及第二蝕刻阻擋層係同層材料。
根據本發明之第二方面,提出一種液晶顯示裝置,包括一第一基板、一第二基板、一介質層及一層狀電極。第一及第二基板相對而設。介質層設於第一基板與第二基板之間。層狀電極設於第一基板上,層狀電極包括一導電層及一第一蝕刻阻擋層,導電層覆蓋於第一蝕刻阻擋層。開關元件,設於第一基板上且電性連接於層狀電極,開關元件具有一第二蝕刻阻擋層,且第一及第二蝕刻阻擋層係同層材料。
根據本發明之第三方面,提出一種液晶顯示裝置的製造方法。方法包括以下步驟。提供一第一基板。形成一層狀電極於第一基板上,層狀電極包括一導電層及一第一蝕刻阻擋層,導電層覆蓋於第一蝕刻阻擋層。形成一開關元件於基板上且位於層狀電極之一側,開關元件具有一第二蝕刻阻擋層,且第一及第二蝕刻阻擋層係同層材料。電性連接層狀電極及開關元件。提供一第二基板。對組第一基板與第二基板。形成一介質層於第一基板及第二基板之間。
為了對本發明之上述及其他方面有更佳的瞭解,下文特舉較佳實施例,並配合所附圖式,作詳細說明如下:
以下先說明本申請案之改善(藍相)液晶驅動電壓過大之方法,以及為了改善問題而研發出的陣列基板,以及具有此種陣列基板之液晶顯示裝置。
請參考第1圖,其繪示一藍相液晶的顯示裝置示意圖。如第1圖所示,顯示裝置10具有基板100及基板120,偏光板101及偏光板121分別設置於基板100及基板120上。介質層110設置於基板100及基板120之間,該介質層係一液晶層或一藍相液晶層,如本實施例所示,一介質層110設置於基板100及基板120之間。畫素電極102及共同電極104設置於同一基板100表面。薄膜電晶體(未顯示)控制畫素電極102及共同電極104的偏壓來改變兩電極之間產生的電場113,進而控制介質層110的光學非等向性大小。於本實施例中,共同電極104之參考電壓係與共同電壓相同。但其他實施例中,共同電極104亦可使用異於共同電壓之其他參考電壓。
由於顯示裝置10之介質層110係藉由利用無電場使雙折射為零之現象或施加電場以引起雙折射之現象達到顯示效果,介質層110的暗亮狀態藉由控制畫素電極102及共同電極104之間的偏壓即能改變。而且,藍相液晶在未施加電場狀態下,呈光學等方性,所以沒有控制配向之必要,不需使用配向層。然而,藍相液晶的操作溫度範圍較為狹窄,因此,可以使用高分子提供網狀結構以安定介質層110,來提高藍相液晶的操作溫度範圍,高分子安定化之藍相液晶(Polymer Stabilized Blue Phase,PSBP)雖然不會改變藍相液晶之高速應答性,不過需要提高偏壓以控制介質層110的亮暗態變化。因此,發明人提出一種陣列基板,係提高電極的高度設置,使得施加相同之偏壓於電極時,電極之間的等效水平電場增加。因此,可以降低所需要施加的驅動偏壓。
第2~10圖繪示依照本發明第一實施例之陣列基板20的製造流程剖面圖。陣列基板20包括走線區A1及開口區A2,於此係省略走線區A1及開口區A2的連接區段並簡化以斷面表示。第17~23圖繪示依照本發明第一實施例之陣列基板20的製造流程上視圖。如第2及17圖所示,提供一基板200,基板200係延伸於一平面,基板200上形成有一第一金屬層202,於第17圖中僅繪示部份之第一金屬層202,事實上,第一金屬層202可以向兩側延伸,延伸部份以斷面表示。第一金屬層202例如係一多層結構或者係一合金,第一金屬層202的材料係選擇自鋁、銅、鉬、釹(Nd)及其所組成的群組。如第3及18圖所示,形成一氧化層204於第一金屬層202及基板200上,氧化層204例如係氧化閘極層。形成一主動層206於氧化層204上。主動層206例如係一非結晶矽(Amorphous Silicon,a-Si)薄膜或一非晶相銦鎵鋅氧化物(Amorphous InGaZnO,a-IGZO)薄膜。
如第4及19圖所示,形成一第一蝕刻阻擋層208a及一第二蝕刻阻擋層208b於主動層206上,第一蝕刻阻擋層208a及一第二蝕刻阻擋層208b係分別位於開口區A2及走線區A1。第一蝕刻阻擋層208a和第二蝕刻阻擋層208b,可為於製程的同一步驟中同時或先後完成之同層材料。第一蝕刻阻擋層208a和第二蝕刻阻擋層208b之材料可選自氧化矽(SiOx)或氮化矽(SiNx)。於另一實施例中,第一蝕刻阻擋層208a和第二蝕刻阻擋層208b亦可視需要於製程的不同步驟中完成。
如第5圖所示,可以選擇執行一摻雜製程,以摻雜一半導體雜質於第一蝕刻阻擋層208a及第二蝕刻阻擋層208b未覆蓋之主動層206之表面上。於摻雜製程後,係形成摻雜層206-1及未摻雜之主動層206-2。
請參考第6及20圖,形成一第二金屬層210於摻雜層206-1及部份之第二蝕刻阻擋層208b上。於第20圖中僅繪示部份之第二金屬層210,實際上,第二金屬層210可以向兩側延伸,延伸部份以斷面表示。如第6~7圖所示,以第二金屬層210及第一蝕刻阻擋層208a為遮罩,移除未受到遮蔽的摻雜層206-1及未摻雜之主動層206-2,並形成如第7及21圖所示之開口V、主動層206a、摻雜層206b與主動層206c。於一實施例中,亦可以使用多一道光罩的製程,先移除部份之摻雜層206-1及部份之未摻雜的主動層206-2,並形成開口V,再形成第二金屬層210於摻雜層206b及部份之第二蝕刻阻擋層208b上。也就是說,並不限制形成第二金屬層210與形成開口V之步驟順序。值得注意的是,於第6~7圖中,由於斷面線截斷的影響,僅繪示出部份之開口V。
如第7及21圖所示,第一金屬層202、氧化層204、主動層206a、摻雜層206b、第二蝕刻阻擋層208b及第二金屬層210係構成一開關元件S。於此實施例中,開關元件S例如係一薄膜電晶體(Thin Film Transistor,TFT)。此外,第一金屬層202、氧化層204、主動層206a、摻雜層206b及第二金屬層210係構成一儲存電容C。
請參考第8A及22圖,形成導電層216於氧化層204及第一蝕刻阻擋層208a上,且導電層216可以覆蓋於主動層206c及第一蝕刻阻擋層208a所形成的堆疊結構之側邊。導電層216之材料例如係選擇自金屬、銦錫氧化物、銦鋅氧化物、銦錫鋅氧化物、銦鎵鋅氧化物及其組合所構成之群組。主動層206c、第一蝕刻阻擋層208a及導電層216係構成層狀電極L1。剖面圖示中僅繪示部分的層狀電極,該層狀電極可視需求為規則間隔排列或為不規則間隔排列。此外,如第8A及23圖所示,可以視製程需求形成一介電層212於第二蝕刻阻擋層208b及第二金屬層210上,介電層212例如係一遮光層,該遮光層可為有機介電層。但於另一實施例中,開關元件S可以係以IGZO為主動層之薄膜電晶體TFT,此時可以不需要設置遮光層。於一實施例中,可以視製程需求,於介電層212上設置一間隙調整單元層(未繪示出)及/或一保護層(未繪示出)。間隙調整單元層係用以於之後對組基板時,保持基板之間的間距,保護層係用以避免液晶直接與遮光層接觸。更於一實施例中,亦可以視製程需求,於介電層212和導電層216與第二蝕刻阻擋層208b和第二金屬層210之間設置另一保護層(未繪示出),用以保護薄膜電晶體TFT元件。
請參照第8A圖,陣列基板20-1例如係沿第23圖之切線2-2的剖面作繪示。圖8A中僅繪示部分之開口V。如第8A及23圖所示,陣列基板20-1包括開關元件S、儲存電容C及層狀電極L1,開關元件S及儲存電容C係設置於走線區A1,層狀電極L1係設置於開口區A2。層狀電極L1具有一最大寬度D1及最大高度H1。於其他應用於邊緣電場切換(Fringe Field Switching,FFS)顯示器之實施例中,可以於陣列基板20-1之基板200以及氧化層204間另形成一導電層(圖未示),氧化層204可以提供電性絕緣功能。
值得注意的是,第23圖僅繪示層狀電極L1的一種俯視圖排列形式,並非用以限定層狀電極L1的結構。層狀電極L1可以為鋸齒狀、輻射狀、梳狀等對稱或不對稱的其他形狀,請參考第24A~24C圖,其繪示如第23圖之層狀電極L1的其他形式之示意圖。
請同時參照第7及8B圖,於一實施例中,第7圖之步驟後,可於第二金屬層210形成後,緊接著再形成一保護層213a及保護層213b,保護層213a覆蓋部份之第二金屬層210上,用以保護第二金屬層210及薄膜電晶體TFT,保護層213b可以選擇性地形成於第一蝕刻阻擋層208a上。接著,再形成介電層212’(例如係遮光層)於保護層213a上,最後形成導電層216以形成層狀電極L1’,並且覆蓋於露出的第二金屬層210以導通訊號。保護層213b的設置可用以增加層狀電極L1’的高度。層狀電極L1’具有一最大寬度D1’及最大高度H1’。
請同時參照第7及8C圖,於一實施例中,第7圖之步驟後,亦可以蝕刻部份之氧化層204以暴露出基板200,此時形成氧化層204’,如第8C圖所示。接著,形成導電層216於暴露之基板200及第一蝕刻阻擋層208a上,且覆蓋氧化層204’、主動層206c及第一蝕刻阻擋層208a所形成的堆疊結構,以形成層狀電極L2。層狀電極L2具有一最大寬度D2及最大高度H2。陣列基板20-2包括開關元件S、儲存電容C及層狀電極L2,開關元件S及儲存電容C係設置於走線區A1,層狀電極L2係設置於開口區A2。於此實施例中,由於氧化層204’亦構成層狀電極L2的一部分,因此,可以增加整體層狀電極L2的高度。
值得注意的是,第8A~8C圖之層狀電極L1、層狀電極L1’及層狀電極L2之導電層216,可以僅設置在第一蝕刻阻擋層208a上,而不需要覆蓋於堆疊結構之側邊(圖未示)。
此外,參照第8A~8C圖所示,於一實施例中,可以先形成導電層216,再進行形成介電層212之步驟(圖未示)。換句話說,並不限制形成介電層212與導電層216的先後順序。
此外,於另一實施例中,第8A圖形成介電層212之步驟中,可於形成介電層212於第二蝕刻阻擋層208b上及第二金屬層210上時,同時形成介電層214於第一蝕刻阻擋層208a上,如第9A圖所示。介電層214與介電層212可以係相同材質,例如係一樹脂材料。接著,形成導電層216於氧化層204及介電層214上,以構成層狀電極L3。層狀電極L3具有一最大寬度D3及最大高度H3。導電層216可以選擇性地覆蓋於主動層206c、第一蝕刻阻擋層208a及介電層214所形成的堆疊結構之側邊。陣列基板20-3包括開關元件S、儲存電容C及層狀電極L3,開關元件S及儲存電容C係設置於走線區A1,層狀電極L3係設置於開口區A2。由於介電層214亦為層狀電極L3的一部分,因此,可以增加整體層狀電極L3的高度。
第9B圖所示,陣列基板20-4包括開關元件S、儲存電容C及層狀電極L4,開關元件S及儲存電容C係設置於走線區A1,層狀電極L4係設置於開口區A2。層狀電極L4具有一最大寬度D4及最大高度H4。陣列基板20-4與第9A圖之陣列基板20-3相似,差異僅在於層狀電極L4更包括氧化層204’。
請參考第9C圖,陣列基板20-5係接續第7圖之步驟所製成。於第7圖之步驟後,可以接著形成一另一介電層218(例如係一間隙控制單元層)於介電層212上,且同時形成另一介電層217於介電層214上。接著,再形成具有導電層216覆蓋之層狀電極L5,導電層216可以僅設置於層狀電極L5之其中一層,或是設置於層狀電極L5之頂層,並選擇性地覆蓋於層狀電極L5之側邊。層狀電極L5具有一最大寬度D5及最大高度H5。如第9C圖所示,陣列基板20-5包括開關元件S、儲存電容C及層狀電極L5,開關元件S及儲存電容C係設置於走線區A1,層狀電極L5係設置於開口區A2。介電層217及介電層218可以係相同材質,例如係一透光樹脂材料、一有機或無機材料。
於另一實施例中,亦可以先形成導電層216,再形成介電層218(圖未示)。換句話說,並不限制形成介電層218與導電層216的先後順序。
值得注意的是,層狀電極L1~L5各層的形狀、寬度、高度及堆疊形式皆不做限制。而且,層狀電極L1之各層結構並不一定要對稱。以下係以層狀電極L2及層狀電極L3為例作說明。請參考第10A~10F圖,其繪示如第8B圖之層狀電極L2或第9A圖之層狀電極L3的型式。符號x1~x5例如係層狀電極L2之氧化層204’,符號y1~y5例如係層狀電極L2之主動層206c,符號z1~z5例如係層狀電極L2之第一蝕刻阻擋層208a。當然,符號x1~x5亦可以例如係層狀電極L3之主動層206c,符號y1~y5例如係層狀電極L3之第一蝕刻阻擋層208a,符號z1~z5例如係層狀電極L2之介電層214。
如第10A~10F圖所示,符號x1~x5、符號y1~y5及符號z1~z5的形狀、寬度及高度皆不做限制,涵蓋到任何可以堆疊的可能形式。此外,於此係以導電層216覆蓋到層狀電極L2及層狀電極L3之側壁為例作繪示。於一實施例中,只要導電層216至少設置於層狀電極L2及層狀電極L3的結構中即可,導電層216並不一定要覆蓋到層狀電極L2及層狀電極L3之側壁。較佳地,導電層216可以設置於層狀電極L2及層狀電極L3的頂部。
請參照第11A~11B圖,其繪示根據本發明第一實施例之陣列基板之製造方法的流程圖。於此僅繪示出第一實施例之陣列基板可能的製造流程,並非用以限定本發明,步驟S100~S121之各個步驟係可以依製程需求而作增減或調換之調整。步驟S100~S108係對應至第2~5圖之流程。步驟S110~S117係對應至第6、7、8A、8B及9A~9B圖之流程。於步驟S112中,若未移除未受到第二金屬層210遮蔽的氧化層204,則會製造出第8A圖之陣列基板20-1,若移除未受到第二金屬層210遮蔽的氧化層204,則會製造出第8B圖之陣列基板20-2。
於步驟S114中,若形成介電層214於開口區A2之第一蝕刻阻擋層208a上,且於步驟S112中未移除未受到第二金屬層210遮蔽的氧化層204,則會製造出第9A圖之陣列基板20-3。若於步驟S112中移除未受到第二金屬層210遮蔽的氧化層204,且於步驟S114中,形成介電層214於開口區A2之第一蝕刻阻擋層208a上,則會製造出第9B圖之陣列基板20-4。
步驟S110~S119係對應至第9C圖之流程。若於步驟S112中移除未受到第二金屬層210遮蔽的氧化層204,且於步驟S114中,形成介電層214於開口區A2之第一蝕刻阻擋層208a上,於步驟S116中,設置間隙調整單元層218及/或一保護層(未繪示出)時,同時設置介電層217於開口區A2之第一蝕刻阻擋層208a上,則會製造出第9C圖之陣列基板20-5。
於一實施例中,亦可以使用步驟S110~S121之步驟流程,於步驟S115中,先形成導電層216於第一蝕刻阻擋層208a上,再執行步驟S118,形成介電層214於走線區A1之第二蝕刻阻擋層208b上,且選擇性地形成介電層214於開口區A2之第一蝕刻阻擋層208a上。接著,執行步驟S121,形成間隙調整單元層及/或保護層於走線區A1之介電層214上。
請參考第12~16圖,其繪示依照本發明第二實施例之陣列基板30的製造流程示意圖。陣列基板30包括走線區A1及開口區A2,於此係省略走線區A1及開口區A2的連接區段並簡化以斷面表示。請參考第12圖,首先,提供一基板300,形成一第一金屬層302於基板300上,第一金屬層302例如係一圖案化之銅、鋁、鉬、釹及上述金屬所組成的合金群組。形成一氧化層304於第一金屬層302於基板300上。形成主動層306於氧化層304上。形成一蝕刻終止材料308於主動層306上,該蝕刻終止材料可選自氧化矽(SiOx)或氮化矽(SiNx)。形成一光阻層P於蝕刻終止材料308上。進行一微影製程,例如係以第一金屬層302及第一金屬層303作為自對準光罩,由基板300朝向蝕刻終止材料308的方向照射一紫外光。
如第13~14圖所示,形成一圖案化光阻P’,以圖案化光阻P’作為遮罩進行蝕刻,以圖案化蝕刻終止材料308,形成第一蝕刻阻擋層308a、第二蝕刻阻擋層308b及第三蝕刻阻擋層308c。於另一實施例中,亦可以使用遮罩以圖案化蝕刻終止材料308。第一蝕刻阻擋層308a係設置於開口區A2,第二蝕刻阻擋層308b及第三蝕刻阻擋層308c係設置於走線區A1。此時,紫外光係由蝕刻終止材料308朝向基板300的方向作照射,以形成第一蝕刻阻擋層308a、第二蝕刻阻擋層308b及第三蝕刻阻擋層308c。接著,可以執行一摻雜製程,以摻雜一半導體雜質於主動層306中,形成主動層306-1及摻雜層306-2。
請參考第15圖,圖案化第一金屬層303、氧化層304(繪示於第14圖)、主動層306、第一蝕刻阻擋層308a,並形成開口V2。於第15圖中,由於斷面線截斷的影響,僅繪示出部份之開口V2。接著,請參考第16圖,形成一第二金屬層310於第二蝕刻阻擋層308b、第三蝕刻阻擋層308c及摻雜層306-2上,形成一介電層312於第二金屬層310及第二蝕刻阻擋層308b上。並且,形成一導電層316覆蓋於開口區A2之第一蝕刻阻擋層308a上,以形成層狀電極L6。層狀電極L6具有一最大寬度D6及最大高度H6。於一實施例中,可選擇性地形成一保護層(圖未示)設置於第二金屬層310上,再形成介電層312於保護層及第二金屬層310上。
於此實施例中,陣列基板30係由開關元件S2、儲存電容C2及層狀電極L6所組成。陣列基板30之各層結構的材料可以選擇與陣列基板20-1~20-5所對應之結構相同之材料。值得注意的是,陣列基板30之蝕刻阻擋層308a~308c係由自對準製程所定義。因此,可以節省一道光罩製程。此外,陣列基板30之儲存電容C2具有一第三蝕刻阻擋層308c設於第一金屬層302及第二金屬層310之間,因此,可以在相同的電容表面積條件下,提供較小的儲存電容。
請參照第25A~25B圖,其繪示根據本發明第二實施例之陣列基板之製造方法的流程圖。於此僅繪示出第二實施例之陣列基板可能的製造流程,並非用以限定本發明,步驟S200~S221之各個步驟係可以依製程需求而作調整。步驟S200~S208係對應至第12~14圖之流程。步驟S210~S217係對應至第15~16圖之流程。於第15圖(對應至S212)中,僅繪示出移除未受到第二金屬層310遮蔽的氧化層304的情況。當然,亦有可能不移除未受到第二金屬層310遮蔽的氧化層304,並不作限制。
此外,於步驟S214中,可以選擇性地於形成介電層212於走線區A1時,同時形成介電層(未繪示出)於開口區A2之第一蝕刻阻擋層308a上。於步驟S216中,於設置間隙調整單元層及/或一保護層(未繪示出)時,亦可以選擇性地同時設置介電層(未繪示出)於開口區A2之第一蝕刻阻擋層308a上,以增加層狀電極L6的高度。
綜上所述,本發明上述實施例之陣列基板的製造方法,可以在形成開關元件之各層結構的製程中,同時堆疊層狀電極。所形成之層狀電極L1~L6的高度H1~H6約2微米(μm)至10μm(2μm H 10μm
),且層狀電極L1~L6的最大寬度D1~D6約2μ
m至20μ
m(2μm D20μm
)。因此,不需要過度複雜的製程方法,使用既有的製程機台即可以提升層狀電極的整體高度。本發明上述實施例之陣列基板因為堆疊有較高的層狀電極,相較於傳統較低之單層電極,在施加相同的電壓下,可以提供較大的水平電場強度,因而可應用在需要較大電場才可以驅動高分子安定化藍相液晶顯示裝置中。此外,本發明一實施例之液晶顯示裝置可以在單一陣列基板上形成開關元件、遮光層及間隙調整單元層,因此,僅需要對單一基板進行製造加工,可以簡化製程。
綜上所述,雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。
10‧‧‧顯示裝置
20-1’、20-1~20-5、30‧‧‧陣列基板
100、120、200、300‧‧‧基板
101、121‧‧‧偏光板
102、104‧‧‧電極
110‧‧‧介質層
113‧‧‧電場
202、210、302、303‧‧‧金屬層
204、204’、304‧‧‧氧化層
206、206-2、206a、206c、306、306-2‧‧‧主動層
206-1、206b、306-1‧‧‧摻雜層
208a、208b、308a、308b、308c‧‧‧蝕刻阻擋層
212、214、217、218‧‧‧介電層
216‧‧‧導電層
308‧‧‧蝕刻終止材料
A1‧‧‧走線區
A2‧‧‧開口區
C、C2‧‧‧儲存電容
L1’、L1~L6‧‧‧層狀電極
H1’、H1~H6‧‧‧高度
D1’、D1~D6‧‧‧寬度
P、P’‧‧‧光阻
V、V2‧‧‧開口
S、S2‧‧‧開關元件
S100~S121、S200~S221‧‧‧步驟
x1~x5、y1~y5、z1~z5‧‧‧符號
2-2‧‧‧切線
第1圖係繪示發明人所知悉之藍相液晶的顯示裝置示意圖。
第2~7、8A~8C、9A~9C圖繪示依照本發明一實施例之陣列基板的製造流程剖面示意圖。
第10A~10F圖繪示依照本發明一實施例之層狀電極於不同形式之示意圖。
第11A~11B圖係繪示依照本發明一實施例之陣列基板之製造方法的流程圖。
第12~16圖繪示依照本發明另一實施例之陣列基板的製造流程示意圖。
第17~23圖係繪示依照本發明一實施例之陣列基板的製造流上視示意圖。
第24A~24C圖係繪示如第23圖之層狀電極的其他形式之示意圖。
第25A~25B圖係繪示依照本發明第二實施例之陣列基板之製造方法的流程圖。
20-5...液晶顯示裝置
200...基板
202、210...金屬層
204’...氧化層
206c...主動層
208a、208b...蝕刻阻擋層
212、214、217、218...介電層
216...導電層
A1...走線區
A2...開口區
C...儲存電容
D5...寬度
L5...層狀電極
H5...高度
S...開關元件
Claims (23)
- 一種陣列基板,包括:一基板;一層狀電極,設於該基板上,該層狀電極包括一導電層及一第一蝕刻阻擋層,該導電層覆蓋於該第一蝕刻阻擋層;以及一開關元件,設於該基板上,該開關元件包括:一第一金屬層;一氧化層,設於該第一金屬層上;一主動層,設於該氧化層上;一第二金屬層,設置於該主動層上且電性連接該層狀電極;一第二蝕刻阻擋層,設於該主動層與該第二金屬層之間,且該第二蝕刻阻擋層與該第一蝕刻阻擋層係同層材料。
- 如申請專利範圍第1項所述之陣列基板,其中,該第二蝕刻阻擋層與該第一蝕刻阻擋層係同時形成。
- 如申請專利範圍第1項所述之陣列基板,其中該層狀電極更包括一介電層及/或一另一導電層。
- 如申請專利範圍第3項所述之陣列基板,其中該介電層係選擇自氧化物、矽化物、氮化物、氮氧化物、樹脂及其組合所構成之群組,該導電層及該另一導電層係選擇自金屬、銦錫氧化物、銦鋅氧化物、銦錫鋅氧化物、銦鎵鋅氧化物及其組合所構成之群組。
- 如申請專利範圍第1項所述之陣列基板,其中該 層狀電極係作為一畫素電極及/或一共同電極。
- 如申請專利範圍第1項所述之陣列基板,其中該層狀電極的高度係2微米(μ m)至10μ m,且該層狀電極的最大寬度係2微米(μ m)至20μ m。
- 如申請專利範圍第1項所述之陣列基板,其中該層狀電極之各層寬度不同。
- 一種液晶顯示裝置,包括:一第一基板及與該第一基板相對而設之一第二基板;一介質層,設於該第一基板與該第二基板之間;一層狀電極,設於該第一基板上,該層狀電極包括一導電層及一第一蝕刻阻擋層,該導電層覆蓋於該第一蝕刻阻擋層;以及一開關元件,設於該第一基板上,該開關元件包括:一第一金屬層;一氧化層,設於該第一金屬層上;一主動層,設於該氧化層上;一第二金屬層,設置於該主動層上且電性連接於該層狀電極;一第二蝕刻阻擋層,設於該主動層與該第二金屬層之間,且該第一蝕刻阻擋層及該第二蝕刻阻擋層係同層材料。
- 如申請專利範圍第8項所述之液晶顯示裝置,其中該第二蝕刻阻擋層與該第一蝕刻阻擋層係同時形成。
- 如申請專利範圍第8項所述之液晶顯示裝置,其中該介質層係一液晶層或一藍相液晶層,該開關元件係一 薄膜電晶體陣列。
- 如申請專利範圍第8項所述之液晶顯示裝置,其中該層狀電極更包括一介電層及/或一另一導電層。
- 如申請專利範圍第11項所述之液晶顯示裝置,其中該介電層係選擇自氧化物、矽化物、氮化物、氮氧化物、樹脂及其組合所構成之群組,該導電層及該另一導電層係選擇自金屬、銦錫氧化物、銦鋅氧化物、銦錫鋅氧化物、銦鎵鋅氧化物及其組合所構成之群組。
- 如申請專利範圍第8項所述之液晶顯示裝置,其中該層狀電極的高度係2微米(μ m)至10μ m,該層狀電極的最大寬度係2微米(μ m)至20μ m。
- 如申請專利範圍第8項所述之液晶顯示裝置,其中該開關元件係一薄膜電晶體陣列。
- 如申請專利範圍第8項所述之液晶顯示裝置,其中該層狀電極之各層寬度不同。
- 一種液晶顯示裝置的製造方法,該方法包括:提供一第一基板;形成一層狀電極於該第一基板上,該層狀電極包括一導電層及一第一蝕刻阻擋層形成於一氧化層上,該導電層覆蓋於該第一蝕刻阻擋層;形成一開關元件於該第一基板上且位於該層狀電極之一側,該開關元件包括:形成一第一金屬層於該第一基板上;形成該氧化層於該第一金屬層及該第一基板上; 形成一主動層於該氧化層上;形成該第二蝕刻阻擋層於部份之該主動層上;以及形成一第二金屬層於該主動層及部份之該第二蝕刻阻擋層上,該第二蝕刻阻擋層設於部份之該主動層與該第二金屬層之間,且該第一蝕刻阻擋層及該第二蝕刻阻擋層係同層材料;電性連接該層狀電極及該開關元件;提供一第二基板;對組該第一基板與該第二基板;以及形成一介質層於該第一基板及該第二基板之間。
- 如申請專利範圍第16項所述之液晶顯示裝置的製造方法,其中該第一蝕刻阻擋層及該第二蝕刻阻擋層係同時形成。
- 如申請專利範圍第16項所述之液晶顯示裝置的製造方法,其中形成該層狀電極於該第一基板上之步驟包括:形成該氧化層於該第一基板上;形成該第一蝕刻阻擋層於該氧化層上;以及形成該導電層於該第一蝕刻阻擋層的上表面上。
- 如申請專利範圍第16項所述之液晶顯示裝置的製造方法,其中於形成該第二金屬層之步驟之後,更包括形成一介電層於該第二金屬層上,且於形成該導電層於該第一蝕刻阻擋層之前,同時形成該介電層於該第一蝕刻阻 擋層上,該介電層係包括一遮光層及/或一間隙控制單元層。
- 如申請專利範圍第16項所述之液晶顯示裝置的製造方法,其中該液晶顯示裝置具有一走線區及一開口區,該開關元件係形成於該走線區,該層狀電極係形成於該開口區。
- 如申請專利範圍第19項所述之液晶顯示裝置的製造方法,其中形成該介電層於該第二金屬層上之步驟後,更包括形成一保護層於該介電層上。
- 如申請專利範圍第16項所述之液晶顯示裝置的製造方法,其中形成該第二金屬層之步驟之前,更包括:摻雜一導電形離子於該主動層表面,以使該主動層表面形成一摻雜層。
- 如申請專利範圍第16項所述之液晶顯示裝置的製造方法,其中形成該第二蝕刻阻擋層之步驟更包括:形成一蝕刻終止材料層於該主動層上;圖案化該蝕刻終止材料層以形成該第二蝕刻阻擋層,其中圖案化該蝕刻終止材料層之步驟係以該第一金屬層作自對準曝光,且該自對準曝光之光源係由該第一基板朝向該蝕刻終止材料層的方向照射。
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US13/798,255 US9331162B2 (en) | 2012-04-10 | 2013-03-13 | Array substrate, liquid crystal display device having the same and method for manufacturing the same thereof |
US15/082,002 US9921441B2 (en) | 2012-04-10 | 2016-03-28 | Array substrate, liquid crystal display device having the same and method for manufacturing the same thereof |
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TWI578502B (zh) | 2014-11-27 | 2017-04-11 | 鴻海精密工業股份有限公司 | 薄膜電晶體陣列基板及液晶顯示面板 |
CN110854171B (zh) * | 2019-11-21 | 2022-09-13 | 京东方科技集团股份有限公司 | 一种显示基板及其制备方法、显示装置 |
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US20160209695A1 (en) | 2016-07-21 |
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US9331162B2 (en) | 2016-05-03 |
US20130265516A1 (en) | 2013-10-10 |
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