TWI248139B - Method for manufacturing a semiconductor chip mounting body and a semiconductor chip mounting body - Google Patents

Method for manufacturing a semiconductor chip mounting body and a semiconductor chip mounting body Download PDF

Info

Publication number
TWI248139B
TWI248139B TW93117541A TW93117541A TWI248139B TW I248139 B TWI248139 B TW I248139B TW 93117541 A TW93117541 A TW 93117541A TW 93117541 A TW93117541 A TW 93117541A TW I248139 B TWI248139 B TW I248139B
Authority
TW
Taiwan
Prior art keywords
semiconductor wafer
circuit board
resin sheet
thermosetting resin
semiconductor
Prior art date
Application number
TW93117541A
Other languages
English (en)
Chinese (zh)
Other versions
TW200534409A (en
Inventor
Makoto Aoki
Kuniyasu Hosoda
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of TW200534409A publication Critical patent/TW200534409A/zh
Application granted granted Critical
Publication of TWI248139B publication Critical patent/TWI248139B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector

Landscapes

  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
TW93117541A 2004-04-09 2004-06-17 Method for manufacturing a semiconductor chip mounting body and a semiconductor chip mounting body TWI248139B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004116271A JP2005302971A (ja) 2004-04-09 2004-04-09 半導体チップ実装体の製造方法、半導体チップ実装体

Publications (2)

Publication Number Publication Date
TW200534409A TW200534409A (en) 2005-10-16
TWI248139B true TWI248139B (en) 2006-01-21

Family

ID=35067607

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93117541A TWI248139B (en) 2004-04-09 2004-06-17 Method for manufacturing a semiconductor chip mounting body and a semiconductor chip mounting body

Country Status (3)

Country Link
JP (1) JP2005302971A (ja)
CN (1) CN1681097A (ja)
TW (1) TWI248139B (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5456440B2 (ja) 2009-01-30 2014-03-26 日東電工株式会社 ダイシングテープ一体型ウエハ裏面保護フィルム
JP5640050B2 (ja) * 2009-01-30 2014-12-10 日東電工株式会社 半導体装置の製造方法
JP5640051B2 (ja) * 2009-01-30 2014-12-10 日東電工株式会社 半導体装置の製造方法
US9196533B2 (en) 2010-04-20 2015-11-24 Nitto Denko Corporation Film for back surface of flip-chip semiconductor, dicing-tape-integrated film for back surface of semiconductor, process for producing semiconductor device, and flip-chip semiconductor device
CN103021880B (zh) * 2011-09-22 2015-07-08 株式会社东芝 半导体装置的制造方法
JP6320239B2 (ja) * 2013-09-24 2018-05-09 日東電工株式会社 半導体チップ封止用熱硬化性樹脂シート及び半導体パッケージの製造方法
CN105990304A (zh) * 2015-02-25 2016-10-05 扬智科技股份有限公司 芯片封装结构及其制造方法

Also Published As

Publication number Publication date
CN1681097A (zh) 2005-10-12
TW200534409A (en) 2005-10-16
JP2005302971A (ja) 2005-10-27

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Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees