TW354856B - Semiconductor chip package having combined structure of lead-on-chip leads on chip leads and standard normal leads - Google Patents
Semiconductor chip package having combined structure of lead-on-chip leads on chip leads and standard normal leadsInfo
- Publication number
- TW354856B TW354856B TW086115443A TW86115443A TW354856B TW 354856 B TW354856 B TW 354856B TW 086115443 A TW086115443 A TW 086115443A TW 86115443 A TW86115443 A TW 86115443A TW 354856 B TW354856 B TW 354856B
- Authority
- TW
- Taiwan
- Prior art keywords
- leads
- chip
- semiconductor chip
- active surface
- lead
- Prior art date
Links
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
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- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H01L2924/01006—Carbon [C]
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- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
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- H01L2924/0105—Tin [Sn]
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- H01L2924/01082—Lead [Pb]
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- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR19970006505 | 1997-02-28 | ||
KR1019970037789A KR100227120B1 (ko) | 1997-02-28 | 1997-08-07 | 엘오씨(loc)리드와 표준형 리드가 복합된 구조를 갖는 반도체 칩 패키지 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW354856B true TW354856B (en) | 1999-03-21 |
Family
ID=26632543
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086115443A TW354856B (en) | 1997-02-28 | 1997-10-20 | Semiconductor chip package having combined structure of lead-on-chip leads on chip leads and standard normal leads |
Country Status (6)
Country | Link |
---|---|
JP (1) | JP2981194B2 (de) |
KR (1) | KR100227120B1 (de) |
CN (1) | CN1114948C (de) |
DE (1) | DE19749539B4 (de) |
FR (1) | FR2760289B1 (de) |
TW (1) | TW354856B (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100401536B1 (ko) * | 1997-12-31 | 2004-01-24 | 주식회사 하이닉스반도체 | 센터 패드형 반도체 칩을 퍼리퍼럴 패드형 반도체 칩으로 변경하는 방법 |
JP2002076233A (ja) | 2000-09-04 | 2002-03-15 | Mitsubishi Electric Corp | 半導体装置 |
DE10158770B4 (de) | 2001-11-29 | 2006-08-03 | Infineon Technologies Ag | Leiterrahmen und Bauelement mit einem Leiterrahmen |
KR100525091B1 (ko) * | 2001-12-28 | 2005-11-02 | 주식회사 하이닉스반도체 | 반도체 패키지 |
JP4222920B2 (ja) | 2003-10-01 | 2009-02-12 | 株式会社ルネサステクノロジ | 半導体装置 |
KR100654338B1 (ko) * | 2003-10-04 | 2006-12-07 | 삼성전자주식회사 | 테이프 배선 기판과 그를 이용한 반도체 칩 패키지 |
JP6698306B2 (ja) * | 2015-09-29 | 2020-05-27 | 株式会社巴川製紙所 | リードフレーム固定用接着テープ |
CN110931420A (zh) * | 2019-11-19 | 2020-03-27 | 苏州日月新半导体有限公司 | 一种加热块单元及加热装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06105721B2 (ja) * | 1985-03-25 | 1994-12-21 | 日立超エル・エス・アイエンジニアリング株式会社 | 半導体装置 |
JP2748940B2 (ja) * | 1989-06-05 | 1998-05-13 | 株式会社日立製作所 | 樹脂封止型半導体装置 |
JPH01276656A (ja) * | 1988-04-27 | 1989-11-07 | Mitsubishi Electric Corp | 樹脂封止型半導体装置 |
JPH02132848A (ja) * | 1988-11-14 | 1990-05-22 | Nec Corp | 半導体装置 |
JPH04372161A (ja) * | 1991-06-21 | 1992-12-25 | Mitsubishi Electric Corp | 半導体装置 |
KR100276781B1 (ko) * | 1992-02-03 | 2001-01-15 | 비센트 비. 인그라시아 | 리드-온-칩 반도체장치 및 그 제조방법 |
JP2677737B2 (ja) * | 1992-06-24 | 1997-11-17 | 株式会社東芝 | 半導体装置 |
US5545920A (en) * | 1994-09-13 | 1996-08-13 | Texas Instruments Incorporated | Leadframe-over-chip having off-chip conducting leads for increased bond pad connectivity |
-
1997
- 1997-08-07 KR KR1019970037789A patent/KR100227120B1/ko not_active IP Right Cessation
- 1997-10-20 TW TW086115443A patent/TW354856B/zh not_active IP Right Cessation
- 1997-11-07 FR FR9714045A patent/FR2760289B1/fr not_active Expired - Fee Related
- 1997-11-07 CN CN97121615A patent/CN1114948C/zh not_active Expired - Fee Related
- 1997-11-08 DE DE19749539A patent/DE19749539B4/de not_active Expired - Fee Related
- 1997-11-17 JP JP9314876A patent/JP2981194B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100227120B1 (ko) | 1999-10-15 |
JPH10242373A (ja) | 1998-09-11 |
CN1192048A (zh) | 1998-09-02 |
CN1114948C (zh) | 2003-07-16 |
KR19980069880A (ko) | 1998-10-26 |
JP2981194B2 (ja) | 1999-11-22 |
DE19749539A1 (de) | 1998-09-10 |
FR2760289B1 (fr) | 2002-08-30 |
DE19749539B4 (de) | 2006-04-13 |
FR2760289A1 (fr) | 1998-09-04 |
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MM4A | Annulment or lapse of patent due to non-payment of fees |