TW280890B - - Google Patents
Info
- Publication number
- TW280890B TW280890B TW083102642A TW83102642A TW280890B TW 280890 B TW280890 B TW 280890B TW 083102642 A TW083102642 A TW 083102642A TW 83102642 A TW83102642 A TW 83102642A TW 280890 B TW280890 B TW 280890B
- Authority
- TW
- Taiwan
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17356—Indirect interconnection networks
- G06F15/17368—Indirect interconnection networks non hierarchical topologies
- G06F15/17381—Two dimensional, e.g. mesh, torus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/8023—Two dimensional arrays, e.g. mesh, torus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8053—Vector processors
- G06F15/8092—Array of vector units
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/445—Exploiting fine grain parallelism, i.e. parallelism at instruction level
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/447—Target code generation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
- G06F9/30014—Arithmetic instructions with variable precision
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30065—Loop control instructions; iterative instructions, e.g. LOOP, REPEAT
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30079—Pipeline control instructions, e.g. multicycle NOP
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30083—Power or thermal control instructions
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30094—Condition code generation, e.g. Carry, Zero flag
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30116—Shadow registers, e.g. coupled registers, not forming part of the register space
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3812—Instruction prefetching with instruction modification, e.g. store into instruction stream
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
- G06F9/38873—Iterative single instructions for multiple data lanes [SIMD]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49905—Exception handling
- G06F7/4991—Overflow or underflow
- G06F7/49921—Saturation, i.e. clipping the result to a minimum or maximum value
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biomedical Technology (AREA)
- Biophysics (AREA)
- Multimedia (AREA)
- Evolutionary Computation (AREA)
- Artificial Intelligence (AREA)
- Computational Linguistics (AREA)
- Data Mining & Analysis (AREA)
- Neurology (AREA)
- General Health & Medical Sciences (AREA)
- Molecular Biology (AREA)
- Complex Calculations (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
- Multi Processors (AREA)
- Devices For Executing Special Programs (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/040,779 US5717947A (en) | 1993-03-31 | 1993-03-31 | Data processing system and method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
TW280890B true TW280890B (zh) | 1996-07-11 |
Family
ID=21912891
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW083102642A TW280890B (zh) | 1993-03-31 | 1994-03-25 |
Country Status (6)
Country | Link |
---|---|
US (18) | US5717947A (zh) |
EP (1) | EP0619557A3 (zh) |
JP (2) | JPH0773149A (zh) |
KR (1) | KR940022257A (zh) |
CN (1) | CN1080906C (zh) |
TW (1) | TW280890B (zh) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI417798B (zh) * | 2008-11-21 | 2013-12-01 | Nat Taipei University Oftechnology | High - speed reverse transfer neural network system with elastic structure and learning function |
US9489196B2 (en) | 2011-12-23 | 2016-11-08 | Intel Corporation | Multi-element instruction with different read and write masks |
US9507593B2 (en) | 2011-12-23 | 2016-11-29 | Intel Corporation | Instruction for element offset calculation in a multi-dimensional array |
TWI587137B (zh) * | 2014-12-15 | 2017-06-11 | 英特爾公司 | 經改良之單一指令多重資料(simd)的k最近鄰居法之實施技術 |
US9996350B2 (en) | 2014-12-27 | 2018-06-12 | Intel Corporation | Hardware apparatuses and methods to prefetch a multidimensional block of elements from a multidimensional array |
Families Citing this family (187)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5354695A (en) * | 1992-04-08 | 1994-10-11 | Leedy Glenn J | Membrane dielectric isolation IC fabrication |
US5717947A (en) * | 1993-03-31 | 1998-02-10 | Motorola, Inc. | Data processing system and method thereof |
AU2821395A (en) * | 1994-06-29 | 1996-01-25 | Intel Corporation | Processor that indicates system bus ownership in an upgradable multiprocessor computer system |
WO1996017291A1 (en) | 1994-12-02 | 1996-06-06 | Intel Corporation | Microprocessor with packing operation of composite operands |
CN103455304B (zh) * | 1995-08-31 | 2016-04-27 | 英特尔公司 | 用于处理指令集的处理器 |
US5872947A (en) * | 1995-10-24 | 1999-02-16 | Advanced Micro Devices, Inc. | Instruction classification circuit configured to classify instructions into a plurality of instruction types prior to decoding said instructions |
US5822559A (en) * | 1996-01-02 | 1998-10-13 | Advanced Micro Devices, Inc. | Apparatus and method for aligning variable byte-length instructions to a plurality of issue positions |
US5727229A (en) * | 1996-02-05 | 1998-03-10 | Motorola, Inc. | Method and apparatus for moving data in a parallel processor |
JP2904099B2 (ja) * | 1996-02-19 | 1999-06-14 | 日本電気株式会社 | コンパイル装置およびコンパイル方法 |
US5867680A (en) * | 1996-07-24 | 1999-02-02 | Advanced Micro Devices, Inc. | Microprocessor configured to simultaneously dispatch microcode and directly-decoded instructions |
US6049863A (en) * | 1996-07-24 | 2000-04-11 | Advanced Micro Devices, Inc. | Predecoding technique for indicating locations of opcode bytes in variable byte-length instructions within a superscalar microprocessor |
EP1306752A1 (en) * | 1996-11-29 | 2003-05-02 | Matsushita Electric Industrial Co., Ltd. | Processor which can favourably execute a rounding process |
KR100366689B1 (ko) | 1996-12-19 | 2003-01-06 | 하이닉스 세미컨덕터 아메리카 인코포레이티드 | 비디오 프레임 렌더링 엔진 |
US6112291A (en) * | 1997-01-24 | 2000-08-29 | Texas Instruments Incorporated | Method and apparatus for performing a shift instruction with saturate by examination of an operand prior to shifting |
US6551857B2 (en) | 1997-04-04 | 2003-04-22 | Elm Technology Corporation | Three dimensional structure integrated circuits |
US6430589B1 (en) | 1997-06-20 | 2002-08-06 | Hynix Semiconductor, Inc. | Single precision array processor |
US6044392A (en) * | 1997-08-04 | 2000-03-28 | Motorola, Inc. | Method and apparatus for performing rounding in a data processor |
US5864703A (en) * | 1997-10-09 | 1999-01-26 | Mips Technologies, Inc. | Method for providing extended precision in SIMD vector arithmetic operations |
US7197625B1 (en) * | 1997-10-09 | 2007-03-27 | Mips Technologies, Inc. | Alignment and ordering of vector elements for single instruction multiple data processing |
FR2772949B1 (fr) * | 1997-12-19 | 2000-02-18 | Sgs Thomson Microelectronics | Partage de l'adressage indirect des registres d'un peripherique dedie a l'emulation |
US6366999B1 (en) * | 1998-01-28 | 2002-04-02 | Bops, Inc. | Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution |
JPH11282683A (ja) * | 1998-03-26 | 1999-10-15 | Omron Corp | エージェントシステム |
JPH11338844A (ja) * | 1998-05-22 | 1999-12-10 | Nec Corp | 発火数制御型神経回路装置 |
US6282634B1 (en) * | 1998-05-27 | 2001-08-28 | Arm Limited | Apparatus and method for processing data having a mixed vector/scalar register file |
JP5052713B2 (ja) * | 1998-10-09 | 2012-10-17 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 条件付き命令を備えるベクトルデータプロセッサ |
US6574665B1 (en) * | 1999-02-26 | 2003-06-03 | Lucent Technologies Inc. | Hierarchical vector clock |
US6308253B1 (en) * | 1999-03-31 | 2001-10-23 | Sony Corporation | RISC CPU instructions particularly suited for decoding digital signal processing applications |
US20080007562A1 (en) * | 1999-04-09 | 2008-01-10 | Dave Stuttard | Parallel data processing apparatus |
US20080162874A1 (en) * | 1999-04-09 | 2008-07-03 | Dave Stuttard | Parallel data processing apparatus |
US8174530B2 (en) * | 1999-04-09 | 2012-05-08 | Rambus Inc. | Parallel date processing apparatus |
AU3829500A (en) * | 1999-04-09 | 2000-11-14 | Clearspeed Technology Limited | Parallel data processing apparatus |
US7526630B2 (en) | 1999-04-09 | 2009-04-28 | Clearspeed Technology, Plc | Parallel data processing apparatus |
US8762691B2 (en) * | 1999-04-09 | 2014-06-24 | Rambus Inc. | Memory access consolidation for SIMD processing elements using transaction identifiers |
US7966475B2 (en) | 1999-04-09 | 2011-06-21 | Rambus Inc. | Parallel data processing apparatus |
US7802079B2 (en) * | 1999-04-09 | 2010-09-21 | Clearspeed Technology Limited | Parallel data processing apparatus |
US20070242074A1 (en) * | 1999-04-09 | 2007-10-18 | Dave Stuttard | Parallel data processing apparatus |
US8171263B2 (en) * | 1999-04-09 | 2012-05-01 | Rambus Inc. | Data processing apparatus comprising an array controller for separating an instruction stream processing instructions and data transfer instructions |
US20080184017A1 (en) * | 1999-04-09 | 2008-07-31 | Dave Stuttard | Parallel data processing apparatus |
US7627736B2 (en) * | 1999-04-09 | 2009-12-01 | Clearspeed Technology Plc | Thread manager to control an array of processing elements |
US7506136B2 (en) * | 1999-04-09 | 2009-03-17 | Clearspeed Technology Plc | Parallel data processing apparatus |
US8169440B2 (en) * | 1999-04-09 | 2012-05-01 | Rambus Inc. | Parallel data processing apparatus |
US20080008393A1 (en) * | 1999-04-09 | 2008-01-10 | Dave Stuttard | Parallel data processing apparatus |
US20070294510A1 (en) * | 1999-04-09 | 2007-12-20 | Dave Stuttard | Parallel data processing apparatus |
GB2348982A (en) * | 1999-04-09 | 2000-10-18 | Pixelfusion Ltd | Parallel data processing system |
US20080016318A1 (en) * | 1999-04-09 | 2008-01-17 | Dave Stuttard | Parallel data processing apparatus |
DE60012661T2 (de) * | 1999-05-19 | 2005-08-04 | Koninklijke Philips Electronics N.V. | Datenprozessor mit fehlerbeseitigungsschaltung |
US7401205B1 (en) * | 1999-08-13 | 2008-07-15 | Mips Technologies, Inc. | High performance RISC instruction set digital signal processor having circular buffer and looping controls |
US6438664B1 (en) | 1999-10-27 | 2002-08-20 | Advanced Micro Devices, Inc. | Microcode patch device and method for patching microcode using match registers and patch routines |
JP2001175933A (ja) * | 1999-12-15 | 2001-06-29 | Sanden Corp | 自動販売機の制御プログラム書換システム及び自動販売機の制御装置 |
DE10001874A1 (de) * | 2000-01-18 | 2001-07-19 | Infineon Technologies Ag | Multi-Master-Bus-System |
US7191310B2 (en) * | 2000-01-19 | 2007-03-13 | Ricoh Company, Ltd. | Parallel processor and image processing apparatus adapted for nonlinear processing through selection via processor element numbers |
US6665790B1 (en) * | 2000-02-29 | 2003-12-16 | International Business Machines Corporation | Vector register file with arbitrary vector addressing |
US6968469B1 (en) | 2000-06-16 | 2005-11-22 | Transmeta Corporation | System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored |
WO2002007000A2 (en) | 2000-07-13 | 2002-01-24 | The Belo Company | System and method for associating historical information with sensory data and distribution thereof |
US6606614B1 (en) * | 2000-08-24 | 2003-08-12 | Silicon Recognition, Inc. | Neural network integrated circuit with fewer pins |
DE10102202A1 (de) * | 2001-01-18 | 2002-08-08 | Infineon Technologies Ag | Mikroprozessorschaltung für tragbare Datenträger |
US7181484B2 (en) * | 2001-02-21 | 2007-02-20 | Mips Technologies, Inc. | Extended-precision accumulation of multiplier output |
US7162621B2 (en) | 2001-02-21 | 2007-01-09 | Mips Technologies, Inc. | Virtual instruction expansion based on template and parameter selector information specifying sign-extension or concentration |
US7711763B2 (en) * | 2001-02-21 | 2010-05-04 | Mips Technologies, Inc. | Microprocessor instructions for performing polynomial arithmetic operations |
US7599981B2 (en) | 2001-02-21 | 2009-10-06 | Mips Technologies, Inc. | Binary polynomial multiplier |
CA2344098A1 (fr) * | 2001-04-12 | 2002-10-12 | Serge Glories | Systeme de processeur modulaire a elements configurables et intereliables permettant de realiser de multiples calculs paralleles sur du signal ou des donnees brutes |
US7155496B2 (en) * | 2001-05-15 | 2006-12-26 | Occam Networks | Configuration management utilizing generalized markup language |
US7685508B2 (en) * | 2001-05-15 | 2010-03-23 | Occam Networks | Device monitoring via generalized markup language |
US6725233B2 (en) | 2001-05-15 | 2004-04-20 | Occam Networks | Generic interface for system and application management |
US6666383B2 (en) | 2001-05-31 | 2003-12-23 | Koninklijke Philips Electronics N.V. | Selective access to multiple registers having a common name |
US7088731B2 (en) * | 2001-06-01 | 2006-08-08 | Dune Networks | Memory management for packet switching device |
WO2003003197A2 (en) * | 2001-06-28 | 2003-01-09 | Oak Technology, Inc. | System-on-a-chip controller |
US7007058B1 (en) | 2001-07-06 | 2006-02-28 | Mercury Computer Systems, Inc. | Methods and apparatus for binary division using look-up table |
US7027446B2 (en) * | 2001-07-18 | 2006-04-11 | P-Cube Ltd. | Method and apparatus for set intersection rule matching |
GB2382887B (en) * | 2001-10-31 | 2005-09-28 | Alphamosaic Ltd | Instruction execution in a processor |
US7278137B1 (en) | 2001-12-26 | 2007-10-02 | Arc International | Methods and apparatus for compiling instructions for a data processor |
US7000226B2 (en) * | 2002-01-02 | 2006-02-14 | Intel Corporation | Exception masking in binary translation |
US7349992B2 (en) * | 2002-01-24 | 2008-03-25 | Emulex Design & Manufacturing Corporation | System for communication with a storage area network |
US6934787B2 (en) * | 2002-02-22 | 2005-08-23 | Broadcom Corporation | Adaptable switch architecture that is independent of media types |
US7159099B2 (en) * | 2002-06-28 | 2007-01-02 | Motorola, Inc. | Streaming vector processor with reconfigurable interconnection switch |
US7415601B2 (en) * | 2002-06-28 | 2008-08-19 | Motorola, Inc. | Method and apparatus for elimination of prolog and epilog instructions in a vector processor using data validity tags and sink counters |
US7140019B2 (en) * | 2002-06-28 | 2006-11-21 | Motorola, Inc. | Scheduler of program instructions for streaming vector processor having interconnected functional units |
US7402897B2 (en) | 2002-08-08 | 2008-07-22 | Elm Technology Corporation | Vertical system integration |
US7231552B2 (en) * | 2002-10-24 | 2007-06-12 | Intel Corporation | Method and apparatus for independent control of devices under test connected in parallel |
US20040098568A1 (en) * | 2002-11-18 | 2004-05-20 | Nguyen Hung T. | Processor having a unified register file with multipurpose registers for storing address and data register values, and associated register mapping method |
US6912646B1 (en) * | 2003-01-06 | 2005-06-28 | Xilinx, Inc. | Storing and selecting multiple data streams in distributed memory devices |
WO2004073551A2 (en) * | 2003-02-18 | 2004-09-02 | Massachusetts Eye And Ear Infirmary | Transscleral drug delivery device and related methods |
US20040215924A1 (en) * | 2003-04-28 | 2004-10-28 | Collard Jean-Francois C. | Analyzing stored data |
US7191432B2 (en) * | 2003-06-05 | 2007-03-13 | International Business Machines Corporation | High frequency compound instruction mechanism and method for a compare operation in an arithmetic logic unit |
CN100472505C (zh) * | 2003-08-15 | 2009-03-25 | Nxp股份有限公司 | 并行处理阵列 |
US20050043872A1 (en) * | 2003-08-21 | 2005-02-24 | Detlef Heyn | Control system for a functional unit in a motor vehicle |
US7290122B2 (en) * | 2003-08-29 | 2007-10-30 | Motorola, Inc. | Dataflow graph compression for power reduction in a vector processor |
US7610466B2 (en) * | 2003-09-05 | 2009-10-27 | Freescale Semiconductor, Inc. | Data processing system using independent memory and register operand size specifiers and method thereof |
US7315932B2 (en) * | 2003-09-08 | 2008-01-01 | Moyer William C | Data processing system having instruction specifiers for SIMD register operands and method thereof |
US7107436B2 (en) * | 2003-09-08 | 2006-09-12 | Freescale Semiconductor, Inc. | Conditional next portion transferring of data stream to or from register based on subsequent instruction aspect |
US7275148B2 (en) * | 2003-09-08 | 2007-09-25 | Freescale Semiconductor, Inc. | Data processing system using multiple addressing modes for SIMD operations and method thereof |
US7818729B1 (en) * | 2003-09-15 | 2010-10-19 | Thomas Plum | Automated safe secure techniques for eliminating undefined behavior in computer software |
WO2005037326A2 (en) * | 2003-10-13 | 2005-04-28 | Clearspeed Technology Plc | Unified simd processor |
US7526691B1 (en) * | 2003-10-15 | 2009-04-28 | Marvell International Ltd. | System and method for using TAP controllers |
EP1544631B1 (en) | 2003-12-17 | 2007-06-20 | STMicroelectronics Limited | Reset mode for scan test modes |
JP4502650B2 (ja) * | 2004-02-03 | 2010-07-14 | 日本電気株式会社 | アレイ型プロセッサ |
JP4728581B2 (ja) * | 2004-02-03 | 2011-07-20 | 日本電気株式会社 | アレイ型プロセッサ |
JP4547198B2 (ja) * | 2004-06-30 | 2010-09-22 | 富士通株式会社 | 演算装置、演算装置の制御方法、プログラム及びコンピュータ読取り可能記録媒体 |
US20060095714A1 (en) * | 2004-11-03 | 2006-05-04 | Stexar Corporation | Clip instruction for processor |
US7650542B2 (en) * | 2004-12-16 | 2010-01-19 | Broadcom Corporation | Method and system of using a single EJTAG interface for multiple tap controllers |
US7370136B2 (en) * | 2005-01-26 | 2008-05-06 | Stmicroelectronics, Inc. | Efficient and flexible sequencing of data processing units extending VLIW architecture |
US7873947B1 (en) * | 2005-03-17 | 2011-01-18 | Arun Lakhotia | Phylogeny generation |
US20060218377A1 (en) * | 2005-03-24 | 2006-09-28 | Stexar Corporation | Instruction with dual-use source providing both an operand value and a control value |
CN100552622C (zh) * | 2005-03-31 | 2009-10-21 | 松下电器产业株式会社 | 运算处理装置 |
US7757048B2 (en) * | 2005-04-29 | 2010-07-13 | Mtekvision Co., Ltd. | Data processor apparatus and memory interface |
US7805709B2 (en) * | 2005-05-27 | 2010-09-28 | Delphi Technologies, Inc. | System and method for bypassing execution of an algorithm |
US7543136B1 (en) * | 2005-07-13 | 2009-06-02 | Nvidia Corporation | System and method for managing divergent threads using synchronization tokens and program instructions that include set-synchronization bits |
KR20080080138A (ko) * | 2005-11-21 | 2008-09-02 | 퍼듀 퍼머 엘피 | 4-옥사디아졸릴-피페리딘 화합물 및 이의 용도 |
US7404065B2 (en) * | 2005-12-21 | 2008-07-22 | Intel Corporation | Flow optimization and prediction for VSSE memory operations |
US7602399B2 (en) * | 2006-03-15 | 2009-10-13 | Ati Technologies Ulc | Method and apparatus for generating a pixel using a conditional IF—NEIGHBOR command |
US7676647B2 (en) * | 2006-08-18 | 2010-03-09 | Qualcomm Incorporated | System and method of processing data using scalar/vector instructions |
CN101606406B (zh) * | 2007-02-09 | 2013-04-17 | 诺基亚公司 | 用于专用/家用网络的禁用跟踪区域优化 |
US8917165B2 (en) * | 2007-03-08 | 2014-12-23 | The Mitre Corporation | RFID tag detection and re-personalization |
JP4913685B2 (ja) * | 2007-07-04 | 2012-04-11 | 株式会社リコー | Simd型マイクロプロセッサおよびsimd型マイクロプロセッサの制御方法 |
US8131909B1 (en) | 2007-09-19 | 2012-03-06 | Agate Logic, Inc. | System and method of signal processing engines with programmable logic fabric |
US7970979B1 (en) * | 2007-09-19 | 2011-06-28 | Agate Logic, Inc. | System and method of configurable bus-based dedicated connection circuits |
FR2922663B1 (fr) * | 2007-10-23 | 2010-03-05 | Commissariat Energie Atomique | Structure et procede de sauvegarde et de restitution de donnees |
US7945768B2 (en) * | 2008-06-05 | 2011-05-17 | Motorola Mobility, Inc. | Method and apparatus for nested instruction looping using implicit predicates |
US8527742B2 (en) * | 2008-08-15 | 2013-09-03 | Apple Inc. | Processing vectors using wrapping add and subtract instructions in the macroscalar architecture |
US8549265B2 (en) | 2008-08-15 | 2013-10-01 | Apple Inc. | Processing vectors using wrapping shift instructions in the macroscalar architecture |
US8539205B2 (en) | 2008-08-15 | 2013-09-17 | Apple Inc. | Processing vectors using wrapping multiply and divide instructions in the macroscalar architecture |
US9342304B2 (en) | 2008-08-15 | 2016-05-17 | Apple Inc. | Processing vectors using wrapping increment and decrement instructions in the macroscalar architecture |
US8555037B2 (en) | 2008-08-15 | 2013-10-08 | Apple Inc. | Processing vectors using wrapping minima and maxima instructions in the macroscalar architecture |
US8417921B2 (en) * | 2008-08-15 | 2013-04-09 | Apple Inc. | Running-min and running-max instructions for processing vectors using a base value from a key element of an input vector |
US9335997B2 (en) | 2008-08-15 | 2016-05-10 | Apple Inc. | Processing vectors using a wrapping rotate previous instruction in the macroscalar architecture |
US9335980B2 (en) | 2008-08-15 | 2016-05-10 | Apple Inc. | Processing vectors using wrapping propagate instructions in the macroscalar architecture |
US8447956B2 (en) * | 2008-08-15 | 2013-05-21 | Apple Inc. | Running subtract and running divide instructions for processing vectors |
US8560815B2 (en) | 2008-08-15 | 2013-10-15 | Apple Inc. | Processing vectors using wrapping boolean instructions in the macroscalar architecture |
US8583904B2 (en) | 2008-08-15 | 2013-11-12 | Apple Inc. | Processing vectors using wrapping negation instructions in the macroscalar architecture |
JP5321806B2 (ja) * | 2009-01-13 | 2013-10-23 | 株式会社リコー | 画像形成装置の操作装置及び画像形成装置 |
US8832403B2 (en) | 2009-11-13 | 2014-09-09 | International Business Machines Corporation | Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses |
GB2480285A (en) * | 2010-05-11 | 2011-11-16 | Advanced Risc Mach Ltd | Conditional compare instruction which sets a condition code when it is not executed |
US8693788B2 (en) * | 2010-08-06 | 2014-04-08 | Mela Sciences, Inc. | Assessing features for classification |
US9141386B2 (en) * | 2010-09-24 | 2015-09-22 | Intel Corporation | Vector logical reduction operation implemented using swizzling on a semiconductor chip |
GB2484729A (en) * | 2010-10-22 | 2012-04-25 | Advanced Risc Mach Ltd | Exception control in a multiprocessor system |
RU2010145507A (ru) * | 2010-11-10 | 2012-05-20 | ЭлЭсАй Корпорейшн (US) | Устройство и способ управления микрокомандами без задержки |
CN103002276B (zh) * | 2011-03-31 | 2017-10-03 | Vixs***公司 | 多格式视频解码器及解码方法 |
US9946665B2 (en) * | 2011-05-13 | 2018-04-17 | Melange Systems Private Limited | Fetch less instruction processing (FLIP) computer architecture for central processing units (CPU) |
CN104025025B (zh) | 2011-12-28 | 2018-08-28 | 英特尔公司 | 用于对打包数据元素执行增量编码的***、装置和方法 |
WO2013100989A1 (en) * | 2011-12-28 | 2013-07-04 | Intel Corporation | Systems, apparatuses, and methods for performing delta decoding on packed data elements |
US20130227190A1 (en) * | 2012-02-27 | 2013-08-29 | Raytheon Company | High Data-Rate Processing System |
US20160364643A1 (en) * | 2012-03-08 | 2016-12-15 | Hrl Laboratories Llc | Scalable integrated circuit with synaptic electronics and cmos integrated memristors |
US9389860B2 (en) | 2012-04-02 | 2016-07-12 | Apple Inc. | Prediction optimizations for Macroscalar vector partitioning loops |
US8849885B2 (en) * | 2012-06-07 | 2014-09-30 | Via Technologies, Inc. | Saturation detector |
KR102021777B1 (ko) * | 2012-11-29 | 2019-09-17 | 삼성전자주식회사 | 병렬 처리를 위한 재구성형 프로세서 및 재구성형 프로세서의 동작 방법 |
US9558003B2 (en) * | 2012-11-29 | 2017-01-31 | Samsung Electronics Co., Ltd. | Reconfigurable processor for parallel processing and operation method of the reconfigurable processor |
CN103914426B (zh) * | 2013-01-06 | 2016-12-28 | 中兴通讯股份有限公司 | 一种多线程处理基带信号的方法及装置 |
US9348589B2 (en) | 2013-03-19 | 2016-05-24 | Apple Inc. | Enhanced predicate registers having predicates corresponding to element widths |
US9817663B2 (en) | 2013-03-19 | 2017-11-14 | Apple Inc. | Enhanced Macroscalar predicate operations |
US20150052330A1 (en) * | 2013-08-14 | 2015-02-19 | Qualcomm Incorporated | Vector arithmetic reduction |
US11501143B2 (en) * | 2013-10-11 | 2022-11-15 | Hrl Laboratories, Llc | Scalable integrated circuit with synaptic electronics and CMOS integrated memristors |
FR3015068B1 (fr) * | 2013-12-18 | 2016-01-01 | Commissariat Energie Atomique | Module de traitement du signal, notamment pour reseau de neurones et circuit neuronal |
US20150269480A1 (en) * | 2014-03-21 | 2015-09-24 | Qualcomm Incorporated | Implementing a neural-network processor |
EP3215812B1 (en) | 2014-12-29 | 2020-10-07 | Concentric Meter Corporation | Fluid parameter sensor and meter |
US10789071B2 (en) * | 2015-07-08 | 2020-09-29 | Intel Corporation | Dynamic thread splitting having multiple instruction pointers for the same thread |
US10419501B2 (en) * | 2015-12-03 | 2019-09-17 | Futurewei Technologies, Inc. | Data streaming unit and method for operating the data streaming unit |
WO2017168706A1 (ja) * | 2016-03-31 | 2017-10-05 | 三菱電機株式会社 | ユニット及び制御システム |
CN111651203B (zh) * | 2016-04-26 | 2024-05-07 | 中科寒武纪科技股份有限公司 | 一种用于执行向量四则运算的装置和方法 |
TWI627860B (zh) * | 2016-05-31 | 2018-06-21 | 晨星半導體股份有限公司 | 影音處理裝置與方法 |
US10147035B2 (en) | 2016-06-30 | 2018-12-04 | Hrl Laboratories, Llc | Neural integrated circuit with biological behaviors |
US10379854B2 (en) * | 2016-12-22 | 2019-08-13 | Intel Corporation | Processor instructions for determining two minimum and two maximum values |
KR20180080463A (ko) * | 2017-01-04 | 2018-07-12 | 삼성전자주식회사 | 반도체 장치 및 반도체 장치의 동작 방법 |
CN107423816B (zh) * | 2017-03-24 | 2021-10-12 | 中国科学院计算技术研究所 | 一种多计算精度神经网络处理方法和*** |
US11893393B2 (en) | 2017-07-24 | 2024-02-06 | Tesla, Inc. | Computational array microprocessor system with hardware arbiter managing memory requests |
US11157441B2 (en) | 2017-07-24 | 2021-10-26 | Tesla, Inc. | Computational array microprocessor system using non-consecutive data formatting |
US11157287B2 (en) | 2017-07-24 | 2021-10-26 | Tesla, Inc. | Computational array microprocessor system with variable latency memory access |
US10671349B2 (en) | 2017-07-24 | 2020-06-02 | Tesla, Inc. | Accelerated mathematical engine |
US11409692B2 (en) | 2017-07-24 | 2022-08-09 | Tesla, Inc. | Vector computational unit |
CN109754061B (zh) * | 2017-11-07 | 2023-11-24 | 上海寒武纪信息科技有限公司 | 卷积扩展指令的执行方法以及相关产品 |
WO2019112959A1 (en) | 2017-12-04 | 2019-06-13 | Optinum Semiconductor Technologies, Inc. | System and architecture of neural network accelerator |
CN108153190B (zh) * | 2017-12-20 | 2020-05-05 | 新大陆数字技术股份有限公司 | 一种人工智能微处理器 |
CN109416757B (zh) * | 2017-12-29 | 2022-05-03 | 深圳市大疆创新科技有限公司 | 用于处理数值数据的方法、设备和计算机可读存储介质 |
US11561791B2 (en) | 2018-02-01 | 2023-01-24 | Tesla, Inc. | Vector computational unit receiving data elements in parallel from a last row of a computational array |
CN110059809B (zh) * | 2018-10-10 | 2020-01-17 | 中科寒武纪科技股份有限公司 | 一种计算装置及相关产品 |
WO2020183396A1 (en) * | 2019-03-11 | 2020-09-17 | Untether Ai Corporation | Computational memory |
US20220171829A1 (en) | 2019-03-11 | 2022-06-02 | Untether Ai Corporation | Computational memory |
CN110609706B (zh) * | 2019-06-13 | 2022-02-22 | 眸芯科技(上海)有限公司 | 配置寄存器的方法及应用 |
US11604972B2 (en) | 2019-06-28 | 2023-03-14 | Microsoft Technology Licensing, Llc | Increased precision neural processing element |
CN112241613B (zh) * | 2019-07-19 | 2023-12-29 | 瑞昱半导体股份有限公司 | 检测电路的引脚关联性的方法及其计算机处理*** |
WO2021040684A1 (en) * | 2019-08-26 | 2021-03-04 | Hewlett-Packard Development Company, L.P. | Centralized access control of input-output resources |
US11342944B2 (en) | 2019-09-23 | 2022-05-24 | Untether Ai Corporation | Computational memory with zero disable and error detection |
CN110908716B (zh) * | 2019-11-14 | 2022-02-08 | 中国人民解放军国防科技大学 | 一种向量聚合装载指令的实现方法 |
CN113011577B (zh) * | 2019-12-20 | 2024-01-05 | 阿里巴巴集团控股有限公司 | 处理单元、处理器核、神经网络训练机及方法 |
CN113033791B (zh) * | 2019-12-24 | 2024-04-05 | 中科寒武纪科技股份有限公司 | 用于保序的计算装置、集成电路装置、板卡及保序方法 |
US11468002B2 (en) | 2020-02-28 | 2022-10-11 | Untether Ai Corporation | Computational memory with cooperation among rows of processing elements and memory thereof |
US11309023B1 (en) * | 2020-11-06 | 2022-04-19 | Micron Technology, Inc. | Memory cycling tracking for threshold voltage variation systems and methods |
US11182160B1 (en) | 2020-11-24 | 2021-11-23 | Nxp Usa, Inc. | Generating source and destination addresses for repeated accelerator instruction |
Family Cites Families (112)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB211387A (en) * | 1923-05-22 | 1924-02-21 | Joseph William Guimont | Improvements in and relating to radiators for heating buildings and the like |
US3287703A (en) * | 1962-12-04 | 1966-11-22 | Westinghouse Electric Corp | Computer |
FR1416562A (fr) * | 1964-09-25 | 1965-11-05 | Constr Telephoniques | Système de traitement de données simplifié |
US3665402A (en) * | 1970-02-16 | 1972-05-23 | Sanders Associates Inc | Computer addressing apparatus |
JPS4871547A (zh) * | 1971-12-27 | 1973-09-27 | Hitachi Ltd | |
US3744034A (en) * | 1972-01-27 | 1973-07-03 | Perkin Elmer Corp | Method and apparatus for providing a security system for a computer |
US4075679A (en) * | 1975-12-08 | 1978-02-21 | Hewlett-Packard Company | Programmable calculator |
US4437156A (en) * | 1975-12-08 | 1984-03-13 | Hewlett-Packard Company | Programmable calculator |
US4180854A (en) * | 1977-09-29 | 1979-12-25 | Hewlett-Packard Company | Programmable calculator having string variable editing capability |
US4270170A (en) * | 1978-05-03 | 1981-05-26 | International Computers Limited | Array processor |
US4244024A (en) * | 1978-08-10 | 1981-01-06 | Hewlett-Packard Company | Spectrum analyzer having enterable offsets and automatic display zoom |
US4514804A (en) * | 1981-11-25 | 1985-04-30 | Nippon Electric Co., Ltd. | Information handling apparatus having a high speed instruction-executing function |
JPS58114274A (ja) * | 1981-12-28 | 1983-07-07 | Hitachi Ltd | デ−タ処理装置 |
US4463445A (en) * | 1982-01-07 | 1984-07-31 | Bell Telephone Laboratories, Incorporated | Circuitry for allocating access to a demand-shared bus |
US4470112A (en) * | 1982-01-07 | 1984-09-04 | Bell Telephone Laboratories, Incorporated | Circuitry for allocating access to a demand-shared bus |
US4488218A (en) * | 1982-01-07 | 1984-12-11 | At&T Bell Laboratories | Dynamic priority queue occupancy scheme for access to a demand-shared bus |
JPS58134357A (ja) * | 1982-02-03 | 1983-08-10 | Hitachi Ltd | ベクトルプロセッサ |
US4482996A (en) * | 1982-09-02 | 1984-11-13 | Burroughs Corporation | Five port module as a node in an asynchronous speed independent network of concurrent processors |
JPS59111569A (ja) * | 1982-12-17 | 1984-06-27 | Hitachi Ltd | ベクトル処理装置 |
US4539549A (en) * | 1982-12-30 | 1985-09-03 | International Business Machines Corporation | Method and apparatus for determining minimum/maximum of multiple data words |
US4546428A (en) * | 1983-03-08 | 1985-10-08 | International Telephone & Telegraph Corporation | Associative array with transversal horizontal multiplexers |
US4661900A (en) * | 1983-04-25 | 1987-04-28 | Cray Research, Inc. | Flexible chaining in vector processor with selective use of vector registers as operand and result registers |
US5152000A (en) * | 1983-05-31 | 1992-09-29 | Thinking Machines Corporation | Array communications arrangement for parallel processor |
US4814973A (en) * | 1983-05-31 | 1989-03-21 | Hillis W Daniel | Parallel processor |
JPS606429A (ja) * | 1983-06-27 | 1985-01-14 | Ekuseru Kk | 異径中空成形品の製造方法及びその製造装置 |
US4589087A (en) * | 1983-06-30 | 1986-05-13 | International Business Machines Corporation | Condition register architecture for a primitive instruction set machine |
US4569016A (en) * | 1983-06-30 | 1986-02-04 | International Business Machines Corporation | Mechanism for implementing one machine cycle executable mask and rotate instructions in a primitive instruction set computing system |
JPS6015771A (ja) * | 1983-07-08 | 1985-01-26 | Hitachi Ltd | ベクトルプロセッサ |
FR2557712B1 (fr) * | 1983-12-30 | 1988-12-09 | Trt Telecom Radio Electr | Processeur pour traiter des donnees en fonction d'instructions provenant d'une memoire-programme |
US4588856A (en) * | 1984-08-23 | 1986-05-13 | Timex Computer Corporation | Automatic line impedance balancing circuit for computer/telephone communications interface |
CN85108294A (zh) * | 1984-11-02 | 1986-05-10 | 萨德利尔计算机研究有限公司 | 数据处理*** |
JPS61122747A (ja) * | 1984-11-14 | 1986-06-10 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | デ−タ処理装置 |
US5226171A (en) * | 1984-12-03 | 1993-07-06 | Cray Research, Inc. | Parallel vector processing system for individual and broadcast distribution of operands and control information |
DE3681463D1 (de) * | 1985-01-29 | 1991-10-24 | Secr Defence Brit | Verarbeitungszelle fuer fehlertolerante matrixanordnungen. |
JPS61221939A (ja) * | 1985-03-28 | 1986-10-02 | Fujitsu Ltd | デイジタル信号処理プロセツサにおける命令機能方式 |
US5113523A (en) * | 1985-05-06 | 1992-05-12 | Ncube Corporation | High performance computer system |
US5045995A (en) * | 1985-06-24 | 1991-09-03 | Vicom Systems, Inc. | Selective operation of processing elements in a single instruction multiple data stream (SIMD) computer system |
EP0211179A3 (en) * | 1985-06-28 | 1990-09-05 | Hewlett-Packard Company | Apparatus for performing variable shift |
IN167819B (zh) * | 1985-08-20 | 1990-12-22 | Schlumberger Ltd | |
JPS62180427A (ja) * | 1986-02-03 | 1987-08-07 | Nec Corp | プログラム制御回路 |
JPH0731669B2 (ja) * | 1986-04-04 | 1995-04-10 | 株式会社日立製作所 | ベクトル・プロセツサ |
US4809169A (en) * | 1986-04-23 | 1989-02-28 | Advanced Micro Devices, Inc. | Parallel, multiple coprocessor computer architecture having plural execution modes |
GB8617674D0 (en) * | 1986-07-19 | 1986-08-28 | Armitage P R | Seismic processor |
US4985832A (en) * | 1986-09-18 | 1991-01-15 | Digital Equipment Corporation | SIMD array processing system with routing networks having plurality of switching stages to transfer messages among processors |
US5155389A (en) * | 1986-11-07 | 1992-10-13 | Concurrent Logic, Inc. | Programmable logic cell and array |
US5418970A (en) * | 1986-12-17 | 1995-05-23 | Massachusetts Institute Of Technology | Parallel processing system with processor array with processing elements addressing associated memories using host supplied address value and base register content |
GB2201015B (en) * | 1987-02-10 | 1990-10-10 | Univ Southampton | Parallel processor array and array element |
US5058001A (en) * | 1987-03-05 | 1991-10-15 | International Business Machines Corporation | Two-dimensional array of processing elements for emulating a multi-dimensional network |
US4891751A (en) * | 1987-03-27 | 1990-01-02 | Floating Point Systems, Inc. | Massively parallel vector processing computer |
JPS63253468A (ja) * | 1987-04-10 | 1988-10-20 | Hitachi Ltd | ベクトル処理装置 |
JPS6491228A (en) * | 1987-09-30 | 1989-04-10 | Takeshi Sakamura | Data processor |
US5218712A (en) * | 1987-07-01 | 1993-06-08 | Digital Equipment Corporation | Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption |
JP2509947B2 (ja) * | 1987-08-19 | 1996-06-26 | 富士通株式会社 | ネットワ−ク制御方式 |
US5168573A (en) * | 1987-08-31 | 1992-12-01 | Digital Equipment Corporation | Memory device for storing vector registers |
US5072418A (en) * | 1989-05-04 | 1991-12-10 | Texas Instruments Incorporated | Series maxium/minimum function computing devices, systems and methods |
US4916652A (en) * | 1987-09-30 | 1990-04-10 | International Business Machines Corporation | Dynamic multiple instruction stream multiple data multiple pipeline apparatus for floating-point single instruction stream single data architectures |
US4942517A (en) * | 1987-10-08 | 1990-07-17 | Eastman Kodak Company | Enhanced input/output architecture for toroidally-connected distributed-memory parallel computers |
US5047975A (en) * | 1987-11-16 | 1991-09-10 | Intel Corporation | Dual mode adder circuitry with overflow detection and substitution enabled for a particular mode |
US5043867A (en) * | 1988-03-18 | 1991-08-27 | Digital Equipment Corporation | Exception reporting mechanism for a vector processor |
US4949250A (en) * | 1988-03-18 | 1990-08-14 | Digital Equipment Corporation | Method and apparatus for executing instructions for a vector processing system |
JPH01320564A (ja) * | 1988-06-23 | 1989-12-26 | Hitachi Ltd | 並列処理装置 |
JP2602906B2 (ja) * | 1988-07-12 | 1997-04-23 | 株式会社日立製作所 | 解析モデル自動生成方法 |
DE68920388T2 (de) * | 1988-09-19 | 1995-05-11 | Fujitsu Ltd | Paralleles Rechnersystem mit Verwendung eines SIMD-Verfahrens. |
DE68926783T2 (de) * | 1988-10-07 | 1996-11-28 | Martin Marietta Corp | Paralleler datenprozessor |
US5083285A (en) * | 1988-10-11 | 1992-01-21 | Kabushiki Kaisha Toshiba | Matrix-structured neural network with learning circuitry |
US5150328A (en) * | 1988-10-25 | 1992-09-22 | Internation Business Machines Corporation | Memory organization with arrays having an alternate data port facility |
US5150327A (en) * | 1988-10-31 | 1992-09-22 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory and video signal processing circuit having the same |
FR2639461A1 (fr) * | 1988-11-18 | 1990-05-25 | Labo Electronique Physique | Arrangement bidimensionnel de points memoire et structure de reseaux de neurones utilisant un tel arrangement |
US4890253A (en) * | 1988-12-28 | 1989-12-26 | International Business Machines Corporation | Predetermination of result conditions of decimal operations |
EP0378115B1 (en) * | 1989-01-06 | 1998-09-30 | Hitachi, Ltd. | Neural computer |
US5127093A (en) * | 1989-01-17 | 1992-06-30 | Cray Research Inc. | Computer look-ahead instruction issue control |
US5187795A (en) * | 1989-01-27 | 1993-02-16 | Hughes Aircraft Company | Pipelined signal processor having a plurality of bidirectional configurable parallel ports that are configurable as individual ports or as coupled pair of ports |
US5168572A (en) * | 1989-03-10 | 1992-12-01 | The Boeing Company | System for dynamic selection of globally-determined optimal data path |
US5140530A (en) * | 1989-03-28 | 1992-08-18 | Honeywell Inc. | Genetic algorithm synthesis of neural networks |
US5020059A (en) * | 1989-03-31 | 1991-05-28 | At&T Bell Laboratories | Reconfigurable signal processor |
EP0395349B2 (en) * | 1989-04-26 | 1998-06-10 | Yamatake-Honeywell Co. Ltd. | Moisture sensitive element |
US5001662A (en) * | 1989-04-28 | 1991-03-19 | Apple Computer, Inc. | Method and apparatus for multi-gauge computation |
US5073867A (en) * | 1989-06-12 | 1991-12-17 | Westinghouse Electric Corp. | Digital neural network processing elements |
US5422881A (en) * | 1989-06-30 | 1995-06-06 | Inmos Limited | Message encoding |
JPH0343827A (ja) * | 1989-07-12 | 1991-02-25 | Omron Corp | ファジーマイクロコンピュータ |
US5173947A (en) * | 1989-08-01 | 1992-12-22 | Martin Marietta Corporation | Conformal image processing apparatus and method |
US5440749A (en) * | 1989-08-03 | 1995-08-08 | Nanotronics Corporation | High performance, low cost microprocessor architecture |
JP2659436B2 (ja) * | 1989-08-25 | 1997-09-30 | 富士通株式会社 | 半導体記憶装置 |
US5140523A (en) * | 1989-09-05 | 1992-08-18 | Ktaadn, Inc. | Neural network for predicting lightning |
US5140670A (en) * | 1989-10-05 | 1992-08-18 | Regents Of The University Of California | Cellular neural network |
DE58908974D1 (de) * | 1989-11-21 | 1995-03-16 | Itt Ind Gmbh Deutsche | Datengesteuerter Arrayprozessor. |
US5623650A (en) * | 1989-12-29 | 1997-04-22 | Cray Research, Inc. | Method of processing a sequence of conditional vector IF statements |
US5197130A (en) * | 1989-12-29 | 1993-03-23 | Supercomputer Systems Limited Partnership | Cluster architecture for a highly parallel scalar/vector multiprocessor system |
JP2559868B2 (ja) * | 1990-01-06 | 1996-12-04 | 富士通株式会社 | 情報処理装置 |
US5067095A (en) * | 1990-01-09 | 1991-11-19 | Motorola Inc. | Spann: sequence processing artificial neural network |
JP3260357B2 (ja) * | 1990-01-24 | 2002-02-25 | 株式会社日立製作所 | 情報処理装置 |
KR920006322B1 (ko) * | 1990-04-03 | 1992-08-03 | 정호선 | 나눗셈기 |
KR920008271B1 (ko) * | 1990-04-03 | 1992-09-26 | 정호선 | 신경회로망을 이용한 부동소수점방식 가산기회로 |
KR930001024B1 (ko) * | 1990-04-03 | 1993-02-12 | 정호선 | 신경회로망을 이용한 제곱근 연산용 집적회로 |
US5146420A (en) * | 1990-05-22 | 1992-09-08 | International Business Machines Corp. | Communicating adder tree system for neural array processor |
US5148515A (en) * | 1990-05-22 | 1992-09-15 | International Business Machines Corp. | Scalable neural array processor and method |
JPH05501460A (ja) * | 1990-05-30 | 1993-03-18 | アダプティブ・ソリューションズ・インコーポレーテッド | 分散ディジタル最大化機能アーキテクチャおよびその方法 |
CA2043505A1 (en) * | 1990-06-06 | 1991-12-07 | Steven K. Heller | Massively parallel processor including queue-based message delivery system |
US5182794A (en) * | 1990-07-12 | 1993-01-26 | Allen-Bradley Company, Inc. | Recurrent neural networks teaching system |
US5418915A (en) * | 1990-08-08 | 1995-05-23 | Sumitomo Metal Industries, Ltd. | Arithmetic unit for SIMD type parallel computer |
JPH04107731A (ja) * | 1990-08-29 | 1992-04-09 | Nec Ic Microcomput Syst Ltd | 乗算回路 |
US5208900A (en) * | 1990-10-22 | 1993-05-04 | Motorola, Inc. | Digital neural network computation ring |
US5216751A (en) * | 1990-10-22 | 1993-06-01 | Motorola, Inc. | Digital processing element in an artificial neural network |
US5167008A (en) * | 1990-12-14 | 1992-11-24 | General Electric Company | Digital circuitry for approximating sigmoidal response in a neural network layer |
US5164914A (en) * | 1991-01-03 | 1992-11-17 | Hewlett-Packard Company | Fast overflow and underflow limiting circuit for signed adder |
US5175858A (en) * | 1991-03-04 | 1992-12-29 | Adaptive Solutions, Inc. | Mechanism providing concurrent computational/communications in SIMD architecture |
DE69228980T2 (de) * | 1991-12-06 | 1999-12-02 | National Semiconductor Corp., Santa Clara | Integriertes Datenverarbeitungssystem mit CPU-Kern und unabhängigem parallelen, digitalen Signalprozessormodul |
US5418973A (en) * | 1992-06-22 | 1995-05-23 | Digital Equipment Corporation | Digital computer system with cache controller coordinating both vector and scalar operations |
US5440702A (en) * | 1992-10-16 | 1995-08-08 | Delco Electronics Corporation | Data processing system with condition code architecture for executing single instruction range checking and limiting operations |
US5422805A (en) * | 1992-10-21 | 1995-06-06 | Motorola, Inc. | Method and apparatus for multiplying two numbers using signed arithmetic |
US5717947A (en) * | 1993-03-31 | 1998-02-10 | Motorola, Inc. | Data processing system and method thereof |
JPH0756892A (ja) * | 1993-08-10 | 1995-03-03 | Fujitsu Ltd | マスク付きベクトル演算器を持つ計算機 |
-
1993
- 1993-03-31 US US08/040,779 patent/US5717947A/en not_active Expired - Lifetime
-
1994
- 1994-03-18 EP EP94104274A patent/EP0619557A3/en not_active Ceased
- 1994-03-25 TW TW083102642A patent/TW280890B/zh active
- 1994-03-28 KR KR1019940006182A patent/KR940022257A/ko not_active Application Discontinuation
- 1994-03-30 CN CN94103297A patent/CN1080906C/zh not_active Expired - Fee Related
- 1994-03-30 JP JP6082769A patent/JPH0773149A/ja active Pending
-
1995
- 1995-02-09 US US08/389,511 patent/US6085275A/en not_active Expired - Lifetime
- 1995-02-10 US US08/390,191 patent/US5752074A/en not_active Expired - Lifetime
- 1995-02-13 US US08/389,512 patent/US5742786A/en not_active Expired - Lifetime
- 1995-02-17 US US08/390,831 patent/US5600846A/en not_active Expired - Fee Related
- 1995-02-23 US US08/393,602 patent/US5664134A/en not_active Expired - Fee Related
- 1995-03-01 US US08/398,222 patent/US5706488A/en not_active Expired - Lifetime
- 1995-03-08 US US08/401,400 patent/US5598571A/en not_active Expired - Fee Related
- 1995-03-09 US US08/401,610 patent/US5754805A/en not_active Expired - Fee Related
- 1995-03-21 US US08/408,045 patent/US5572689A/en not_active Expired - Fee Related
- 1995-03-21 US US08/408,098 patent/US5737586A/en not_active Expired - Fee Related
- 1995-03-22 US US08/409,761 patent/US5734879A/en not_active Expired - Lifetime
- 1995-04-06 US US08/419,861 patent/US5548768A/en not_active Expired - Fee Related
- 1995-04-17 US US08/425,004 patent/US5559973A/en not_active Expired - Fee Related
- 1995-04-18 US US08/425,961 patent/US5805874A/en not_active Expired - Fee Related
- 1995-04-19 US US08/424,990 patent/US5537562A/en not_active Expired - Lifetime
- 1995-08-03 US US08/510,948 patent/US5790854A/en not_active Expired - Fee Related
- 1995-08-03 US US08/510,895 patent/US5600811A/en not_active Expired - Fee Related
-
2005
- 2005-07-29 JP JP2005220042A patent/JP2006012182A/ja active Pending
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI417798B (zh) * | 2008-11-21 | 2013-12-01 | Nat Taipei University Oftechnology | High - speed reverse transfer neural network system with elastic structure and learning function |
US9489196B2 (en) | 2011-12-23 | 2016-11-08 | Intel Corporation | Multi-element instruction with different read and write masks |
US9507593B2 (en) | 2011-12-23 | 2016-11-29 | Intel Corporation | Instruction for element offset calculation in a multi-dimensional array |
US10025591B2 (en) | 2011-12-23 | 2018-07-17 | Intel Corporation | Instruction for element offset calculation in a multi-dimensional array |
US10037208B2 (en) | 2011-12-23 | 2018-07-31 | Intel Corporation | Multi-element instruction with different read and write masks |
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US9996350B2 (en) | 2014-12-27 | 2018-06-12 | Intel Corporation | Hardware apparatuses and methods to prefetch a multidimensional block of elements from a multidimensional array |
US10656944B2 (en) | 2014-12-27 | 2020-05-19 | Intel Corporation | Hardware apparatus and methods to prefetch a multidimensional block of elements from a multidimensional array |
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CN1107983A (zh) | 1995-09-06 |
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CN1080906C (zh) | 2002-03-13 |
US5754805A (en) | 1998-05-19 |
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