TW201229176A - Adhesive composition, method for manufacturing semiconductor device, and semiconductor device - Google Patents

Adhesive composition, method for manufacturing semiconductor device, and semiconductor device Download PDF

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Publication number
TW201229176A
TW201229176A TW100135612A TW100135612A TW201229176A TW 201229176 A TW201229176 A TW 201229176A TW 100135612 A TW100135612 A TW 100135612A TW 100135612 A TW100135612 A TW 100135612A TW 201229176 A TW201229176 A TW 201229176A
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Taiwan
Prior art keywords
adhesive composition
semiconductor device
semiconductor
connection
acid
Prior art date
Application number
TW100135612A
Other languages
Chinese (zh)
Other versions
TWI424038B (en
Inventor
Kazutaka Honda
Akira Nagai
Tetsuya Enomoto
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Hitachi Chemical Co Ltd
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Publication of TW201229176A publication Critical patent/TW201229176A/en
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Publication of TWI424038B publication Critical patent/TWI424038B/en

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    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02Non-macromolecular additives
    • C09J11/06Non-macromolecular additives organic
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
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    • H01L24/27Manufacturing methods
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
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    • HELECTRICITY
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  • Physics & Mathematics (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
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Abstract

The present invention relates to an adhesive composition for encapsulating connection parts in a semiconductor device in which respective connection parts of a semiconductor chip and a wiring circuit board are electrically connected with each other or alternatively in a semiconductor device in which respective connection parts of a plurality of semiconductor chips are electrically connected with each other. The adhesive composition contains an epoxy resin, a curing agent and an acrylic surface-treated filler.

Description

201229176 六、發明說明: 【發明所屬之技術領域】 本發明係關於接著劑組成物、半導體裝置之製造方法 及半導體裝置。 【先前技術】 近年來,將半導體晶片安裝於基板上並連接已廣泛使 用金線等金屬細線之金屬線黏合方式。另一方面,爲了對 應對半導體裝置之小型化、薄型化、高功能、高積體化、 高速化等之要求,正逐漸採用在半導體晶片與基板間形成 稱爲凸塊之導電性突起,使半導體晶片與基板連接之覆晶 連接方式(FC連接方式)^ 例如,關於半導體晶片及基板間之連接,於BGA (201229176 6. Description of the Invention: TECHNICAL FIELD The present invention relates to an adhesive composition, a method of manufacturing a semiconductor device, and a semiconductor device. [Prior Art] In recent years, a semiconductor wafer has been mounted on a substrate and a metal wire bonding method in which metal thin wires such as gold wires have been widely used has been connected. On the other hand, in order to meet the requirements for miniaturization, thinning, high function, high integration, and high speed of semiconductor devices, a conductive bump called a bump is formed between the semiconductor wafer and the substrate. Flip-chip connection method for connecting a semiconductor wafer to a substrate (FC connection method) ^ For example, regarding a connection between a semiconductor wafer and a substrate, in a BGA (

Ball Grid Array,球格柵陣列)、CSP ( Chip Size Package ,晶片尺寸封裝)等中廣泛使用之COB (基板上固晶)型 之連接方式亦適用於FC連接方式。且,FC連接方式亦廣 泛使用於在半導體晶片上形成連接部(凸塊或配線),而 使半導體晶片間連接之COC ( Chip On Chip,晶片堆疊) 型之連接方式(參照例如專利文獻1 )。 然而,爲對應於更小型化、薄型化、高功能化之要求 ,上述連接方式亦開始廣泛普及於層合多階段化晶片堆疊 型封裝或 POP (Package On Package,封裝層疊)、TSV (Through-Silicon Via,穿矽通孔)等。此等層合多階段 技術由於係將半導體晶片等配置爲三次元,故與配置爲二Ball Grid Array, Ball Grid Array, CSP (Chip Size Package), etc. COB (Solid Bonding on Substrate) type is also suitable for FC connection. Further, the FC connection method is also widely used in a COC (Chip On Chip) type connection method in which a connection portion (bump or wiring) is formed on a semiconductor wafer and a semiconductor wafer is connected (see, for example, Patent Document 1) . However, in order to meet the requirements of miniaturization, thinning, and high functionality, the above-mentioned connection methods have also been widely spread in laminated multi-stage wafer stacking packages or POP (Package On Package), TSV (Through- Silicon Via, through the through hole) and so on. These laminated multi-stage technologies are configured as two-dimensional semiconductor semiconductors and the like, and are configured as two

S -5- 201229176 次元之方法相較,可減小封裝。尤其,TSV技術於半導體 性能之提高、雜訊減低、安裝面積之削減、省電化方面亦 有效,以作爲下一世代之半導體配線技術而備受矚目。 不過,上述連接部(凸塊或配線)中所用之主要金屬 有焊劑、錫、金、銀、銅、鎳等,亦已使用包含該等之複 數種之導電材料。連接部中使用之金屬由於會在表面氧化 而生成氧化膜,或於表面附著氧化物之雜質,故會有在連 接部之連接面產生雜質之情況。若存在此種雜質時,會有 於半導體晶片與基板間或兩個半導體晶片間之連接性、絕 緣信賴性降低,而損及採用上述連接方式之優點之顧慮。 至於抑制該等雜質之發生同時提高連接性之方法,舉 例有在連接前對基板或半導體晶片之表面進行前處理之方 法,舉例有施以在 OSP ( Organic Solderbility Preservatives,有機焊接性保存)處理中使用之預助熔劑 或防鏽處理劑之方法。然而,於前處理後因助熔劑或防鏽 處理劑殘存並劣化,亦有連接性降低之情況。 另一方面,依據以半導體封裝材料(半導體封裝用接 著劑)封裝半導體晶片及基板間等之連接部之方法,變成 可在半導體晶片及基板或半導體晶片彼此連接之同時封裝 連接部。因此,可抑制連接部中所用之金屬氧化或抑制雜 質對連接部之附著,可保護連接部免於受外部環境影響。 因此,可有效的提高連接性、絕緣信賴性、作業性、生產 性。 又,以覆晶連接方式製造之半導體裝置,爲使因半導 -6- 3* 201229176 體曰a片與基板之熱脹係數差或半導體晶片彼此之熱膨脹 係數差所:t文之熱應力不會集中於連接部而引起連接不良, 於半導體晶片及基板間等之空隙有必要以半導體封裝材料 予以封裝。尤其半導體晶片與基板大多使用熱膨脹係數不 同之成分’而要求提高由半導體封裝材料所封裝之耐熱衝 擊性。 以上述半導體封裝材料之封裝方法,大致上區分,可 舉例有毛細管流動(Capillary-Flow)方式及預塗佈(Pre_ applied)方式(例如參照專利文獻2〜6)。所謂毛細管流 動方式’係於半導體晶片及基板連接後,於半導體晶片及 基板間之空隙利用毛細管現象注入液狀半導體封裝材料之 方式。所謂預塗佈方式,爲於半導體晶片及基板連接之前 ,對半導體晶片或基板供給糊狀或薄膜狀的半導體封裝材 料後,將半導體晶片與基板連接之方式。關於該等封裝方 法,隨著近幾年之半導體裝置之小型化進展,半導體晶片 及基板間等之空隙變得狹小,以毛細管流動方式注入需要 長時間,而有降低生產性之情況,或有無法注入之情況, 且,即使可注入,亦有存在有未塡充部分而成爲孔洞原因 之情況。因此,由作業性·生產性·信賴性之觀點而言, 預塗佈方式已作爲可高機能·高積體·高速化之封裝之製 作方法而成爲主流。 [先前技術文獻] 專利文獻 專利文獻1 :日本特開2008_2943 82號公報 201229176 專利文獻2:日本特開2〇(π_223227號公報 專利文獻3:日本特開2002-283098號公報 專利文獻4:日本特開2005-272547號公報 專利文獻5:日本特開2 006-1694〇7號公報 專利文獻6:日本特開2006-188573號公報 【發明內容】 [發明欲解決之課題] 上述預塗佈方式在利用加熱加壓連接之同時,爲使半 導體晶片及基板間之空隙以半導體封裝材料予以封裝,對 半導體封裝材料之含有成分有必要考慮連接條件加以選擇 。一般連接部彼此之連接就充分確保連接性.絕緣信賴性 之觀點而百,係使用金屬接合。由於金屬接合爲使用高溫 (例如200 °C以上)之連接方式,故會有因殘留於半導體 封裝材料中之揮發成分,或因半導體封裝材料之含有成分 之分解而新生成之揮發成分使半導體封裝材料發泡之情況 。據此’產生稱爲孔洞之氣泡,會使半導體封裝材料自半 導體晶片或基板剝離。又,加壓加熱時/壓力釋放時,若 發生上述孔洞或半導體晶片等之回彈(springback),則 會因使連接部彼此連接之連接凸塊之撕扯產生連接部之破 壞等之連接不良。肇因於該等,以往之半導體封裝材料會 有連接性·絕緣信賴性低之顧慮。 又’半導體封裝材料不具有充分助焊劑活性(金屬表 面之氧化膜或雜質之去除效果)時,無法去除金屬表面之Compared with the method of S -5- 201229176 dimension, the package can be reduced. In particular, TSV technology is also effective in improving semiconductor performance, noise reduction, reduction in mounting area, and power saving, and has attracted attention as the next generation of semiconductor wiring technology. However, the main metal used in the above-mentioned connecting portion (bump or wiring) is flux, tin, gold, silver, copper, nickel, etc., and a plurality of conductive materials including these have been used. The metal used in the connection portion is oxidized on the surface to form an oxide film, or an oxide impurity is adhered to the surface, so that impurities may be generated on the connection surface of the connection portion. When such an impurity is present, the connectivity between the semiconductor wafer and the substrate or between the two semiconductor wafers and the reliability of the insulation are lowered, which may impair the advantages of the above-described connection method. As a method of suppressing the occurrence of such impurities while improving the connectivity, a method of pretreating the surface of the substrate or the semiconductor wafer before the connection is exemplified, for example, in the treatment of OSP (Organic Solderability Preservatives). A method of using a pre-flux or anti-rust treatment agent. However, since the flux or the rust-preventing agent remains and deteriorates after the pretreatment, the connectivity is also lowered. On the other hand, according to a method of encapsulating a connection portion between a semiconductor wafer and a substrate with a semiconductor package material (adhesive for semiconductor package), the connection portion can be packaged while the semiconductor wafer, the substrate, or the semiconductor wafer are connected to each other. Therefore, the metal used in the joint portion can be suppressed from being oxidized or the adhesion of the impurities to the joint portion can be suppressed, and the joint portion can be protected from the external environment. Therefore, it is possible to effectively improve the connectivity, insulation reliability, workability, and productivity. Moreover, the semiconductor device manufactured by the flip chip connection method is such that the thermal expansion coefficient of the semiconducting -6-3*201229176 body 曰a sheet and the substrate is poor or the thermal expansion coefficients of the semiconductor wafers are different: It is concentrated on the connection portion to cause connection failure, and it is necessary to package the semiconductor package material in the gap between the semiconductor wafer and the substrate. In particular, semiconductor wafers and substrates are often made of components having different coefficients of thermal expansion, and it is required to improve the heat shock resistance encapsulated by the semiconductor package material. In the above-described method of encapsulating a semiconductor encapsulating material, a capillary flow-through method and a pre-application method (for example, refer to Patent Documents 2 to 6) can be exemplified. The capillary flow mode is a method in which a liquid semiconductor package material is injected into a gap between a semiconductor wafer and a substrate by capillary action after the semiconductor wafer and the substrate are connected. The precoating method is a method in which a semiconductor wafer or a substrate is supplied with a paste or a film-shaped semiconductor package material before the semiconductor wafer and the substrate are connected, and then the semiconductor wafer is connected to the substrate. With regard to these packaging methods, as the miniaturization of semiconductor devices has progressed in recent years, gaps between semiconductor wafers and substrates have become narrow, injection in a capillary flow manner takes a long time, and productivity is lowered, or In the case where it is impossible to inject, and even if it can be injected, there is a case where there is an unfilled portion and it is a cause of a hole. Therefore, from the viewpoint of workability, productivity, and reliability, the precoating method has become mainstream as a method for producing a package capable of high performance, high productivity, and high speed. [PRIOR ART DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PATENT DOCUMENT PRIOR ART Japanese Laid-Open Patent Publication No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. No. 2006-188573. In order to encapsulate the gap between the semiconductor wafer and the substrate with a semiconductor package material by heating and pressurizing, it is necessary to select the connection conditions of the semiconductor package material in consideration of the connection conditions. Generally, the connection between the connection portions ensures the connectivity. From the viewpoint of insulation reliability, metal bonding is used. Since metal bonding is a connection method using a high temperature (for example, 200 ° C or higher), there is a volatile component remaining in the semiconductor packaging material, or a semiconductor packaging material. The case where the volatile component contained in the component is decomposed and the newly formed volatile component foams the semiconductor encapsulating material. The bubble of the hole causes the semiconductor package material to be peeled off from the semiconductor wafer or the substrate. Further, when the hole or the semiconductor wafer or the like is springback during pressure heating/pressure release, the connection portions are connected to each other. The tearing of the connection bumps causes a connection failure such as breakage of the connection portion. Due to these, the conventional semiconductor package material has a concern that connectivity and insulation reliability are low. Further, the semiconductor package material does not have sufficient flux activity. (The effect of removing the oxide film or impurities on the metal surface), the metal surface cannot be removed

S 201229176 氧化膜或雜質’無法形成良好之金屬—金屬接合,而有無 法確保導通之情況。另外,半導體封裝材料之絕緣信賴性 低時,難以對應於連接部之狹窄間距化,而產生絕緣不良 。肇因於該等’以往之宇導體封裝材料有連接性.絕緣信 賴性低之顧慮。 使用半導體封裝材料製造之半導體裝置於信賴性,更 具體而g於耐熱性、耐濕性及耐回焊性方面被要求達到充 分的等級。爲確保耐回焊性,要求在260。(:左右之回焊溫 度下’維持如可抑制黏晶層(接著劑層)之剝離或破壞般 之高的接著強度。 本發明係鑑於上述問題而完成者,其目的係提供一種 可製作耐回焊性及連接信賴性及絕緣信賴性優異之半導體 裝置之接著劑組成物、使用該接著劑組成物之半導體裝置 之製造方法及半導體裝置。 [用以解決課題之手段] 本發明提供一種接著劑組成物,其係於使半導體晶片 及配線電路基板各自的連接部互相電連接的半導體裝置、 或複數的半導體晶片各自的連接部相互電連接的半導體裝 置中密封連接部的接著劑組成物,該組成物含有環氧樹脂 、硬化劑、與經具有以下述通式(1 )表示之基之化合物 表面處理之丙烯酸系表面處理塡料。 -9- (1) 201229176 [化1] R1 ΟS 201229176 Oxide film or impurity 'cannot form a good metal-metal bond, and whether or not to ensure conduction. Further, when the insulation reliability of the semiconductor package material is low, it is difficult to cause insulation failure in accordance with the narrow pitch of the connection portion.肇Because of the concern that these conventional conductor packaging materials have connectivity and low insulation reliability. Semiconductor devices fabricated using semiconductor packaging materials are required to achieve a sufficient level of reliability, more specifically, heat resistance, moisture resistance, and reflow resistance. To ensure reflow resistance, it is required at 260. (: at the left and right reflow temperatures, 'maintaining strength as high as the peeling or destruction of the adhesive layer (adhesive layer) can be suppressed. The present invention has been made in view of the above problems, and an object thereof is to provide a durable resistance An adhesive composition of a semiconductor device excellent in reflowability, connection reliability, and insulation reliability, a method of manufacturing a semiconductor device using the same, and a semiconductor device. [Means for Solving the Problem] The present invention provides a And a composition of the adhesive which seals the connection portion in a semiconductor device in which a connection portion of each of a semiconductor wafer and a printed circuit board is electrically connected to each other, or a connection portion in which a plurality of semiconductor wafers are electrically connected to each other, The composition contains an epoxy resin, a hardener, and an acrylic surface treatment material which is surface-treated with a compound having a group represented by the following formula (1). -9- (1) 201229176 [Chemical Formula 1] R1 Ο

^h2c=c—c—ο 式(1)中,R1表示氫原子或碳數1或2之烷基,R2 表不碳數1〜30之伸院基。 本發明又提供一種接著劑組成物,其係於半導體晶片 及配線電路基板各自的連接部互相電連接的半導體裝置、 或複數的半導體晶片各自的連接部相互電連接的半導體裝 置中密封連接部的接著劑組成物,其中該組成物含有環氧 樹脂' 硬化劑、與具有以下述通式(1)表示之基的塡料 [化2] R1 -0-^h2c=c-c-ο In the formula (1), R1 represents a hydrogen atom or an alkyl group having 1 or 2 carbon atoms, and R2 represents a stretching group having a carbon number of 1 to 30. Further, the present invention provides an adhesive composition for sealing a connection portion in a semiconductor device in which a connection portion of each of a semiconductor wafer and a printed circuit board is electrically connected to each other, or a connection portion in which a plurality of semiconductor wafers are electrically connected to each other a composition of the following, wherein the composition contains an epoxy resin, a hardener, and a mash having a group represented by the following formula (1): R1 -0-

⑴ H2C=C—C- 式(1)中,R1表示氫原子或碳數1或2之烷基,R2 表示碳數1~3〇之伸烷基。 上述本發明之接著劑組成物,於含有環氧樹脂及硬化 劑方面,進一步藉由含有丙烯酸系表面處理塡料或具有以 上述通式(1)表示之基之塡料,即使應用在高溫(例如 200 °C以上)下金屬接合之覆晶連接方式中作爲半導體封 裝用接著劑時’仍可實現高耐回焊性、連接信賴性及絕緣 信賴性。 -10- 201229176 爲提高接著劑組成物之耐回焊性,必須提高高溫下2 吸濕後之接著力。然而’過去以來所使用之塡料雖可減小 吸濕率及熱膨脹率,有效地提高連接性·絕緣信賴性’但 塡料本身通常爲缺乏接著性者。 此處,已知若矽烷偶合劑與未經表面處理之塡料一起 包含於樹脂中,則可合成塡料之表面依據經矽烷偶合劑處 理之矽烷偶合劑之取代基而成各種表面狀態之塡料。然而 ,矽烷偶合劑之揮發性高,在具有必須於高溫連接之金屬 接合等之高溫之製程之半導體裝置製造步驟中成爲發生孔 洞之原因。同樣地,自過去以來所使用之塡料經表面處理 時,會有產生甲醇等揮發性高的有機物之情況,成爲孔洞 發生之原因。 一般,在半導體基板上形成稱爲抗焊劑之絕緣膜時, 抗焊劑大多含有丙烯酸系材料。因此,本發明人等發現藉 由含有上述丙烯酸系表面處理塡料或具有以上述通式(1 )表示之基之塡料,可提高接著劑組成物在高溫下之彈性 率及吸濕後之接著力,可實現耐回焊性。本發明人等推測 本發明之接著劑組成物藉由使用預先經表面處理之丙烯酸 系表面處理塡料或具有以上述通式(1)表示之基之塡料 ,可抑制揮發性高之物質之產生,同時由於丙烯酸系化合 物與抗焊劑之接著性優異故可提高與基板之連接性者。且 ’本發明人等推測丙烯酸系表面處理塡料或具有以上述通 式(1 )表示之基之塡料由於難以使連接部之絕緣信賴性 降低’難以使接著劑組成物之硬化物之熱膨脹率及彈性率 -11 - 201229176 降低,故可提高連接信賴性者。 丙烯酸系表面處理塡料或具有以上述通式(1)表示 之基之塡料對樹脂成分之分散性優異,可提高使用本發明 之接著劑組成物製作之半導體裝置中之封裝(基板-晶片 、晶片·晶片等)末端部之強度。 上述之接著力提高並非限制於抗焊劑上者,亦可展現 於半導體晶片間(SiO、SiN等)之間。 具有以上述通式(1)表示之基之化合物較好爲以下 述通式(2)表示之化合物。 [化 3] ^ R1 Ο H2C=C—*C—-Ο——R2_Si—f〇R3)3 (2} 式(2)中,R1表示氫原子或碳數1或2之烷基,R2 表示碳數1〜30之伸烷基,R3表示碳數1〜30之烷基。 本發明之接著劑組成物藉由含有以上述通式(2)表 示之化合物表面處理之塡料,可更提高耐回焊性、連接信 賴性及絕緣信賴性。 本發明之接著劑組成物,就提高接著劑組成物之耐熱 性及薄膜形成性之觀點而言,可進而含有重量平均分子量 爲1 0000以上之高分子成分。 就進而提高接著劑組成物之貼附性或薄膜形成性之觀 點而言,較好上述高分子成分之重量平均分子量爲30000 Ο -12- 201229176 以上,玻璃轉移溫度爲100°c以下。 本發明之接著劑組成物藉由進而含有助焊活性劑,可 提高助焊活性’去除連接部之金屬表面之氧化膜或雜質, 形成良好之金屬-金屬接合^ 就可提高以預塗佈方式封裝半導體晶片與配線電路基 板之空隙或複數之半導體晶片間之空隙時之作業性而言, 本發明之接著劑組成物之形狀較好爲薄膜狀。 本發明另提供一種半導體裝置之製造方法,其係半導 體晶片及配線電路基板各自的連接部互相電連接的半導體 裝置、或複數的半導體晶片各自的連接部相互電連接的半 導體裝置之製造方法,其具備使用上述之接著劑組成物封 裝連接部之步驟》 依據本發明之半導體裝置之製造方法,藉由使用上述 接著劑組成物,可提高半導體裝置之耐回焊性、連接信賴 性及絕緣信賴性。 上述連接部含有由金、銀、銅、鎳、錫及鉛所組成之 群組選出之至少一種金屬時,可進而提高連接部之電傳導 性、熱傳導性、連接信賴性》 本發明另提供以上述半導體裝置之製造方法獲得之半 導體裝置。 本發明之半導體裝置由於係使用上述半導體裝置之製 造方法製作,故成爲耐回焊性、連接信賴性及絕緣信賴性 相當優異者。(1) H2C=C—C— In the formula (1), R1 represents a hydrogen atom or an alkyl group having 1 or 2 carbon atoms, and R2 represents an alkylene group having 1 to 3 carbon atoms. In the above-mentioned adhesive composition of the present invention, in the case of containing an epoxy resin and a hardener, it is further applied to a high temperature by using an acrylic surface-treated dip or a crucible having the base represented by the above formula (1). For example, in the case of a flip chip connection method in which metal bonding is performed at 200 ° C or higher, it is possible to achieve high reflow resistance, connection reliability, and insulation reliability when used as an adhesive for semiconductor encapsulation. -10- 201229176 In order to improve the reflow resistance of the adhesive composition, it is necessary to increase the adhesion after 2 moisture absorption at high temperatures. However, the materials used in the past can reduce the moisture absorption rate and the coefficient of thermal expansion, and effectively improve the connectivity and insulation reliability. However, the material itself is usually lacking in adhesion. Here, it is known that if the decane coupling agent is contained in the resin together with the untreated material, the surface of the synthetic mash can be formed into various surface states depending on the substituent of the decane coupling agent treated with the decane coupling agent. material. However, the decane coupling agent has high volatility and is a cause of occurrence of voids in a semiconductor device manufacturing process having a high temperature process such as metal bonding at a high temperature. Similarly, when the materials used in the past have been subjected to surface treatment, organic substances such as methanol having high volatility may be generated, which may cause pores to occur. Generally, when an insulating film called a solder resist is formed on a semiconductor substrate, the solder resist often contains an acrylic material. Therefore, the present inventors have found that by containing the above-mentioned acrylic surface-treating material or the material having the base represented by the above formula (1), the elastic modulus of the adhesive composition at a high temperature and the moisture absorption can be improved. With the force, the reflow resistance can be achieved. The present inventors have presumed that the adhesive composition of the present invention can suppress a substance having high volatility by using a surface-treated acrylic surface-treated mash or a mash having the base represented by the above formula (1). At the same time, since the adhesion between the acrylic compound and the solder resist is excellent, the adhesion to the substrate can be improved. Further, the present inventors have estimated that the acrylic surface treatment material or the material having the base represented by the above formula (1) is difficult to reduce the insulation reliability of the joint portion, and it is difficult to thermally expand the cured product of the adhesive composition. Rate and flexibility rate -11 - 201229176 is reduced, so you can increase the reliability of the connection. The acrylic surface treatment material or the material having the base represented by the above formula (1) is excellent in dispersibility to the resin component, and the package in the semiconductor device fabricated using the adhesive composition of the present invention can be improved (substrate-wafer) The strength of the end portion of the wafer, wafer, etc. The above-mentioned adhesion improvement is not limited to the solder resist, and may be exhibited between semiconductor wafers (SiO, SiN, etc.). The compound having a group represented by the above formula (1) is preferably a compound represented by the following formula (2). [Chemical 3] ^ R1 Ο H2C=C—*C—-Ο——R2_Si—f〇R3)3 (2) In the formula (2), R1 represents a hydrogen atom or an alkyl group having 1 or 2 carbon atoms, and R2 represents The alkyl group having a carbon number of 1 to 30 and R3 represents an alkyl group having 1 to 30 carbon atoms. The composition of the adhesive of the present invention can be further improved by containing a material for surface treatment of the compound represented by the above formula (2). Reflow-resistance, connection reliability, and insulation reliability. The adhesive composition of the present invention may further contain a weight average molecular weight of 1,000,000 or more from the viewpoint of improving heat resistance and film formability of the adhesive composition. From the viewpoint of further improving the adhesion of the adhesive composition or the film formability, the weight average molecular weight of the polymer component is preferably 30,000 Ο -12 to 201229176 or more, and the glass transition temperature is 100 ° C. Hereinafter, the adhesive composition of the present invention can further improve the fluxing activity by removing the active agent of the metal portion of the joint portion by forming the flux active agent, and forming a good metal-metal joint can be improved by precoating. Package semiconductor wafer and wiring circuit substrate The shape of the adhesive composition of the present invention is preferably a film shape in terms of workability in the case of voids or a plurality of gaps between semiconductor wafers. The present invention further provides a method of manufacturing a semiconductor device which is a semiconductor wafer and a printed circuit board. A semiconductor device in which respective connection portions are electrically connected to each other, or a method of manufacturing a semiconductor device in which respective connection portions of a plurality of semiconductor wafers are electrically connected to each other, and a step of packaging a connection portion using the above-described adhesive composition" In the method for manufacturing a device, by using the above-described adhesive composition, the reflow resistance, connection reliability, and insulation reliability of the semiconductor device can be improved. The connection portion is composed of gold, silver, copper, nickel, tin, and lead. When at least one type of metal is selected from the group, the electrical conductivity, thermal conductivity, and connection reliability of the connection portion can be further improved. The present invention further provides a semiconductor device obtained by the method for manufacturing a semiconductor device described above. It is made by using the above-described manufacturing method of a semiconductor device, so it is resistant. Weldability, connection reliability and insulation reliability were quite excellent.

S -13- 201229176 [發明效果] 依據本發明,可提供—種耐回焊性、連接信賴性及絕 緣信賴性優異之接著劑組成物、使用該接著劑組成物之半 導體裝置之製造方法及半導體裝置。 【實施方式】 以下,依據情況一面參照圖式一面對本發明之較佳實 施形態加以詳細說明。又,圖中,相同或相當部分給予相 同符號,且省略重複說明。又,上下左右等之位置關係只 要無特別指明,則爲基於圖中所示之位置關係者。另外, 圖式之尺寸比例並非限於圖示之比例者。 〈接著劑組成物〉 本實施形態之接著劑組成物(半導體封裝用接著劑) 爲於半導體晶片及配線電路基板(以下視情況亦簡稱爲「 基板」)各自的連接部互相電連接的半導體裝置、或複數 的半導體晶片各自的連接部相互電連接的半導體裝置中密 封連接部的接著劑組成物,該組成物含有環氧樹脂(以下 視情況稱爲「( a )成分」)、硬化劑(以下視情況稱爲 「(b)成分」)、與丙烯酸系表面處理之塡料或具有以 下述通式(1)表示之基之塡料(以下視情況稱爲「(c) 成分」)。又’接著劑組成物可視需要含有重量平均分子 量1 0000以上之高分子成分(以下視情況稱爲r ((1)成 分」)或助焊活性劑(以下視情況稱爲「( e )成分」) -14-S-13-201229176 [Effect of the Invention] According to the present invention, an adhesive composition excellent in reflow resistance, connection reliability, and insulation reliability, a method of manufacturing a semiconductor device using the same, and a semiconductor can be provided. Device. [Embodiment] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding portions are given the same reference numerals, and the repeated description is omitted. Further, the positional relationship of up, down, left, and the like is based on the positional relationship shown in the figure unless otherwise specified. In addition, the dimensional ratio of the drawings is not limited to the scale shown. <Adhesive composition> The adhesive composition of the present embodiment (the adhesive for semiconductor encapsulation) is a semiconductor device in which the connection portions of the semiconductor wafer and the printed circuit board (hereinafter also referred to simply as "substrate") are electrically connected to each other. Or a semiconductor device in which the connection portions of the plurality of semiconductor wafers are electrically connected to each other, wherein the composition contains an epoxy resin (hereinafter referred to as "(a) component") and a hardener (hereinafter referred to as "(a) component)" Hereinafter, it is referred to as "(b) component"), an acrylic surface-treated material, or a material having a base represented by the following general formula (1) (hereinafter referred to as "(c) component"). Further, the adhesive composition may optionally contain a polymer component having a weight average molecular weight of 10,000 or more (hereinafter referred to as r ((1) component) or a fluxing active agent (hereinafter referred to as "(e) component". ) -14-

S 201229176 。以下針對構成本實施形態之接著劑組成物之各 說明。 (a )成分:環氧樹脂 作爲環氧樹脂只要是分子內具有兩個以上之 即可無特別限制地使用。作爲(a )成分具體而 雙酚A型、雙酚F型、萘型、酚酚醛清漆型、甲 漆型、酚芳烷基型、聯苯型、三苯基甲烷、二環 及各種多官能基環氧樹脂。該等可單獨使用或以 之混合物使用。 (a)成分就抑制在高溫之連接時分解而產生 分之觀點而言,連接時之溫度爲250 °C時,較好 2 50°C之熱重量減少量率爲5%以下之環氧樹脂,在 時,較好使用在3 0 0 °C之熱重量減少量率爲5 %以下 樹脂。 (b )成分:硬化劑 作爲(b )成分列舉爲例如酚樹脂系硬化劑、 硬化劑、胺系硬化劑、咪唑系硬化劑及膦系硬化 )成分包含酚性羥基、酸酐、胺類或咪唑類時,顯 制在連接部產生氧化膜之助焊活性,可提高連接信 絕緣信賴性。以下針對各硬化劑加以說明。 (i )酚樹脂系硬化劑 酚樹脂系硬化劑只要是分子內具有兩個以上酌 分加以 氧基者 可使用 酚醛清 二烯型 種以上 揮發成 使用在 3 00°C 之環氧 酸酐系 ί。( b 示出抑 賴性·S 201229176. Hereinafter, each description of the composition of the adhesive constituting the present embodiment will be described. (a) component: Epoxy resin The epoxy resin is not particularly limited as long as it has two or more kinds in the molecule. Specific as component (a), bisphenol A type, bisphenol F type, naphthalene type, phenol novolac type, lacquer type, phenol aralkyl type, biphenyl type, triphenylmethane, bicyclo and various polyfunctional Base epoxy resin. These may be used singly or as a mixture thereof. (a) The component is a resin having a thermal weight loss of 5% or less at a temperature of 250 ° C when the temperature at the time of connection is 250 ° C. In the case of the above, it is preferred to use a resin having a thermal weight loss rate of 5% or less at 300 °C. (b) Component: The curing agent is, for example, a phenol resin-based curing agent, a curing agent, an amine-based curing agent, an imidazole-based curing agent, and a phosphine-based curing component as a component (b), and contains a phenolic hydroxyl group, an acid anhydride, an amine or an imidazole. In the case of the type, the fluxing activity of the oxide film is formed at the joint portion, and the reliability of the connection insulation can be improved. Hereinafter, each curing agent will be described. (i) Phenolic resin-based curing agent The phenol resin-based curing agent can be volatilized into an epoxy aldehyde anhydride system at 300 ° C as long as it has two or more oxygen groups in the molecule. (b shows deterrence

性羥基 S -15- 201229176 者即無特別限制,可使用例如酚酚醛清漆樹脂、甲酚酚醛 清漆樹脂、酚芳烷基樹脂、甲酚萘酚甲醛聚縮合物、三苯 基甲烷型多官能基酚及各種多官能基酚樹脂。該等可單獨 使用或以兩種以上之混合物使用。 酚樹脂系硬化劑相對於上述(a )成分之當量比(酚 性羥基/環氧基,莫耳比),就良好之硬化性、接著性及 儲存安定性之觀點而言,較好爲0.3〜1.5,更好爲0.4~1.0 ,又更好爲〇.5~1.0。當量比爲0·3以上時,有提高硬化性 且提高接著力之傾向,爲1.5以下時未反應之酚性羥基不 會過量殘留,而有將吸水率抑制爲較低,提高絕緣信賴性 之傾向。 (ii )酸酐系硬化劑 至於酸酐系硬化劑可使用例如甲基環己烷四羧酸二酐 、均苯三酸酐、均苯四酸酐、二苯甲酮四羧酸二酐及乙二 醇雙無水均苯三酸酯。該等可單獨使用或以兩種以上之混 合物使用。 酸酐系硬化劑相對於上述(a )成分之當量比(酸酐 基/環氧基,莫耳比),就良好之硬化性、接著性及儲存 安定性之觀點而言,較好爲0.3〜1.5,更好爲0.4〜1.0,又 更好爲0.5〜1.0。當量比爲0.3以上時,有提高硬化性且提 高接著力之傾向,爲1.5以下時未反應之酸酐基不會過量 殘留,有將吸水率抑制爲低,而提高絕緣信賴性之傾向。 (iii )胺系硬化劑 胺系硬化劑可使用例如二氰基二醯胺。 Ο -16 - 201229176 胺系硬化劑相對於上述(a )成分之當量比(胺/環氧 基’莫耳比)’就良好之硬化性、接著性及儲存安定性之 觀點而言’較好爲0.3〜1.5,更好爲0.4〜1.0,又更好爲 〇·5〜1_0。當量比爲0.3以上時,有提高硬化性且提高接著 力之傾向’爲1.5以下時未反應之胺不會過量殘留,有提 高絕緣信賴性之傾向。 (iv)咪唑系硬化劑 至於咪唑系硬化劑,列舉爲例如2 -苯基咪唑、2 -苯 基-4 -甲基咪唑、1-苄基-2-甲基咪唑、1-苄基-2 -苯基咪唑 、1-氣乙基-2-~f—烷基咪唑、1-氰基-2 -苯基咪唑、1-氰乙 基-2-十一烷基咪唑偏苯三酸酯、1-氰乙基-2-苯基咪唑鑰 偏苯三酸鹽' 2,4-二胺基-6- [2,-甲基咪唑啉-(Γ)]-乙基-3-三嗪、2,4-二胺基-6-[2,-十一烷基咪唑啉-(1,)]-乙基-s-三嗪、2,4-二胺基-6-[2,-乙基-4’-甲基咪唑啉-(1,)]-乙 基-s-三嗪、2,4-二胺基-6-[2,-甲基咪唑啉-(1,)]-乙基- s-三嗪異氰尿酸加成物、2-苯基咪唑異氰氰酸加成物、2-苯 基-4,5-二羥基甲基咪唑、2-苯基-4-甲基-5-羥基甲基咪唑 、及環氧樹脂與咪唑類之加成物。該等中,就優異之硬化 性、儲存安定性及連接信賴性之觀點而言,較好爲1 -氰乙 基-2-十一烷基咪唑、1-氰基-2-苯基咪唑、1-氰乙基-2-十 一烷基咪唑偏苯三酸酯、1-氰乙基-2-苯基咪唑鎗偏苯三酸 鹽、2,4-二胺基-6-[2,-甲基咪唑啉-(Γ)]-乙基-s-三嗪、 2,4-二胺基-6-[2’-乙基-4’-甲基咪唑啉-(1’)]-乙基-3-三 嗪、2,4-二胺基-6-[2,-甲基咪唑啉-(Γ)]-乙基-s-三嗪異 -17- 201229176 氰尿酸加成物、2-苯基咪唑異氰尿酸加成物' 2-苯基-4,5-二羥基甲基咪唑及2-苯基-4-甲基-5-羥基甲基咪唑。該等 可單獨使用或倂用兩種以上。另外,該等亦可作爲經微膠 囊化之潛在性硬化劑。 咪唑系硬化劑之含量相對於(a)成分100質量份, 較好爲0.1〜20質量份,更好爲0.1~10質量份。咪唑系硬 化劑之含量爲〇 . 1質量份以上時有提高硬化性之傾向,爲 20質量份以下時形成金屬接合之前接著劑組成物不會硬化 ,而有不易產生連接不良之傾向。 (v)膦系硬化劑 膦系硬化劑列舉爲例如三苯基膦、四苯基錢四苯基硼 酸鹽、四苯基鱗四(4-甲基苯基)硼酸鹽及四苯基鱗(4-氟苯基)硼酸鹽。 膦系硬化劑之含量相對於(a )成分100質量份,較 好爲0.1〜10質量份,更好爲0.1〜5質量份。膦系硬化劑之 含量爲0.1質量份以上時有提高硬化性之傾向,爲10質 量份以下時形成金屬接合之前接著劑組成物不會硬化,有 不易產生連接不良之傾向。 酚樹脂系硬化劑、酸酐系硬化劑及胺系硬化劑可分別 單獨使用一種或以兩種以上之混合物使用。咪唑系硬化劑 及膦系硬化劑亦可各別單獨使用,但亦可與酚樹脂系硬化 劑、酸酐系硬化劑或胺系硬化劑一起使用。 接著劑組成物含有酚樹脂系硬化劑、酸酐系硬化劑或 胺系硬化劑作爲(b )成分時,顯示去除硬化膜之助焊活 -18- 201229176 性,且可更提高連接信賴性。 (C)成分:丙烯酸系表面處理塡料或具有以上述通式(1 )表示之基之塡料 (C)成分只要是經具有以上述通式(1)表示之基之 化合物表面處理之塡料則無特別限制,可使用例如使絕緣 性無機塡料、晶鬚及樹脂塡料經表面處理者。亦即,(c )成分可使用具有以上述通式(1)表示之基之塡料。 此處’式(1)中’R1表示氫原子或碳數1或2之烷 基’較好爲氫原子、甲基或乙基。R1之碳數愈增加體積愈 大’碳數超過2時有反應性下降之傾向。R2表示碳數 1〜30之伸烷基,較好爲碳數1〜15之伸烷基。R2之碳數超 過3 0時,有難以對塡料進行表面處理之傾向。 (c)成分於塡料表面上是否具有以上述通式(1)表 示之基,可藉例如如下方法確認。 將本實施形態之接著劑組成物加熱,使用氣體層析儀 (例如島津公司製造,製品名「GC-1 7A」)測定產生之 甲醇。由該甲醇之量,可確認具有存在於塡料表面之以上 述通式(1 )表示之基。於該情況,同樣測定不含(C )成 分之接著劑組成物之甲醇量作爲參考。 至於絕緣性無機塡料列舉爲例如玻璃、二氧化矽、氧 化鋁、氧化鈦 '碳黑、雲母、及氮化硼,較好爲二氧化矽 、氧化鋁、氧化鈦及氮化硼,更好爲二氧化矽、氧化·銘及 氮化硼。至於晶鬚列舉爲例如硼酸鋁、鈦酸鋁、氧化鋅、 -19- 201229176 矽酸鈣、硫酸鎂、及氮化硼》至於樹脂塡料列舉爲聚胺基 甲酸酯、聚醯亞胺。該等塡料及晶鬚可單獨使用或以兩種 以上之混合物使用。塡料之形狀、粒徑及調配量並無特別 限制。可使用微細之奈米二氧化矽。該等塡料中,二氧化 矽由於表面處理之簡易性或與樹脂成分之相溶性較好故而 較佳。 至於(C)成分,可使用經以上述通式(2)表示之化 合物表面處理之塡料。具體而言,可使用經式(2)中R1 爲氫原子之丙烯酸系化合物表面處理之二氧化矽塡料,經 R1爲甲基之甲基丙烯酸系化合物表面處理之二氧化矽塡料 ,及經R1爲乙基之乙基丙烯酸系化合物表面處理之二氧 化矽塡料。就與半導體接著劑中所含樹脂成分或半導體基 板表面之反應性或形成鍵結之觀點而言,上述式(2 )中 ’ R1較好爲體積不大之基’ R1爲氫原子或碳數1或2之 烷機’較好爲氫原子 '甲基或乙基。R1之碳數愈增加則體 積愈大,碳數超過2時有反應性降低之傾向。亦即,可使 用經丙烯酸系化合物、甲基丙烯酸系化合物或乙基丙烯酸 系化合物表面處理之二氧化砂塡料作爲(c)成分。 上述通式(1)或(2)中,R2表示碳數1〜30之伸烷 基’且就揮發成分少之觀點而言較好爲碳數1〜15之伸院 基。式(2)中,R3表示碳數1〜3 0之烷基,可依據表面處 理之容易性而適宜選定。R3之碳數爲30以下時,會有容 易對塡料表面處理之傾向。 (c )成分之形狀 '粒徑只要依據接著劑組成物之用 -20- 201229176 途適當設定即可而無特別限制。 (C)成分之平均粒徑在塡料形狀爲球形時,平均粒 徑較好爲2 μιη以下’於進窄狹窄間距化、狹窄間隙化之封 裝中,爲了避免因疊印(trapping )造成之信賴性下降, 較好爲1.5μηι以下’最好爲1〇μιη以下。又,其下限就操 作性之觀點而言’較好爲〇·〇〇5μιη以上,最好爲Ο.ΟΙμπι 以下。 (c)成分之調配量以接著劑組成物之固成分全部爲 基準’較好爲5~80質量%,更好爲1〇~7〇質量%。爲5質 量%以上時會有容易較強地發揮接著力提高之傾向,爲80 質量%以下時黏度容易調整,不易造成接著劑組成物之流 動性下降或塡料朝連接部之咬入(疊印),而有連接信賴 性提高之傾向。 又,若矽烷偶合劑未預先與塡料進行表面處理,而係 作爲接著劑組成物之構成成分添加,而在系統中進行表面 處理時,會產生甲醇等,而成爲在高溫製程時之發泡原因 〇 藉由提高接著劑組成物在260°C附近之吸濕後之接著 力,及提高在260 °C附近之彈性率,可提高耐回焊性,防 止回焊後之剝離或連接不良。 (d)成分:重量平均分子量10000以上之高分子成分 至於(d )成分列舉爲例如苯氧樹脂、聚醯亞胺樹脂 、聚醯胺樹脂、聚碳二醯亞胺樹脂、氰酸酯樹脂、丙烯酸The hydroxyl group S -15-201229176 is not particularly limited, and for example, a phenol novolak resin, a cresol novolak resin, a phenol aralkyl resin, a cresol naphthol formaldehyde polycondensate, a triphenylmethane type polyfunctional group can be used. Phenol and various polyfunctional phenolic resins. These may be used singly or in combination of two or more. The equivalent ratio of the phenol resin-based curing agent to the component (a) (phenolic hydroxyl group/epoxy group, molar ratio) is preferably 0.3 from the viewpoint of good curability, adhesion, and storage stability. ~1.5, preferably 0.4~1.0, and better 〇.5~1.0. When the equivalent ratio is 0.3 or more, the curability is improved and the adhesion is increased. When the ratio is 1.5 or less, the unreacted phenolic hydroxyl group does not remain excessively, and the water absorption rate is suppressed to be low, and the insulation reliability is improved. tendency. (ii) An acid-based curing agent For the acid-based curing agent, for example, methylcyclohexanetetracarboxylic dianhydride, trimesic anhydride, pyromellitic anhydride, benzophenonetetracarboxylic dianhydride, and ethylene glycol double can be used. Anhydrous trimesic acid ester. These may be used singly or in combination of two or more. The equivalent ratio (anhydride group/epoxy group, molar ratio) of the acid anhydride-based curing agent to the component (a) is preferably from 0.3 to 1.5 in terms of good curability, adhesion, and storage stability. It is preferably 0.4 to 1.0, and more preferably 0.5 to 1.0. When the equivalent ratio is 0.3 or more, the curability is improved and the adhesion is increased. When the ratio is 1.5 or less, the unreacted acid anhydride group does not remain excessively, and the water absorption ratio is suppressed to be low, and the insulation reliability tends to be improved. (iii) Amine-based curing agent For the amine-based curing agent, for example, dicyanodiamine can be used. Ο -16 - 201229176 The equivalent ratio of the amine-based curing agent to the above component (a) (amine/epoxy 'morE ratio' is good for the viewpoint of good hardenability, adhesion and storage stability. It is 0.3 to 1.5, more preferably 0.4 to 1.0, and even more preferably 〇·5 to 1_0. When the equivalent ratio is 0.3 or more, there is a tendency that the curing property is improved and the adhesion is increased. When the ratio is 1.5 or less, the unreacted amine does not remain excessively, which tends to improve the reliability of the insulation. (iv) an imidazole-based hardener to an imidazole-based hardener, which is exemplified by, for example, 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2 -phenylimidazole, 1-haloethyl-2-f-alkylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazole key trimellitate ' 2,4-diamino-6-[2,-methylimidazoline-(Γ)]-ethyl-3-triazine, 2,4-Diamino-6-[2,-undecyl imidazoline-(1,)]-ethyl-s-triazine, 2,4-diamino-6-[2,-B -4'-methylimidazoline-(1,)]-ethyl-s-triazine, 2,4-diamino-6-[2,-methylimidazoline-(1,)]-B Base-s-triazine isocyanuric acid addition product, 2-phenylimidazole isocyanate addition product, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl -5-Hydroxymethylimidazole, and an adduct of an epoxy resin and an imidazole. Among these, from the viewpoint of excellent hardenability, storage stability, and connection reliability, 1-cyanoethyl-2-undecylimidazole and 1-cyano-2-phenylimidazole are preferred. 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazole gun trimellitate, 2,4-diamino-6-[2, -methylimidazoline-(Γ)]-ethyl-s-triazine, 2,4-diamino-6-[2'-ethyl-4'-methylimidazoline-(1')]- Ethyl-3-triazine, 2,4-diamino-6-[2,-methylimidazoline-(Γ)]-ethyl-s-triazineiso-17- 201229176 cyanuric acid adduct, 2-Phenyl imidazoisocyanuric acid adducts - 2-phenyl-4,5-dihydroxymethylimidazole and 2-phenyl-4-methyl-5-hydroxymethylimidazole. These may be used alone or in combination of two or more. In addition, these may also act as a latent hardener for microencapsulation. The content of the imidazole-based curing agent is preferably 0.1 to 20 parts by mass, more preferably 0.1 to 10 parts by mass, per 100 parts by mass of the component (a). When the content of the imidazole-based hardening agent is 〇. 1 part by mass or more, the curing property tends to be improved, and when the metal bonding is 20 parts by mass or less, the composition of the adhesive does not harden, and the connection failure tends to be less likely to occur. (v) Phosphine-based hardener The phosphine-based hardener is exemplified by, for example, triphenylphosphine, tetraphenyl octatetraphenyl borate, tetraphenyl quaternary tetrakis(4-methylphenyl) borate, and tetraphenyl squara ( 4-fluorophenyl)borate. The content of the phosphine-based curing agent is preferably 0.1 to 10 parts by mass, more preferably 0.1 to 5 parts by mass, per 100 parts by mass of the component (a). When the content of the phosphine-based curing agent is 0.1 part by mass or more, the curing property tends to be improved. When the content is 10 parts by mass or less, the composition of the adhesive agent does not harden before the metal bonding is formed, and connection failure tends to occur. The phenol resin-based curing agent, the acid anhydride-based curing agent, and the amine-based curing agent may be used singly or in combination of two or more kinds. The imidazole curing agent and the phosphine curing agent may be used singly or in combination with a phenol resin-based curing agent, an acid anhydride-based curing agent or an amine-based curing agent. When the phenol resin-based curing agent, the acid anhydride-based curing agent, or the amine-based curing agent is contained as the component (b), the flux-removing activity of the cured film is -18-201229176, and the connection reliability can be further improved. (C) component: an acrylic-based surface treatment material or a material (C) having a group represented by the above formula (1) as long as it is surface-treated with a compound having a group represented by the above formula (1) The material is not particularly limited, and for example, an insulating inorganic material, whiskers, and resin materials may be used for surface treatment. That is, as the component (c), a material having a group represented by the above formula (1) can be used. Here, 'R1' in the formula (1) represents a hydrogen atom or an alkyl group having 1 or 2 carbon atoms, and is preferably a hydrogen atom, a methyl group or an ethyl group. The more the carbon number of R1 is increased, the larger the volume is. When the carbon number exceeds 2, the reactivity tends to decrease. R2 represents an alkylene group having 1 to 30 carbon atoms, preferably an alkylene group having 1 to 15 carbon atoms. When the carbon number of R2 exceeds 30, there is a tendency that it is difficult to surface-treat the material. Whether or not the component (c) has a group represented by the above formula (1) on the surface of the material can be confirmed by, for example, the following method. The adhesive composition of the present embodiment is heated, and the produced methanol is measured using a gas chromatograph (for example, manufactured by Shimadzu Corporation, product name "GC-1 7A"). From the amount of the methanol, it was confirmed that the group represented by the above formula (1) was present on the surface of the tantalum. In this case, the amount of methanol of the adhesive composition containing no (C) component was also determined as a reference. The insulating inorganic coating is exemplified by, for example, glass, cerium oxide, aluminum oxide, titanium oxide 'carbon black, mica, and boron nitride, preferably cerium oxide, aluminum oxide, titanium oxide, and boron nitride. It is cerium oxide, oxidized · Ming and boron nitride. The whiskers are exemplified by, for example, aluminum borate, aluminum titanate, zinc oxide, -19-201229176 calcium citrate, magnesium sulfate, and boron nitride. The resin materials are exemplified by polyurethanes and polyimines. These materials and whiskers may be used singly or in combination of two or more. The shape, particle size and blending amount of the dip material are not particularly limited. Fine nano cerium oxide can be used. Among these materials, cerium oxide is preferred because of its ease of surface treatment or compatibility with a resin component. As the component (C), a material which has been surface-treated with the compound represented by the above formula (2) can be used. Specifically, a cerium oxide material which is surface-treated with an acrylic compound in which R1 is a hydrogen atom in the formula (2), a cerium oxide surface-treated by a methacrylic compound having a methyl group of R1, and A cerium oxide material surface-treated with an ethyl acrylate compound in which R1 is an ethyl group. From the viewpoint of reactivity or formation of a bond with the resin component or the surface of the semiconductor substrate contained in the semiconductor adhesive, 'R1 is preferably a small volume base' in the above formula (2), and R1 is a hydrogen atom or a carbon number. The alkane machine of 1 or 2 is preferably a hydrogen atom 'methyl or ethyl. The larger the carbon number of R1 is, the larger the volume is. When the carbon number exceeds 2, the reactivity tends to decrease. Namely, a cerium oxide material surface-treated with an acrylic compound, a methacrylic compound or an ethacrylic compound can be used as the component (c). In the above formula (1) or (2), R2 represents an alkylene group having a carbon number of from 1 to 30, and is preferably a stretching group having a carbon number of from 1 to 15 from the viewpoint of a small amount of a volatile component. In the formula (2), R3 represents an alkyl group having 1 to 30 carbon atoms, and can be appropriately selected depending on the easiness of surface treatment. When the carbon number of R3 is 30 or less, there is a tendency to easily treat the surface of the material. (c) Shape of the component 'The particle size is not particularly limited as long as it is appropriately set according to the composition of the adhesive composition -20-201229176. The average particle diameter of the component (C) is such that when the shape of the crucible is spherical, the average particle diameter is preferably 2 μm or less or less in the narrow and narrow pitch and narrow gap, in order to avoid the trust due to trapping. The degree of decline is preferably 1.5 μηι or less 'preferably 1 〇 μιη or less. Further, the lower limit is preferably 〇·〇〇5 μmη or more, and preferably Ο.ΟΙμπι or less, from the viewpoint of workability. The blending amount of the component (c) is preferably from 5 to 80% by mass, more preferably from 1 to 7 % by mass, based on the total solid content of the adhesive composition. When the amount is 5% by mass or more, the adhesion tends to be increased. When the content is 80% by mass or less, the viscosity is easily adjusted, and the fluidity of the adhesive composition is less likely to be lowered or the material is bitten toward the joint portion (overprinting) ), and there is a tendency to increase the reliability of the connection. Further, when the decane coupling agent is not surface-treated with the mash beforehand, it is added as a constituent component of the adhesive composition, and when surface treatment is performed in the system, methanol or the like is generated, and foaming is performed at a high temperature process. The reason is that by improving the adhesion of the adhesive composition after moisture absorption at around 260 ° C and increasing the elastic modulus at around 260 ° C, the reflow resistance can be improved, and peeling or poor connection after reflow can be prevented. (d) component: a polymer component having a weight average molecular weight of 10,000 or more. The component (d) is exemplified by, for example, a phenoxy resin, a polyimine resin, a polyamide resin, a polycarbodiimide resin, a cyanate resin, acrylic acid

S -21 - 201229176 樹脂、聚酯樹脂、聚乙烯樹脂、聚醚颯樹脂、聚酸醯亞胺 樹脂、聚乙烯縮醛樹脂'胺基甲酸酯樹脂及丙烯酸橡膝。 該等中,就耐熱性及薄膜成形性優異之觀點而言,較好爲 苯氧樹脂、聚醯亞胺樹脂、丙稀酸橡膠、氰酸酯樹脂及聚 碳二醯亞胺樹脂,更好爲苯氧樹脂、聚醯亞胺樹脂及丙稀 酸橡膠。該等之(d)成分可單獨使用或以兩種以上之混 合物或作爲共聚物使用。但,(d)成分不包含爲(&amp;)成 分的環氧樹脂。 上述苯氧樹脂、聚醯亞胺樹脂等高分子成分可使用市 售品,亦可使用合成者。 聚醯亞胺樹脂可藉習知方法使四羧酸二酐與二胺進行 縮合反應而獲得。更具體而言,宜在有機溶劑中混合等莫 耳或大致等莫耳之四羧酸二酐及二胺(各成分之添加順序S -21 - 201229176 Resin, polyester resin, polyethylene resin, polyether oxime resin, polyacrylamide imide resin, polyvinyl acetal resin 'urethane resin and acrylic rubber knee. Among these, from the viewpoint of excellent heat resistance and film formability, a phenoxy resin, a polyimide resin, an acrylic rubber, a cyanate resin, and a polycarbodiimide resin are preferred. It is a phenoxy resin, a polyimide resin, and an acrylic rubber. These (d) components may be used singly or in combination of two or more kinds or as a copolymer. However, the component (d) does not contain an epoxy resin which is a (&amp;) component. A commercially available product may be used as the polymer component such as the phenoxy resin or the polyimide resin, and a synthesizer may be used. The polyimine resin can be obtained by a condensation reaction of a tetracarboxylic dianhydride with a diamine by a conventional method. More specifically, it is preferred to mix a molar or substantially equimolar tetracarboxylic dianhydride and a diamine in an organic solvent (the order of addition of the components)

爲任意),將反應溫度設定在80°C以下,較好爲0~60°C 進行加成反應。又,爲了抑制接著劑組成物之諸特性之降 低,上述之四羧酸二酐較好以乙酸酐進行再結晶純化處理 〇 隨著上述加成反應進行反應液之黏度緩慢上升,生成 聚醯亞胺前驅物的聚醯胺酸。聚醯亞胺樹脂可藉上述聚醯 胺酸脫水閉環而獲得。脫水閉環可藉由加熱處理之熱閉環 法,或使用脫水劑之化學閉環法進行。上述聚醯胺酸可藉 由在50〜8 0 °C下加熱解聚合而調整其分子量。 作爲聚醯亞胺樹脂之原料使用之四羧酸二酐並無特別 限制,列舉爲例如均苯四羧酸二酐、3,3’,4,4’-聯苯四羧酸 -22- 3 201229176 二酐、2,2’,3,3’-聯苯四羧酸二酐、2,2-雙(3,4-二羧基苯 基)丙烷二酐、2,2-雙(2,3-二羧基苯基)丙烷二酐、1,1-雙(2,3-二羧基苯基)乙烷二酐、1,1-雙(3,4-二羧基苯基 )乙烷二酐、雙(2,3-二羧基苯基)甲烷二酐、雙(3,4-二羧基苯基)甲烷二酐、雙(3,4-二羧基苯基)碾二酐、 3,4,9,10-嵌二萘四羧酸二酐、雙(3,4-二羧基苯基)醚二 酐、苯-1,2,3,4-四羧酸二酐、3,4,3’,4’-二苯甲酮四羧酸二 酐、2,3,2’,3’-二苯甲酮四羧酸二酐、3,3,3’,4’-二苯甲酮 四羧酸二酐、1,2,5,6-萘四羧酸二酐、1,4,5,8-萘四羧酸二 酐、2,3,6,7-萘四羧酸二酐、1,2,4,5-萘四羧酸二酐、2,6-二氯萘-1,4,5,8-四羧酸二酐、2,7-二氯萘-1,4,5,8-四羧酸二 酐、2,3,6,7-四氯萘二-1,4,5,8-四羧酸二酐、菲-1,8,9,10-四羧酸二酐、哌啶-2,3,5,6-四羧酸二酐、噻吩-2,3,5,6-四 羧酸二酐、2,3,3’,4’-聯苯四羧酸二酐、3,4,3’,4’-聯苯四 羧酸二酐、2,3,2’,3’-聯苯四羧酸二酐、雙(3,4-二羧基苯 基)二甲基矽烷二酐、雙(3,4-二羧基苯基)甲基苯基矽 烷二酐、雙(3,4_二羧基苯基)二苯基矽烷二酐、1,4-雙 (3,4-二羧基苯基二甲基矽烷基)苯二酐、1,3-雙(3,4-二 羧基苯基)-1,1,3,3-四甲基二環己烷二酐、對-伸苯基雙( 偏苯三酸酐)、伸乙基四羧酸二酐、1,2,3,4-丁烷四羧酸 二酐、十氫萘-1,4,5,8-四羧酸二酐、4,8-二甲基-l,2,3,5,6,7-六氫萘-l,2,5,6-四羧酸二酐、環戊烷-l,2,3,4-四羧酸二酐、吡咯啶-2,3,4,5-四羧酸二酐、1,2,3,4-環丁烷 四羧酸二酐、雙(掛-雙環[2,2,1]庚烷-2,3-二羧酸二酐、 -23- 201229176 雙環-[2,2,2]-辛-7-烯-2,3,5,6-四羧酸二酐、2,2-雙(3,4-二 羧基苯基)丙烷二酐、2,2-雙[4- (3,4-二羧基苯基)苯基] 丙烷二酐、2,2-雙(3,4-二羧基苯基)六氟丙烷二酐、2,2-雙[4-(3,4-二羧基苯基)苯基]六丙烷二酐、4,4’-雙(3,4-二羧基苯氧基)二苯基硫醚二酐、1,4-雙(2-羥基六氟異 丙基)苯雙(偏苯三酸酐)、1,3-雙(2-羥基六氟異丙基 )苯雙(偏苯三酸酐)、5-(2,5 -二氧代四氫呋喃基)-3-甲基-3-環己烷-1,2-二羧酸二酐、四氫呋喃-2,3,4,5-四羧酸 二酐、以下述通式(I)表示之四羧酸二酐及以下述通式 (II)表示之四羧酸二酐。 [化4]In any case, the reaction temperature is set to 80 ° C or lower, preferably 0 to 60 ° C for the addition reaction. Further, in order to suppress a decrease in characteristics of the adhesive composition, the tetracarboxylic dianhydride is preferably subjected to recrystallization purification treatment with acetic anhydride, and the viscosity of the reaction liquid gradually rises as the above addition reaction proceeds to form a polyfluorene. Polyamine precursor of the amine precursor. The polyimine resin can be obtained by dehydration ring closure of the above polyamic acid. The dehydration ring closure can be carried out by a thermal closed loop process by heat treatment or a chemical ring closure method using a dehydrating agent. The above polylysine can be adjusted in molecular weight by thermal depolymerization at 50 to 80 °C. The tetracarboxylic dianhydride used as a raw material of the polyimide resin is not particularly limited, and examples thereof include pyromellitic dianhydride and 3,3',4,4'-biphenyltetracarboxylic acid-22-3. 201229176 dianhydride, 2,2',3,3'-biphenyltetracarboxylic dianhydride, 2,2-bis(3,4-dicarboxyphenyl)propane dianhydride, 2,2-bis (2,3 -dicarboxyphenyl)propane dianhydride, 1,1-bis(2,3-dicarboxyphenyl)ethane dianhydride, 1,1-bis(3,4-dicarboxyphenyl)ethane dianhydride, Bis(2,3-dicarboxyphenyl)methane dianhydride, bis(3,4-dicarboxyphenyl)methane dianhydride, bis(3,4-dicarboxyphenyl) succinic anhydride, 3,4,9 , 10-insene naphthalene tetracarboxylic dianhydride, bis(3,4-dicarboxyphenyl)ether dianhydride, benzene-1,2,3,4-tetracarboxylic dianhydride, 3,4,3', 4'-benzophenonetetracarboxylic dianhydride, 2,3,2',3'-benzophenonetetracarboxylic dianhydride, 3,3,3',4'-benzophenone tetracarboxylic acid Dihydride, 1,2,5,6-naphthalenetetracarboxylic dianhydride, 1,4,5,8-naphthalenetetracarboxylic dianhydride, 2,3,6,7-naphthalenetetracarboxylic dianhydride, 1, 2,4,5-naphthalenetetracarboxylic dianhydride, 2,6-dichloronaphthalene-1,4,5,8-tetracarboxylic dianhydride, 2,7-dichloronaphthalene-1,4,5,8 -tetracarboxylic dianhydride, 2,3,6,7- Chloronaphthalene di-1,4,5,8-tetracarboxylic dianhydride, phenanthrene-1,8,9,10-tetracarboxylic dianhydride, piperidine-2,3,5,6-tetracarboxylic dianhydride , thiophene-2,3,5,6-tetracarboxylic dianhydride, 2,3,3',4'-biphenyltetracarboxylic dianhydride, 3,4,3',4'-biphenyltetracarboxylic acid Dihydride, 2,3,2',3'-biphenyltetracarboxylic dianhydride, bis(3,4-dicarboxyphenyl)dimethyl phthalane dianhydride, bis(3,4-dicarboxyphenyl) Methylphenyl nonanehydride, bis(3,4-dicarboxyphenyl)diphenylnonane dianhydride, 1,4-bis(3,4-dicarboxyphenyldimethyl decyl) phthalic anhydride, 1,3-bis(3,4-dicarboxyphenyl)-1,1,3,3-tetramethylbicyclohexanedianhydride, p-phenylene bis(trimellitic anhydride), ethyltetracarboxylic acid Dihydride, 1,2,3,4-butanetetracarboxylic dianhydride, decalin-1,4,5,8-tetracarboxylic dianhydride, 4,8-dimethyl-l,2,3 ,5,6,7-hexahydronaphthalene-l,2,5,6-tetracarboxylic dianhydride, cyclopentane-1,2,3,4-tetracarboxylic dianhydride, pyrrolidine-2,3, 4,5-tetracarboxylic dianhydride, 1,2,3,4-cyclobutane tetracarboxylic dianhydride, bis(hang-bicyclo[2,2,1]heptane-2,3-dicarboxylic acid Anhydride, -23- 201229176 Bicyclo-[2,2,2]-oct-7-ene-2,3,5,6-tetracarboxylic dianhydride, 2,2-bis (3,4- Carboxyphenyl)propane dianhydride, 2,2-bis[4-(3,4-dicarboxyphenyl)phenyl]propane dianhydride, 2,2-bis(3,4-dicarboxyphenyl)hexafluoro Propane dianhydride, 2,2-bis[4-(3,4-dicarboxyphenyl)phenyl]hexapropane dianhydride, 4,4'-bis(3,4-dicarboxyphenoxy)diphenyl Thioether dianhydride, 1,4-bis(2-hydroxyhexafluoroisopropyl)benzene bis(trimellitic anhydride), 1,3-bis(2-hydroxyhexafluoroisopropyl)benzene bis(trimellitic anhydride), 5-( 2,5-dioxotetrahydrofuranyl-3-methyl-3-cyclohexane-1,2-dicarboxylic dianhydride, tetrahydrofuran-2,3,4,5-tetracarboxylic dianhydride, The tetracarboxylic dianhydride represented by the formula (I) and the tetracarboxylic dianhydride represented by the following formula (II). [Chemical 4]

b (I) 〇 °\b (I) 〇 °\

I 0 式(I )中,a表示2〜20之整數。 [化5]I 0 In the formula (I ), a represents an integer of 2 to 20. [Chemical 5]

以上述通式(I)表示之四羧酸二酐可由偏苯三酸酐 -24- 201229176 單氯化物及對應之二元醇合成,具體而言,列舉爲1,2_ ( 伸乙基)雙(偏本二酸酌^ 、1,3-(三亞甲基)雙(偏苯 三酸酐)、丨,4_(四亞甲基)雙(偏苯三酸酐)、1,5_( 五亞甲基)雙(偏苯三酸酐)、1,6-(六亞甲基)雙(偏 苯二酸酐)、1,7-(七亞甲基)雙(偏苯三酸酐)、ι,8_ (八亞甲基)雙(偏苯三酸酐)、1,9-(九亞甲基)雙( 偏苯三酸酐)、1,1〇-(十亞甲基)雙(偏苯三酸酐)、 1,12-(十一亞甲基)雙(偏苯三酸酐)、1,16-(十六亞 甲基)雙(偏本二酸肝)及1,18-(十八亞甲基)雙(偏 苯三酸酐)。 至於四羧酸二酐’就可賦予優異之耐濕信賴性之觀點 而言’較好爲以上述式(II)表示之四羧酸二酐。上述四 羧酸二酐可單獨使用或組合兩種以上使用^ 以上述式(II)表示之四殘酸二酐之含量相對於全部 四羧酸二酐較好爲40莫耳%以上,更好爲50莫耳%以上 ’又更好爲70莫耳%以上。含量爲40莫耳。以上時,有 容易充分地確保藉由使用以上述式(II)表示之竣酸二酐 獲得之耐濕信賴性效果之傾向。 作爲上述聚醯亞胺樹脂之原料使用之二胺並無特別限 制’列舉爲例如鄰-苯二胺、間-苯二胺、對-苯二胺、3,3,-二胺基二苯基醚、3,4’-二胺基二苯基醚、4,4’-二胺基二苯 基醚、3,3’-二胺基二苯基甲烷、3,4’-二胺基二苯基甲烷、 4,4’-二胺基二苯基醚甲烷、雙(4-胺基- 3,5-二甲基苯基) 甲烷 '雙(4-胺基-3,5-二異丙基苯基)甲烷、3,3’-二胺基 -25- 201229176 二苯基二氟甲烷、3,4’-二胺基二苯基二氟甲烷、4,4’-二胺 基二苯基二氟甲烷、3,3’-二胺基二苯基碾、3,4’-二胺基二 苯基碾、4,4’-二胺基二苯基颯、3,3’-二胺基二苯基硫酸、 3,4’-二胺基二苯基硫醚、4,4’-二胺基二苯基硫醚、3,3’-二胺基二苯基酮、3,4’-二胺基二苯基酮、4,4’-二胺基二苯 基酮、2,2-雙(3-胺基苯基)丙烷、2,2’- (3,4’_二胺基二 苯基)丙烷、2,2-雙(4·胺基苯基)丙烷、2,2-雙(3-胺基 苯基)六氟丙烷、2,2-(3,4’-二胺基二苯基)六氟丙烷、 2,2-雙(4-胺基苯基)六氟丙烷、1,3-雙(3-胺基苯氧基) 苯、1,4-雙(3-胺基苯氧基)苯、1,4-雙(4-胺基苯氧基) 苯、3,3’- (1,4-伸苯基雙(1-甲基亞乙基))雙苯胺、 3,4’-(1,4-伸苯基雙(1-甲基亞乙基))雙苯胺、4,4’-( 1,4-伸苯基雙(1-甲基亞乙基))雙苯胺、2,2-雙(4-(3-胺基苯氧基)苯基)丙烷、2,2-雙(4- (3-胺基苯氧基) 苯基)六氟丙烷、2,2-雙(4-(4-胺基苯氧基)苯基)六 氟丙烷、雙(4- ( 3-胺基苯氧基)苯基)硫醚、雙(4-( 4-胺基苯氧基)苯基)硫醚、雙(4- ( 3-胺基苯氧基)苯 基)颯 '雙(4-(4-胺基苯氧基)苯基)楓、3,5-二胺基 苯甲酸等芳香族二胺、1,3-雙(胺基甲基)環己烷、2,2-雙(4-胺基苯氧基苯基)丙烷、以下述通式(III )或(IV )表示之脂肪族醚二胺、以下述通式(V)表示之脂肪族 二胺及以下述通式(VI )表示之環己烷二胺。The tetracarboxylic dianhydride represented by the above formula (I) can be synthesized from trimellitic anhydride-24-201229176 monochloride and the corresponding diol, specifically, 1,2_(extended ethyl) bis (part 2) Acid, 1,3-(trimethylene)bis(trimellitic anhydride), hydrazine, 4_(tetramethylene)bis(trimellitic anhydride), 1,5-(pentamethylene)bis(trimellitic anhydride), 1,6- (hexamethylene) bis (terephthalic anhydride), 1,7-(heptylene) bis(trimellitic anhydride), ι,8_(octamethylene)bis(trimellitic anhydride), 1,9-(nine) Methyl)bis(trimellitic anhydride), 1,1 fluorene-(decamethylene)bis(trimellitic anhydride), 1,12-(undecethylene)bis(trimellitic anhydride), 1,16-(hexamethylene ) double (partially acidic liver) and 1,18-(octamethylidene) bis (trimellitic anhydride). As for the tetracarboxylic dianhydride, it is better to give excellent moisture resistance. The tetracarboxylic dianhydride represented by the above formula (II). The above tetracarboxylic dianhydride may be used singly or in combination of two or more kinds of tetrahydro acid dianhydride represented by the above formula (II). The total tetracarboxylic dianhydride is preferably 40 mol% or more, more preferably 50 mol% or more, and more preferably 70 mol% or more. The content is 40 mol. The tendency of the moisture-relieving effect obtained by using the phthalic acid dianhydride represented by the above formula (II) is preferred. The diamine used as a raw material of the above polyimine resin is not particularly limited, and is exemplified by, for example, o-phenylenediamine. , m-phenylenediamine, p-phenylenediamine, 3,3,-diaminodiphenyl ether, 3,4'-diaminodiphenyl ether, 4,4'-diaminodiphenyl Ether, 3,3'-diaminodiphenylmethane, 3,4'-diaminodiphenylmethane, 4,4'-diaminodiphenyl ether methane, bis(4-amino-3) ,5-dimethylphenyl)methane 'bis(4-amino-3,5-diisopropylphenyl)methane, 3,3'-diamino-25-201229176 diphenyldifluoromethane, 3,4'-Diaminodiphenyldifluoromethane, 4,4'-diaminodiphenyldifluoromethane, 3,3'-diaminodiphenyl milling, 3,4'-diamine Diphenyl milling, 4,4'-diaminodiphenyl hydrazine, 3,3'-diaminodiphenyl sulphate, 3,4'-diamine Diphenyl sulfide, 4,4'-diaminodiphenyl sulfide, 3,3'-diaminodiphenyl ketone, 3,4'-diaminodiphenyl ketone, 4,4' -diaminodiphenyl ketone, 2,2-bis(3-aminophenyl)propane, 2,2'-(3,4'-diaminodiphenyl)propane, 2,2-dual ( 4·Aminophenyl)propane, 2,2-bis(3-aminophenyl)hexafluoropropane, 2,2-(3,4′-diaminodiphenyl)hexafluoropropane, 2,2 - bis(4-aminophenyl)hexafluoropropane, 1,3-bis(3-aminophenoxy)benzene, 1,4-bis(3-aminophenoxy)benzene, 1,4- Bis(4-aminophenoxy)benzene, 3,3'-(1,4-phenylphenylbis(1-methylethylidene))diphenylamine, 3,4'-(1,4-stretch Phenylbis(1-methylethylidene))diphenylamine, 4,4'-(1,4-phenylenebis(1-methylethylidene))diphenylamine, 2,2-bis (4 -(3-Aminophenoxy)phenyl)propane, 2,2-bis(4-(3-aminophenoxy)phenyl)hexafluoropropane, 2,2-bis(4-(4- Aminophenoxy)phenyl)hexafluoropropane, bis(4-(3-aminophenoxy)phenyl) sulfide, bis(4-(4-aminophenoxy)phenyl) sulfide , bis(4-(3-aminobenzene) Alkyl phenyl) bis(4-(4-aminophenoxy)phenyl) maple, aromatic diamine such as 3,5-diaminobenzoic acid, 1,3-bis(aminomethyl) Cyclohexane, 2,2-bis(4-aminophenoxyphenyl)propane, an aliphatic ether diamine represented by the following formula (III) or (IV), represented by the following formula (V) The aliphatic diamine and cyclohexanediamine represented by the following formula (VI).

S -26- 201229176 [化6] H2N—Q1-(-0—Q2-)-〇—Q3—NH2 (III) 式(III)中,Q1、Q2及Q3各獨立表示碳數l~l〇之 伸烷基,b表示1~80之整數。 [化7] H2N—Q4——Q5^-0—Q6 只 Ο—Q7^-NH2 (IV) 式(IV)中,Q4、Q5、Q6及Q7各獨立表示碳數1~10 之伸烷基,c、d及e各獨立表示1〜50之整數。 [化8] H2N—^CH2^-NH2 (V) 式(V )中 表示5~20之整數 [化9] Q9 H2N——Q8—Si- Q1 11 QI -0—Si-I Q12 Q13-NH2 (VI) 式(VI)中,Q8及Q13各獨立表示碳數1〜5之伸烷基 或可具有取代基之伸苯基,Q9、Q1Q、Q11及Q12各獨立表 3 -27- 201229176 示碳數1〜5之烷基、苯基或苯氧基,g表示1〜5之整數。 該等中,就可賦予低應力性、低溫層合性及低溫接著 性之觀點而言,較好爲以上述通式(III) 、(IV)或(V )表示之二胺,就賦予低吸水性及低吸濕性之觀點而言, 較好爲以上述通式(VI)表示之二胺。該等二胺可單獨使 用或組合兩種以上使用。 以上述通式(III )或(IV )表示之脂肪族醚二胺之含 量較好爲全部二胺之1〜50莫耳%,以上述通式(V)表示 之脂肪族二胺之含量較好爲全部二胺之20〜80莫耳%,以 上述通式(VI)表示之環己烷二胺之含量較好爲全部二胺 之2 0~80莫耳%。在上述含量範圍內時,有低溫層合性及 低吸水性之賦予效果變大之傾向。 又’至於以上述通式(III)表示之脂肪族醚二胺具體 而言列舉爲下述式(ΠΙ-1) ~(111-5)之脂肪族醚二胺。 又,通式(III-4)及(ΙΠ-5)中,η表示1以上之整數。 [化 10] H2N-(-CH2-^〇-^CH2-jh〇-^CH2-)-NH2 (IIM) H5N-^eH2 大。-^士。-(^2七~。-(^2大州2 (111-2) H2N—(*CH 士 O-^cK^O-^ch 七 o-^ch 七 O-^CH士 NH2 (m-3) (1114) H2N-CH-CH2 I ch3 .0—CHCH2- ch3 0一CH2一CH-NHj CH, (111-5) -28- 201229176 以上述通式(III-4)表示之脂肪族醚二胺之重量平均 分子量較好爲例如350、750、1100或2100。又,以上述 通式(III-5 )表示之脂肪族醚二胺之重量平均分子量較好 爲例如230、 400或2000。 上述脂肪族醚二胺中,就可確保低溫層合性及對貼合 有機光阻之基板之良好接著性之觀點而言,更好爲分別以 上述通式(IV)、下述通式(VII) 、( VIII )或(IX ) 表示之脂肪族醚二胺。 [化11] Η2Ν—CH——CH2 ch3S -26- 201229176 [6] H2N—Q1-(-0—Q2-)-〇—Q3—NH2 (III) In formula (III), Q1, Q2 and Q3 each independently represent a carbon number of l~l〇 An alkyl group, b represents an integer from 1 to 80. H2N—Q4—Q5^-0—Q6 Ο—Q7^-NH2 (IV) In formula (IV), Q4, Q5, Q6, and Q7 each independently represent an alkylene group having 1 to 10 carbon atoms. , c, d, and e each independently represent an integer from 1 to 50. H2N—^CH2^-NH2 (V) In the formula (V), an integer of 5 to 20 is represented. [9] Q9 H2N——Q8—Si- Q1 11 QI −0—Si—I Q12 Q13-NH2 (VI) In the formula (VI), Q8 and Q13 each independently represent an alkylene group having a carbon number of 1 to 5 or a phenyl group which may have a substituent, and Q9, Q1Q, Q11 and Q12 are each independently shown in Table 3-27-201229176. An alkyl group having 1 to 5 carbon atoms, a phenyl group or a phenoxy group, and g represents an integer of 1 to 5. In the above, from the viewpoint of imparting low stress, low-temperature lamination, and low-temperature adhesion, it is preferred that the diamine represented by the above formula (III), (IV) or (V) is imparted low. From the viewpoint of water absorbability and low hygroscopicity, the diamine represented by the above formula (VI) is preferred. These diamines may be used singly or in combination of two or more. The content of the aliphatic ether diamine represented by the above formula (III) or (IV) is preferably from 1 to 50 mol% of the total diamine, and the content of the aliphatic diamine represented by the above formula (V) is higher. The content of the cyclohexanediamine represented by the above formula (VI) is preferably from 20 to 80 mol% of the total diamine. When it is in the above content range, the effect of imparting low-temperature lamination property and low water absorption property tends to be large. Further, the aliphatic ether diamine represented by the above formula (III) is specifically an aliphatic ether diamine of the following formula (ΠΙ-1) to (111-5). Further, in the general formulae (III-4) and (ΙΠ-5), η represents an integer of 1 or more. H2N-(-CH2-^〇-^CH2-jh〇-^CH2-)-NH2 (IIM) H5N-^eH2 is large. -^士. -(^2七~.-(^2大州2 (111-2) H2N—(*CH 士O-^cK^O-^ch 七o-^ch 七O-^CH士NH2 (m-3 (1114) H2N-CH-CH2 I ch3 .0—CHCH2- ch3 0—CH 2 —CH—NHj CH, (111-5) -28- 201229176 The aliphatic ether represented by the above formula (III-4) The weight average molecular weight of the amine is preferably, for example, 350, 750, 1100 or 2100. Further, the weight average molecular weight of the aliphatic ether diamine represented by the above formula (III-5) is preferably, for example, 230, 400 or 2000. In the case of the aliphatic ether diamine, from the viewpoint of ensuring low-temperature lamination property and good adhesion to the substrate to which the organic photoresist is bonded, it is more preferable to use the above formula (IV) and the following formula (VII, respectively). An aliphatic ether diamine represented by (VIII) or (IX). 化2Ν—CH——CH2 ch3

(VII) 式(VII)中,h表示2〜80之整數,較好爲2〜7 0。 [化 12](VII) In the formula (VII), h represents an integer of 2 to 80, preferably 2 to 70. [化 12]

式(VIII)中,c、d及e表示1〜50之整數,較好爲 2 〜4 0 〇 -29- 201229176 [化 13] H2N—^CH2―CH2-)-Ο-CH2~~CH2—Ο—^CH2一CH2^~ΝΗ2 (IX) 式(IX).中,j及k各獨立表示1~7 0之整數。 以上述通式(VII )表示之脂肪族醚二胺具體而言列 舉爲 S u n t e c h η 〇 C h e m i c a 1 (股)製造之 J e f f a m i n e D - 2 3 0、 D-400 ' D-2000 及 D-4000,BASF 製造之聚醚胺 D-230、 D-400及D-2000,至於以上述通式(VIII)表示之脂肪族 醚二胺具體而言列舉爲Suntechno Chemical (股)製造之 Jeffamine ED-600、ED-900、ED-2001,至於以上述式( IX)表示之脂肪族酸二胺列舉爲Suntechno Chemical (股 )製造之 Jeffamine EDR-148。 至於以上述通式(V )表示之脂肪族二胺列舉爲例如 1,2-二胺基乙烷、1,3-二胺基丙烷、1,4-二胺基丁烷、1,5-二胺基戊烷、1,6-二胺基己烷、1,7-二胺基庚烷、1,8-二胺 基辛烷、1,9-二胺基壬烷、1,10 -二胺基癸烷、1,11-二胺基 十一烷、1,12-二胺基十二烷及1,2-二胺基環己烷。該等中 ,較好爲1,9-二胺基壬烷、1,10-二胺基癸烷、1,1 1-二胺 基十一烷及1,12-二胺基十二烷。 至於以上述通式(VI)表示之環己烷二胺,於通式( VI)中之g爲1時,列舉爲1,1,3,3-四甲基-1,3-雙(4-胺 基苯基)二矽氧烷、1,1,3,3-四苯氧基-1,3-雙(4-胺基乙 基)二矽氧烷、1,1,3,3-四苯基-1,3-雙(2-胺基乙基)二 矽氧烷、1,1,3,3-四苯基- I,3-雙(3 -胺基丙基)二矽氧烷 -30- 201229176 、1,1,3,3 -四甲基-1,3 -雙(2 -胺基乙基)二矽氧烷、 1,1,3,3-四甲基-1,3 -雙(3-胺基丙基)二砂氧垸、1,1,3,3-四甲基-1,3-雙(3-胺基丁基)二矽氧烷及i,3-二甲基-1,3-二甲氧基-1,3_雙(4-胺基丁基)二矽氧烷。g爲2時列舉 爲例如1,1,3,3,5,5-六甲基-1,5-雙(4-胺基苯基)三矽氧烷 、1,1,5,5-四苯基-3,3-二甲基-1,5-雙(3-胺基丙基)三矽 氧烷、1,1,5,5-四苯基-3,3-二甲氧基-1,5-雙(4-胺基丁基 )三矽氧烷、1,1,5,5 -四苯基-3,3 -二甲氧基-1,5 -雙(5 -胺 基戊基)三矽氧烷、1,1,5,5-四甲基- 3,3-二甲氧基-1,5-雙 (2-胺基乙基)三矽氧烷、1,1,5,5-四甲基-3,3-二甲氧基-1,5-雙(4 -胺基丁基)三矽氧烷' 1,1,5,5 -四甲基- 3,3 -二甲 氧基-1,5-雙(5_胺基戊基)三矽氧烷、ι,ι,3,3,5,5-六甲 基-1,5-雙(3·胺基丙基)三矽氧烷、l,l,3,3,5,5 -六乙基-1,5-雙(3-胺基丙基)三矽氧烷及1,1,3,3,5,5-六丙基-1,5-雙(3-胺基丙基)三矽氧烷。 上述聚醯亞胺樹脂可單獨使用或以兩種以上之混合物 使用。 (d )成分之玻璃轉移溫度(Tg ),就接著劑組成物 對基板或晶片貼附性優異之觀點而言,較好爲1 00°C以下 ,更好爲85 °C以下。Tg爲100 °C以下時,接著劑組成物 容易埋入形成於半導體晶片上之凸塊、或形成於基板上之 電極或配線圖型等,氣泡不會殘留而有不易發生孔洞之傾 向。又,所謂上述Tg係使用DSC ( Perkin Elmer公司製 造之DSC-7型),以樣品量l〇mg,升溫速度10°C /分鐘,In the formula (VIII), c, d and e represent an integer of 1 to 50, preferably 2 to 4 0 〇-29- 201229176 [Chemical 13] H2N-^CH2-CH2-)-Ο-CH2~~CH2- Ο—^CH2—CH2^~ΝΗ2 (IX) In the formula (IX), j and k each independently represent an integer from 1 to 70. The aliphatic ether diamine represented by the above formula (VII) is specifically exemplified by J effamine D - 2 3 0, D-400 'D-2000 and D-4000 manufactured by Suntech η 〇C hemica 1 (stock). , Polyetheramines D-230, D-400 and D-2000 manufactured by BASF, and the aliphatic ether diamine represented by the above formula (VIII) is specifically listed as Jeffamine ED-600 manufactured by Suntechno Chemical Co., Ltd. ED-900, ED-2001, and the aliphatic acid diamine represented by the above formula (IX) is exemplified by Jeffamine EDR-148 manufactured by Suntechno Chemical Co., Ltd. The aliphatic diamine represented by the above formula (V) is exemplified by, for example, 1,2-diaminoethane, 1,3-diaminopropane, 1,4-diaminobutane, 1,5- Diaminopentane, 1,6-diaminohexane, 1,7-diaminoheptane, 1,8-diaminooctane, 1,9-diaminodecane, 1,10- Diaminodecane, 1,11-diaminoundecane, 1,12-diaminododecane and 1,2-diaminocyclohexane. Among these, preferred are 1,9-diaminodecane, 1,10-diaminodecane, 1,1 1-diaminoundecane and 1,12-diaminododecane. With respect to the cyclohexanediamine represented by the above formula (VI), when g in the formula (VI) is 1, it is exemplified as 1,1,3,3-tetramethyl-1,3-bis (4) -aminophenyl)dioxane, 1,1,3,3-tetraphenoxy-1,3-bis(4-aminoethyl)dioxane, 1,1,3,3- Tetraphenyl-1,3-bis(2-aminoethyl)dioxane, 1,1,3,3-tetraphenyl-I,3-bis(3-aminopropyl)dimethoxy Alkane-30- 201229176, 1,1,3,3-tetramethyl-1,3-bis(2-aminoethyl)dioxane, 1,1,3,3-tetramethyl-1, 3-bis(3-aminopropyl)dioxane, 1,1,3,3-tetramethyl-1,3-bis(3-aminobutyl)dioxane and i,3- Dimethyl-1,3-dimethoxy-1,3-bis(4-aminobutyl)dioxane. When g is 2, it is exemplified as 1,1,3,3,5,5-hexamethyl-1,5-bis(4-aminophenyl)trioxane, 1,1,5,5-tetra. Phenyl-3,3-dimethyl-1,5-bis(3-aminopropyl)trioxane, 1,1,5,5-tetraphenyl-3,3-dimethoxy- 1,5-bis(4-aminobutyl)trioxane, 1,1,5,5-tetraphenyl-3,3-dimethoxy-1,5-bis(5-aminopenta Trioxane, 1,1,5,5-tetramethyl-3,3-dimethoxy-1,5-bis(2-aminoethyl)trioxane, 1,1, 5,5-tetramethyl-3,3-dimethoxy-1,5-bis(4-aminobutyl)trioxane' 1,1,5,5-tetramethyl-3,3 -dimethoxy-1,5-bis(5-aminopentyl)trioxane, ι,ι,3,3,5,5-hexamethyl-1,5-bis(3.amino) Propyl)trioxane, 1,1,3,3,5,5-hexaethyl-1,5-bis(3-aminopropyl)trioxane and 1,1,3,3, 5,5-hexapropyl-1,5-bis(3-aminopropyl)trioxane. The above polyimine resin may be used singly or in combination of two or more. The glass transition temperature (Tg) of the component (d) is preferably 100 ° C or less, more preferably 85 ° C or less, from the viewpoint that the adhesive composition is excellent in adhesion to a substrate or a wafer. When the Tg is 100 ° C or less, the adhesive composition is likely to be embedded in the bump formed on the semiconductor wafer, or the electrode or wiring pattern formed on the substrate, and the bubbles do not remain and the hole is less likely to be inclined. Further, the above-mentioned Tg system uses DSC (DSC-7 type manufactured by Perkin Elmer Co., Ltd.) in a sample amount of 10 mg, and the temperature increase rate is 10 ° C /min.

S -31 - 201229176 測定氛圍:空氣之條件測定時之Tg。 (d)成分之重量平均分子量以聚苯乙烯換算爲1〇00〇 以上,但爲單獨顯示良好之薄膜形成性,較好爲30000以 上,更好爲40000以上,又更好爲50000以上。重量平均 分子量爲1 0000以上時,有薄膜形成性及耐熱性提高之傾 向。又’本發明中,所謂重量平均分子量意指使用高速液 體層析儀(例如,島津製作所製造,製品名「C-R4A」) ,以聚苯乙烯換算測定時之重量平均分子量。 (d )成分之含量雖無特別限制,但爲良好地保持薄 膜狀,相對於(a)成分100質量份較好爲1~5〇〇質量份 ,更好爲5-300質量份,又更好爲10〜200質量份。(d) 成分之含量爲1質量份以上,有容易獲得薄膜成形性之提 高效果之傾向,爲500質量份以下時,有提高接著劑組成 物之硬化性,並提高接著力之傾向。 (e )成分:助焊活性劑 本發明之接著劑組成物中可含有(e )成分,亦即顯 示助焊活性(去除氧化物或雜質之活性)之化合物之助焊 活性劑。助焊活性劑列舉爲如咪唑類或胺類之具有非共用 電子對之含氮化合物、羧酸類、酚類及醇類。 該等中,羧酸類之助焊活性強,由於與(a)成分的 環氧樹脂反應,不會以游離狀態存在於接著劑組成物之硬 化物中,故可防止絕緣信賴性之下降。 羧酸類列舉爲例如乙酸、丙酸、丁酸、戊酸、己酸、 -32- 201229176 庚酸、辛酸、壬酸、癸酸、十二烷酸、十四烷酸、十六烷 酸、十七烷酸、十八烷酸等脂肪式飽和羧酸;油酸、亞油 酸、亞麻酸、花生酸、二十二碳六烯酸、二十碳五烯酸等 脂式不飽和羧酸;馬來酸、富馬酸、草酸、丙二酸、琥珀 酸、戊二酸、己二酸等脂式二羧酸;苯甲酸、鄰苯二甲酸 、間苯二甲酸、對苯二甲酸、偏苯三酸 '均苯三酸( trimesic acid) 、1,2,3 -苯二酸(hemi m e 11 i t i c aci d )、均 苯三酸、戊烷羧酸、苯六甲酸(mellitic acid)等芳香族 羧酸。又,具有羥基之羧酸列舉爲例如乳酸、蘋果酸、檸 檬酸及水楊酸。 再者,亦可使用上述芳香族羧酸上有拉電子性或供電 子性之取代基,利用取代基改變芳香族上之羧酸之酸性度 之芳香族羧酸。雖有羧酸之酸性度愈高越提高助焊活性之 傾向,但酸性度太高時會有絕緣信賴性降低之情況。至於 提高羧酸之酸性度之拉電子性取代基列舉爲硝基、氰基、 三氟甲基、鹵基及苯基。至於使羧酸之酸性度變弱之供電 子性取代基列舉爲甲基、乙基、異丙基、第三丁基、二甲 基胺基及三甲基胺基。又,上述取代基之數量或位置只要 不降低助焊活性或絕緣信賴性即無特別限制。 (其他成分) 本實施形態之接著劑組成物除(c )成分以外亦可調 配其他塡料以控制黏度或硬化物之物性,及連接半導體晶 片及基板時抑制孔洞之發生或吸濕率之上升。 -33- 201229176 至於墳料可使用絕緣性無機塡料、晶鬚或樹脂塡料。 絕緣性無機塡料、晶鬚或樹脂塡料可使用與上述(c)成 分相同之物質。該等塡料、晶鬚及樹脂塡料可單獨使用一 種或以兩種以上之混合物使用。塡料之形狀、平均粒徑及 含量並無特別限制。 再者,本實施形態之接著劑組成物中亦可調配抗氧化 劑、矽烷偶合劑、鈦偶合劑、平流劑、離子捕捉劑等添加 劑。該等可單獨使用一種或組合兩種以上使用。該等調配 量只要以可展現各添加劑之效果之方式適當調整即可。 本實施形態之接著劑組成物可形成爲薄膜狀。以下顯 示使用本實施形態之接著劑組成物製作薄膜狀接著劑之方 法。首先,將(a)成分、(b)成分及(C)成分、及視 需要添加之(d)成分或(e)成分等添加於有機溶劑中, 藉由攪拌混合、混練等而溶解或分散,調製樹脂漆料。隨 後,使用刮刀塗佈器、輥塗佈器或塗佈器將樹脂漆料塗佈 於施以脫模^理之基材薄膜上後,藉加熱去除有機溶劑, 藉此於基材薄膜上獲得薄膜狀接著劑。 至於樹脂漆料之調製中使用之有機溶劑較好爲具有可 使各成分均勻溶解或分散之特性者,列舉爲例如二甲基甲 醯胺、二甲基乙醯胺、N -甲基-2-吡咯烷酮、二甲基亞颯 、二乙二醇二甲基醚、甲苯、苯、二甲苯、甲基乙基酮、 四氫呋喃、乙基溶纖素、乙基溶纖素乙酸酯、丁基溶纖素 、二噁烷、環己酮、及乙酸乙酯。該等有機溶劑可單獨使 用或組合兩種以上使用。樹脂漆料調製時之攪拌混合或混 -34- 201229176 練可使用例如攪拌機、擂潰機、三軸輥、球磨 磨機及均質機進行。 至於基材薄膜只要是具有可耐受有機溶劑 熱條件之耐熱性者即無特別限制,可例示爲聚 聚甲基戊烯薄膜等聚烯烴薄膜、聚對苯二甲酸 、聚萘二甲酸乙二酯薄膜等聚酯薄膜、聚醯亞 醚醯亞胺薄膜。基材薄膜並不限於由該等薄膜 層者,亦可爲由兩種以上之材料所成之多層薄丨 使有機溶劑自塗佈於基材薄膜之樹脂漆料 燥條件較好爲使有機溶劑充分揮發之條件,具 爲在50〜2 00°C進行0.1〜90分鐘之加熱。 又,本實施形態之接著劑組成物,就提高 點而言,亦可直接旋轉塗佈於晶圓上,視需要 晶圓單片化而使用》 〈半導體裝置〉 針對本實施形態之半導體裝置使用圖1及 。圖1爲顯示本發明之半導體裝置之一實施形 面圖。如圖1(a)所示,半導體裝置100具有 半導體晶片10及基板(電路配線基板)20, 半導體晶片10及基板20之相互對向之面上之I 半導體晶片10及基板20之配線15相互連接 3 〇,無間隙地塡充半導體晶片1 0及基板2 0間 著劑組成物40。半導體晶片1 0及基板20係_ 機、珠粒硏 揮發時之加 丙烯薄膜、 乙二酯薄膜 胺薄膜及聚 所組成之單 漠。 揮發時之乾 體而言較好 作業性之觀 乾燥後,使 2說明如下 態之示意剖 相互對向之 分別配置於 E線1 5,使 之連接凸塊 之空隙之接 I由配線1 5 -35- 201229176 及連接凸塊30而覆晶連接。配線15及連接凸塊30係利 用接著劑組成物4 0封裝而與外部環境隔離》 如圖1 (b)所示,半導體裝置200具有相互對向之半 導體晶片1 〇及基板20,分別配置於半導體晶片丨〇及基板 20之相互對向之面上之凸塊32,無間隙地塡充於半導體 晶片10及基板20間之空隙之接著劑組成物40。半導體晶 片1〇及基板20係藉由使對向之凸塊32相互連接而覆晶 連接。凸塊32係藉由接著劑組成物40封裝而與外部環境 隔離。 圖2爲顯示本發明之半導體裝置之另一實施形態之示 意剖面圖。如圖2(a)所示,半導體裝置300除了以配線 15及連接凸塊30使兩片半導體晶片10經覆晶連接之方面 以外,餘與半導體裝置100相同。如圖2(b)所示,半導 體裝置400除了以凸塊32使兩片半導體晶片1 〇經覆晶連 接之方面以外,餘與半導體裝置200相同。 至於半導體晶片1 0並無特別限制,可使用矽、鍺等 之由同一種類之元素構成之元素半導體,砷化鎵、鱗化銦 等化合物半導體。 至於基板2 0,只要是電路基板則無特別限制,可使用 具有於以玻璃環氧樹脂、聚醯亞胺、聚酯、陶磁、環氧樹 脂、雙馬來醯亞胺三嗪等作爲主成分之絕緣基板之表面上 蝕刻去除金屬膜之不需要部位所形成之配線(配線圖型) 15之電路基板,於上述絕緣基板之表面上利用金屬電鍍等 形成配線1 5之電路基板,於上述絕緣基板之表面上印刷S -31 - 201229176 Determination of atmosphere: Tg when air conditions are measured. The weight average molecular weight of the component (d) is not less than 100 Å in terms of polystyrene, but it is preferably a film forming property which is excellent, and is preferably 30,000 or more, more preferably 40,000 or more, still more preferably 50,000 or more. When the weight average molecular weight is 1,000,000 or more, the film formability and the heat resistance are improved. In the present invention, the weight average molecular weight means a weight average molecular weight measured by a high-speed liquid chromatography (for example, manufactured by Shimadzu Corporation, product name "C-R4A") in terms of polystyrene. The content of the component (d) is not particularly limited, but is preferably in the form of a film, and is preferably 1 to 5 parts by mass, more preferably 5 to 300 parts by mass, more preferably 100 parts by mass based on the component (a). Good for 10 to 200 parts by mass. (d) When the content of the component is 1 part by mass or more, the effect of improving the film formability tends to be easily obtained. When the content is 500 parts by mass or less, the curability of the adhesive composition is improved, and the adhesive strength tends to be improved. (e) component: fluxing active agent The binder composition of the present invention may contain the component (e), that is, a fluxing active agent which exhibits a fluxing activity (activity of removing oxides or impurities). The fluxing active agents are exemplified by nitrogen-containing compounds such as imidazoles or amines having a non-shared electron pair, carboxylic acids, phenols and alcohols. Among these, the carboxylic acid has a strong fluxing activity, and since it reacts with the epoxy resin of the component (a), it does not exist in the free state in the hardener of the adhesive composition, so that the insulation reliability can be prevented from being lowered. The carboxylic acids are exemplified by, for example, acetic acid, propionic acid, butyric acid, valeric acid, caproic acid, -32-201229176 heptanoic acid, caprylic acid, capric acid, capric acid, dodecanoic acid, myristic acid, palmitic acid, ten a fatty saturated carboxylic acid such as heptaic acid or octadecanoic acid; a fatty unsaturated carboxylic acid such as oleic acid, linoleic acid, linolenic acid, arachidic acid, docosahexaenoic acid or eicosapentaenoic acid; Fatty dicarboxylic acid such as maleic acid, fumaric acid, oxalic acid, malonic acid, succinic acid, glutaric acid, adipic acid; benzoic acid, phthalic acid, isophthalic acid, terephthalic acid, partial Triglyceride trimesic acid, hemi me 11 itic aci d, trimesic acid, pentane carboxylic acid, mellitic acid, etc. Group carboxylic acid. Further, the carboxylic acid having a hydroxyl group is exemplified by lactic acid, malic acid, citric acid, and salicylic acid. Further, an aromatic carboxylic acid having a substituent of a chargeable electron or a power supply on the aromatic carboxylic acid and a change in the acidity of the aromatic carboxylic acid by a substituent may be used. Although the acidity of the carboxylic acid is higher, the flux activity tends to be increased, but when the acidity is too high, the reliability of the insulation is lowered. The electron-donating substituents which increase the acidity of the carboxylic acid are exemplified by a nitro group, a cyano group, a trifluoromethyl group, a halogen group and a phenyl group. The power-supplying substituent which weakens the acidity of the carboxylic acid is exemplified by a methyl group, an ethyl group, an isopropyl group, a tert-butyl group, a dimethylamino group and a trimethylamino group. Further, the number or position of the above substituents is not particularly limited as long as the fluxing activity or the insulating reliability is not lowered. (Other components) The adhesive composition of the present embodiment may be formulated with other materials in addition to the component (c) to control the viscosity or physical properties of the cured product, and suppress the occurrence of voids or increase in moisture absorption rate when the semiconductor wafer and the substrate are joined. . -33- 201229176 For insulating materials, insulating inorganic materials, whiskers or resin materials can be used. As the insulating inorganic pigment, whisker or resin binder, the same components as the above component (c) can be used. These materials, whiskers and resin materials may be used singly or in combination of two or more. The shape, average particle size and content of the dip material are not particularly limited. Further, an additive such as an antioxidant, a decane coupling agent, a titanium coupling agent, a leveling agent or an ion trapping agent may be formulated in the adhesive composition of the present embodiment. These may be used alone or in combination of two or more. These adjustment amounts may be appropriately adjusted so as to exhibit the effects of the respective additives. The adhesive composition of this embodiment can be formed into a film shape. Hereinafter, a method of producing a film-form adhesive using the adhesive composition of the present embodiment will be described. First, the component (a), the component (b), the component (C), and the component (d) or the component (e) to be added as needed are added to an organic solvent, and are dissolved or dispersed by stirring, kneading, or the like. , modulating resin paint. Subsequently, after the resin paint is applied onto the substrate film subjected to the release treatment using a knife coater, a roll coater or an applicator, the organic solvent is removed by heating, thereby obtaining the base film. Film-like adhesive. The organic solvent used in the preparation of the resin lacquer is preferably one having a property of uniformly dissolving or dispersing the components, and is exemplified by, for example, dimethylformamide, dimethylacetamide, N-methyl-2. - pyrrolidone, dimethyl hydrazine, diethylene glycol dimethyl ether, toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl cellosolve, ethyl cellosolve acetate, butyl cellosolve , dioxane, cyclohexanone, and ethyl acetate. These organic solvents may be used singly or in combination of two or more. Mixing or mixing during the preparation of the resin paint -34- 201229176 The practice can be carried out using, for example, a mixer, a kneading machine, a triaxial roll, a ball mill and a homogenizer. The base film is not particularly limited as long as it has heat resistance to the organic solvent, and can be exemplified by a polyolefin film such as a polymethylpentene film, polyterephthalic acid or polyethylene naphthalate. A polyester film such as an ester film or a polyimide film. The base film is not limited to the film layers, and may be a plurality of layers of thinner enamel made of two or more kinds of materials, so that the organic solvent is self-coated on the base film, and the drying condition of the resin paint is preferably an organic solvent. The condition of sufficient evaporation is carried out at 50 to 200 ° C for 0.1 to 90 minutes. Further, the adhesive composition of the present embodiment can be directly spin-coated on a wafer as needed, and can be used as needed for wafer singulation. <Semiconductor device> For use in the semiconductor device of the present embodiment Figure 1 and. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a perspective view showing an embodiment of a semiconductor device of the present invention. As shown in FIG. 1(a), the semiconductor device 100 has a semiconductor wafer 10 and a substrate (circuit wiring substrate) 20, and the semiconductor wafer 10 and the wiring 15 of the substrate 20 on the mutually opposing surfaces of the semiconductor wafer 10 and the substrate 20 are mutually After connecting 3 〇, the semiconductor wafer 10 and the substrate 20 are mixed with the composition 40 of the substrate. The semiconductor wafer 10 and the substrate 20 are a mixture of a propylene film, an ethylene diester film, an amine film, and a polyimide. In the case of the dry body during volatilization, it is better to work dry. After the description of the dry state, the schematic cross-sections of the following states are arranged on the E line 15 so that the gaps of the bumps are connected to each other by the wiring 1 5 . -35- 201229176 and connecting bumps 30 to form a crystal connection. The wiring 15 and the connection bump 30 are sealed from the external environment by the adhesive composition 40. As shown in FIG. 1(b), the semiconductor device 200 has the semiconductor wafer 1 and the substrate 20 facing each other, respectively. The bumps 32 on the mutually opposing faces of the semiconductor wafer and the substrate 20 are filled with the adhesive composition 40 in the gap between the semiconductor wafer 10 and the substrate 20 without any gap. The semiconductor wafer 1 and the substrate 20 are flip-chip bonded by connecting the opposing bumps 32 to each other. The bumps 32 are isolated from the external environment by encapsulation of the adhesive composition 40. Fig. 2 is a schematic cross-sectional view showing another embodiment of the semiconductor device of the present invention. As shown in Fig. 2(a), the semiconductor device 300 is the same as the semiconductor device 100 except that the two semiconductor wafers 10 are flip-chip bonded by the wiring 15 and the connection bumps 30. As shown in Fig. 2(b), the semiconductor device 400 is the same as the semiconductor device 200 except that the two semiconductor wafers 1 are flip-chip bonded by the bumps 32. The semiconductor wafer 10 is not particularly limited, and an elemental semiconductor composed of elements of the same type such as ruthenium or osmium, a compound semiconductor such as gallium arsenide or indium arsenide can be used. The substrate 20 is not particularly limited as long as it is a circuit board, and may be used as a main component of a glass epoxy resin, a polyimide, a polyester, a ceramic, an epoxy resin, or a bismaleimide triazine. a circuit board formed by etching a wiring (wiring pattern) 15 formed on an unnecessary portion of the metal film on the surface of the insulating substrate, and a circuit board on which the wiring 15 is formed by metal plating or the like on the surface of the insulating substrate. Printing on the surface of the substrate

-36- S 201229176 導電性物質而形成配線1 5之電路基板。 配線15或凸塊32等之連接部含有金、銀、銅、焊料 (主成分爲例如錫-銀、錫-鉛、錫-鉍、錫-銅、錫-銀-銅 )、鎳、錫、鉛等作爲主成分,亦可含有複數種之金屬。 上述金屬中,就成爲連接部之電傳導性·熱傳導性優 異之封裝之觀點而言,較好爲金 '銀及銅,更好爲銀及銅 。就成爲減低成本之封裝之觀點而言,且基於便宜較好爲 銀、銅及焊料,更好爲銅及焊料,又更好爲焊料。在室溫 下於金屬表面形成氧化膜時會有生產性下降之情況或成本 增加之情況,故就抑制氧化膜形成之觀點而言較好爲金、 銀、銅及焊料,更好爲金、銀、焊料,又更好爲金、銀。 上述配線1 5及凸塊3 2之表面上亦可藉由例如電鍍形 成以金、銀、銅、焊料(主成分爲例如錫-銀、錫-鉛、錫-鉍、錫-銅)、錫、鎳等作爲主成分之金屬層。該金屬層 可僅以單一成分構成,亦可由複數種成分構成。又,上述 金屬層可爲單層或層合複數層之金屬層而成之構造。 又,本實施形態之半導體裝置亦可複數層合如半導體 裝置10 0〜4 0 0所示之構造(封裝)。該情況下,半導體裝 置100~400亦可以含有金、銀、銅、焊料(主成分爲例如 錫-銀、錫-鉛、錫-鉍、錫-銅、錫-銀-銅)、錫、鎳等之 凸塊或配線相互電性連接。 至於複數層合半導體裝置之方法列舉爲圖3所示之例 如TSV (穿矽通孔)技術。圖3爲顯示本發明之半導體裝 置之另一實施形態之示意剖面圖,爲使用TSV技術之半導 芑· -37- 201229176 體裝置。圖3所示之半導體裝置5 〇 〇係藉由透過連接凸塊 30連接中介片(interposer) 50上形成之配線15與半導 體晶片10之配線15而連接,使半導體晶片10與中介片 5 0覆晶連接。於半導體晶片1 〇與中介片5 0間之空隙中無 間隙地塡充接著劑組成物40。上述半導體晶片1 〇中之與 中介片50成相反側之表面上透過配線15、連接凸塊30及 接著劑組成物40重複層合半導體晶片1〇。半導體晶片10 之表背中之圖型面之配線15係藉由塡充於貫穿半導體晶 片10內部之孔內之貫穿電極34相互連接。又,貫穿電極 34之材質可使用銅、鋁等。 藉由該TSV技術,亦可自通常未使用之半導體晶片之 背面取得信號。而且,由於半導體晶片10內之貫穿電極 34係垂直通過,故縮短對向之半導體晶片10之間或半導 體晶片1〇及中介片50間之距離,且可柔軟地連接。本實 施形態之接著劑組成物在此種TSV技術中,可使用作爲對 向之半導體晶片1 〇之間、或半導體晶片1 〇及中介片50 之間之半導體封裝用接著劑。 又,藉由區域凸塊晶片技術等之自由度高之凸塊形成 方法,可不透過中介片就此將半導體晶片直接安裝於主機 板上β本實施形態之接著劑組成物亦可使用於將該種半導 體晶片直接安裝於主機板上之情況。又’本實施形態之接 著劑組成物在層合兩片配線電路基板之情況下’亦可使用 於封裝基板間之空隙。 -38- 201229176 〈半導體裝置之製造方法〉 針對本實施形態之半導體裝置之製造方法,使用圖4 說明於下。圖4爲示意性顯示本發明之半導體裝置之製造 方法之一實施形態之步驟剖面圖。 首先,如圖4(a)所示,於具有配線15之基板20上 ,在形成連接凸塊3 0之位置形成具有開口之抗焊劑60。 該抗焊劑60並不一定需要設置。然而,藉由於基材20上 設置抗焊劑,可抑制配線1 5間之橋接發生,可提高連接 信賴性絕緣信賴性。抗焊劑60可使用例如市售之封裝 用抗焊劑用油墨而形成。市售之封裝用抗焊劑用油墨具體 而言列舉爲SR系列(日立化成工業股份有限公司製造, 商品名)及PSR4000-AUS系列(太陽油墨製造(股)製 造,商品名)。 接著,如圖4 ( a )所示,於抗焊劑6 0之開口形成連 接凸塊30。接著,如圖4(b)所示,於形成連接凸塊30 及抗焊劑60之基板20上貼附薄膜狀接著劑組成物(以下 ,視情況稱爲「薄膜狀接著劑」)40。薄膜狀接著劑40 之貼附可藉由加熱壓製、輥層合、真空層合等進行。薄膜 狀接著劑40之供給面積或厚度可依據半導體晶片1 0及基 板20之尺寸,或依據連接凸塊30之高度而適當設定。 將如上述之薄膜狀接著劑40貼附於基板20上之後, 使用覆晶固晶等之連接裝置使半導體晶片1 〇之配線1 5與 連接凸塊30對準。接著’在連接凸塊30之熔點以上之溫 度邊加熱半導體晶片1〇與基板20邊壓著’且如圖4(c) -39- 201229176 所τκ,連接半導體晶片10與基板20,同時利 著劑40封裝塡充半導體晶片1〇及基板20間 據上述,獲得半導體裝置600。 本實施形態之半導體裝置之製造方法亦可 暫時固定(介隔半導體接著劑之狀態),以回 熱處理,藉此使連接凸塊30熔融而連接半導骨 基板20。於暫時固定之階段由於不一定需要形 ,故相較於上述邊加熱邊壓著之方法,可藉由 時間、低溫度進行壓著,可提升生產性同時抑 劣化。 又’使半導體晶片10與基板2 0連接後, 行加熱處理,亦可進一步提高連接信賴性、絕 加熱溫度較好爲薄膜狀接著劑進行硬化之溫度 全硬化之溫度。加熱溫度、加熱時間係適當設: 本實施形態之半導體裝置之製造方法亦可 接著劑40貼附於半導體晶片1 〇上之後連接基: 亦可在藉由配線15及連接凸塊30連接半導體 基板20後,於半導體晶片1〇及基板20間之 糊狀接著劑組成物。 就提高生產性之觀點而言,亦可將接著劑 於連接有複數之半導體晶片10之半導體晶圓 切片而單片化,獲得於半導體晶片1 0上供給 成物之構造體。又,於接著劑組成物爲糊狀時 限制,但只要藉由旋轉塗佈等塗佈方法,埋塡 用薄膜狀接 之空隙。依 在對位上後 焊爐進行加 I晶片1 0與 成金屬接合 低荷重、短 制連接部之 以烘箱等進 緣信賴性。 ,更好爲完 定。 於將薄膜狀 板20 °又, 丨晶片1 〇及 空隙中塡充 組成物供給 之後,藉由 有接著劑組 ,雖無特別 半導體晶片 3 •40- 201229176 於塡 由埋 ’ 因 下制 況抑 情可 該時 。 同 可, 即性 化產 勻生 均高 度提 厚可 使故 , 定塊一 凸爲 或量 線給 配供 之之 上 旨 月 10樹 不足造成之孔洞發生及切片性之降低。另一方面,接著劑 組成物爲薄膜狀之情況雖亦無特別限制,但只要藉由加熱 壓製、輥層合及真空層合等貼附方式以將半導體晶片10 上之配線或凸塊埋入之方式供給薄膜狀之樹脂組成物即可 。該情況下,由於樹脂之供給量爲一定故可提高生產性, 可抑制因埋塡不足造成之孔洞發生及切片性之降低。 連接荷重係考慮連接凸塊30之數量或高度之偏差、 因加壓造成之連接凸塊30、或承受連接部之凸塊之配線之 變形量而設定。連接溫度較好爲使連接部之溫度爲連接凸 塊3 0之熔點以上’但較好爲形成個別之連接部(凸塊或 配線)之金屬接合之溫度。連接凸塊3〇爲焊接凸塊時較 好約240°C以上。 連接時之連接時間隨著連接部之構成金屬而異,但就 提高生產性之觀點而言’時間愈短愈好。連接凸塊3〇爲 焊接凸塊時’連接時間較好爲20秒以下,更好爲1〇秒以 下,又更好爲5秒以下。於銅-銅或銅-金之金屬連接之情 況,連接時間較好爲6 0秒以下》 關於上述各種封裝構造之覆晶連接部,本發明之接著 劑組成物亦顯示優異之耐回焊性、連接信賴性及絕緣信賴 性。 實施例 -41 - 201229176 以下使用實施例、比較例說明本發明,但本發明並不 受限於以下之實施例。 (聚醯亞胺之合成) 於具備溫度計、攪拌機及氯化鈣管之3 0 OmL燒瓶中饋 入1,12-二胺基十二烷2.10g(0.035莫耳)、聚醚二胺( BASF製造,商品名「ED2000」),分子量:1 923 ) 17_3 1g ( 0.03莫耳)、1,3-雙(3-胺基丙基)四甲基二矽 氧烷(信越化學製造,商品名「LP-7100」)2.61g(0.035 莫耳)及N-甲基-2-吡咯烷酮(關東化學製造,以下稱爲 「NMP」)150g並經攪拌。上述二胺溶解後,邊於冰浴中 使燒瓶冷卻,邊逐次少量添加以乙酸酐再結晶純化之 4,4’- ( 4,4’-異亞丙基二苯氧基)雙(苯二甲酸酐)( ALDRICH 製造,商品名「BPADA」)15_62g(0.1〇 莫耳 )。在室溫反應8小時後,添加二甲苯100g,邊吹入氮氣 邊在180 °C加熱,與水一起共沸去除二甲苯,獲得聚醯亞 胺樹脂。自所得聚醯亞胺樹脂去除溶劑(NMP ),以成爲 固體成分50質量%之方式溶解於甲基乙基酮(MEK)中, 此稱爲「聚醯亞胺A」。聚醯亞胺A之Tg爲3〇°C,重量 平均分子量爲50000,SP値(溶解度參數)爲10.2。 各實施例及比較例中使用之化合物如下° (a )環氧樹脂 •含有三酚甲烷骨架之多官能基固態環氧樹脂(曰本 -42- 201229176 環氧樹脂股份有限公司製造,商品名「EP 1 032H60」,以 下稱爲「EP1 032」)。 •雙酚F型液態環氧樹脂(日本環氧樹脂股份有限公 司製造,商品名「YL983U」,以下稱爲「YL983」)。 •柔軟性環氧樹脂(日本環氧樹脂股份有限公司製造 ,商品名「YL7175」,以下稱爲「YL7175」)。 (b )硬化劑 • 2-苯基- 4.5-二羥基甲基咪唑(四國化成股份有限公 司製造,商品名「2PHZ-PW」,以下稱爲「2PHZ」)》 • 2,4-二胺基-6-[2’-甲基咪唑啉-(1,)]-乙基-s-三嗪 異氰尿酸加成物(四國化成股份有限公司製造,商品名「 2MAOK-PW」,以下稱爲「2MAOK」)。 (c)丙烯酸系表面處理之塡料或具有以上述通式(1)表 示之基之塡料 •甲基丙稀酸表面處理之二氧化砂塡料(Admatechs 股份有限公司製造,商品名「SE2050-SMJ」,平均粒徑 0·5μηι,以下稱爲「SM二氧化矽」)。 •甲基丙烯酸表面處理之奈米二氧化矽塡料( Admatechs股份有限公司製造,商品名「YA050C-SM」, 以下稱爲「SM奈米_氧化砂」)。 (c’)其他塡料-36- S 201229176 Conductive material to form a circuit board of wiring 15. The connection portion of the wiring 15 or the bump 32 or the like contains gold, silver, copper, solder (the main component is, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper), nickel, tin, Lead or the like as a main component may also contain a plurality of metals. Among the above-mentioned metals, from the viewpoint of a package having excellent electrical conductivity and thermal conductivity of the connection portion, gold 'silver and copper are preferable, and silver and copper are more preferable. From the viewpoint of a low-cost package, it is preferably silver, copper, and solder based on cheapness, more preferably copper and solder, and more preferably solder. When an oxide film is formed on a metal surface at room temperature, productivity may decrease or the cost may increase. Therefore, gold, silver, copper, and solder are preferable in terms of suppressing formation of an oxide film, and more preferably gold, Silver, solder, and better for gold and silver. The surface of the wiring 15 and the bump 3 2 may be formed by, for example, electroplating with gold, silver, copper, solder (main components such as tin-silver, tin-lead, tin-bismuth, tin-copper), tin. A metal layer such as nickel or the like as a main component. The metal layer may be composed of only a single component or a plurality of components. Further, the metal layer may have a structure in which a single layer or a metal layer of a plurality of layers is laminated. Further, the semiconductor device of the present embodiment may be laminated in a plurality of structures (packages) as shown in the semiconductor devices 10 to 400. In this case, the semiconductor devices 100 to 400 may contain gold, silver, copper, and solder (the main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper), tin, and nickel. The bumps or wires are electrically connected to each other. The method of the plurality of laminated semiconductor devices is exemplified by the TSV (through-hole via) technique shown in Fig. 3. Fig. 3 is a schematic cross-sectional view showing another embodiment of the semiconductor device of the present invention, which is a semiconductor device using a TSV technology of a semi-conducting 芑 -37-201229176. The semiconductor device 5 shown in FIG. 3 is connected to the wiring 15 of the semiconductor wafer 10 by connecting the wiring 15 formed on the interposer 50 through the connection bump 30, and the semiconductor wafer 10 and the interposer 50 are covered. Crystal connection. The adhesive composition 40 is filled in the gap between the semiconductor wafer 1 and the interposer 50 without gaps. The semiconductor wafer 1 is repeatedly laminated on the surface of the semiconductor wafer 1 opposite to the interposer 50 via the wiring 15, the bump 30, and the composition 40. The wirings 15 of the pattern surface in the front and back of the semiconductor wafer 10 are connected to each other by the through electrodes 34 which are filled in the holes penetrating the inside of the semiconductor wafer 10. Further, copper, aluminum or the like can be used as the material of the through electrode 34. With the TSV technology, signals can also be taken from the back side of a semiconductor wafer that is not normally used. Further, since the through electrodes 34 in the semiconductor wafer 10 pass vertically, the distance between the opposing semiconductor wafers 10 or between the semiconductor wafers 1 and the interposer 50 can be shortened and can be flexibly connected. In the TSV technique of the present embodiment, an adhesive for semiconductor encapsulation between the semiconductor wafers 1 and the semiconductor wafer 1 and the interposer 50 can be used. Further, the bump forming method having a high degree of freedom such as the area bump wafer technique can directly mount the semiconductor wafer on the host board without using the interposer. The adhesive composition of the embodiment can also be used for the kind. The case where the semiconductor wafer is directly mounted on the motherboard. Further, the adhesive composition of the present embodiment can be used for the space between the package substrates when the two wiring circuit substrates are laminated. -38-201229176 <Manufacturing Method of Semiconductor Device> A method of manufacturing the semiconductor device of the present embodiment will be described below with reference to Fig. 4 . Fig. 4 is a cross-sectional view showing the steps of an embodiment of a method of manufacturing a semiconductor device of the present invention. First, as shown in Fig. 4 (a), on the substrate 20 having the wiring 15, a solder resist 60 having an opening is formed at a position where the connection bump 30 is formed. The solder resist 60 does not necessarily need to be provided. However, since the solder resist is provided on the substrate 20, bridging between the wirings 15 can be suppressed, and the reliability of the connection reliability can be improved. The solder resist 60 can be formed using, for example, a commercially available ink for soldering for package. Commercially available inks for package solder resists are specifically listed as SR series (manufactured by Hitachi Chemical Co., Ltd., trade name) and PSR4000-AUS series (manufactured by Sun Ink Manufacturing Co., Ltd., trade name). Next, as shown in Fig. 4 (a), the connection bumps 30 are formed in the openings of the solder resist 60. Next, as shown in FIG. 4(b), a film-like adhesive composition (hereinafter referred to as "film-like adhesive") 40 is attached to the substrate 20 on which the connection bumps 30 and the solder resist 60 are formed. The attachment of the film-like adhesive 40 can be carried out by heat pressing, roll lamination, vacuum lamination, or the like. The supply area or thickness of the film-like adhesive 40 can be appropriately set depending on the size of the semiconductor wafer 10 and the substrate 20, or depending on the height of the connection bumps 30. After the film-like adhesive 40 as described above is attached to the substrate 20, the wiring 1 5 of the semiconductor wafer 1 is aligned with the connecting bump 30 by using a bonding device such as a flip chip. Then, 'the semiconductor wafer 1 and the substrate 20 are pressed while being heated at a temperature higher than the melting point of the connection bump 30, and the semiconductor wafer 10 and the substrate 20 are connected as shown in FIG. 4(c)-39-201229176, while being profitable. The agent 40 is packaged between the semiconductor wafer 1 and the substrate 20, and the semiconductor device 600 is obtained as described above. The method of manufacturing the semiconductor device of the present embodiment can be temporarily fixed (in a state in which the semiconductor adhesive is interposed), and heat-treated to fuse the connection bumps 30 to connect the semiconductor substrate 20. Since it is not necessarily required to be in the stage of temporary fixation, it can be pressed by time and low temperature to improve productivity while suppressing deterioration. Further, after the semiconductor wafer 10 is connected to the substrate 20, heat treatment is performed, and the temperature at which the connection reliability and the heat-insulation temperature are preferably the temperature-hardening of the film-form adhesive is hardened. The heating temperature and the heating time are appropriately set: The method of manufacturing the semiconductor device of the present embodiment may be followed by attaching the adhesive 40 to the semiconductor wafer 1 after the connection: the semiconductor substrate may be connected by the wiring 15 and the connection bump 30. After 20, a paste-like adhesive composition between the semiconductor wafer 1 and the substrate 20 is formed. From the viewpoint of improving productivity, the semiconductor wafer of a plurality of semiconductor wafers 10 connected thereto may be diced and singulated to obtain a structure in which a semiconductor wafer 10 is supplied with a product. Further, when the adhesive composition is in the form of a paste, it is limited by a coating method such as spin coating. After the alignment is performed, the soldering furnace is subjected to the addition of the I wafer 10 and the metal bonding. The low load and the short connection portion are stabilized by an oven or the like. Better to complete. After the film-like sheet 20°, the tantalum wafer 1 〇 and the interstitial filling composition are supplied, there is no special semiconductor wafer by the adhesive group 3 • 40-201229176 Love can be. The same can be achieved, that is, the homogenization of the production is uniform and the height can be increased, so that the block is convex or the line is given to the distribution. The hole caused by the shortage of 10 trees is reduced and the slicing property is reduced. On the other hand, the case where the adhesive composition is in the form of a film is not particularly limited, but the wiring or the bump on the semiconductor wafer 10 is buried by means of attachment such as heat pressing, roll lamination, and vacuum lamination. It is sufficient to supply a film-like resin composition. In this case, since the supply amount of the resin is constant, the productivity can be improved, and the occurrence of voids due to insufficient burying and the deterioration of the slicing property can be suppressed. The connection load is set in consideration of the variation in the number or height of the connection bumps 30, the connection bump 30 due to pressurization, or the amount of deformation of the wiring which receives the bumps of the connection portion. The connection temperature is preferably such that the temperature of the connection portion is equal to or higher than the melting point of the connection bump 30, but it is preferably a temperature at which metal joining of the individual connection portions (bumps or wiring) is formed. When the connecting bump 3 is a solder bump, it is preferably about 240 ° C or higher. The connection time at the time of connection varies depending on the constituent metal of the connection portion, but the shorter the time, the better the productivity is. When the connecting bump 3 is a solder bump, the connection time is preferably 20 seconds or less, more preferably 1 second or less, and still more preferably 5 seconds or less. In the case of copper-copper or copper-gold metal connection, the connection time is preferably 60 seconds or less. With respect to the flip chip connection portion of the above various package structures, the adhesive composition of the present invention also exhibits excellent reflow resistance. , connection reliability and insulation reliability. Embodiments - 41 - 201229176 Hereinafter, the present invention will be described using examples and comparative examples, but the present invention is not limited to the following examples. (Synthesis of Polyimine) In a 30 mL flask equipped with a thermometer, a stirrer and a calcium chloride tube, 1,12-diaminododecane 2.10 g (0.035 mol), polyether diamine (BASF) was fed. Manufactured under the trade name "ED2000", molecular weight: 1 923 ) 17_3 1g (0.03 mol), 1,3-bis(3-aminopropyl)tetramethyldioxane (manufactured by Shin-Etsu Chemical Co., Ltd., trade name " LP-7100") 2.61 g (0.035 mol) and N-methyl-2-pyrrolidone (manufactured by Kanto Chemical Co., Ltd., hereinafter referred to as "NMP") 150 g and stirred. After the above diamine was dissolved, the flask was cooled in an ice bath, and 4,4'-(4,4'-isopropylidenediphenoxy)bis(benzene) was recrystallized and purified by acetic anhydride. Formic anhydride) (manufactured by ALDRICH, trade name "BPADA") 15_62g (0.1〇mol). After reacting for 8 hours at room temperature, 100 g of xylene was added, and the mixture was heated at 180 ° C while blowing nitrogen gas to azeotropically remove xylene with water to obtain a polyimide resin. The solvent (NMP) was removed from the obtained polyimine resin, and dissolved in methyl ethyl ketone (MEK) so as to be 50% by mass of the solid content. This is called "polyimine A". Polyethylenimine A had a Tg of 3 〇 ° C, a weight average molecular weight of 50,000, and an SP 値 (solubility parameter) of 10.2. The compounds used in the respective examples and comparative examples are as follows: (a) epoxy resin; polyfunctional solid epoxy resin containing a trisphenol methane skeleton (manufactured by Sakamoto-42-201229176 Epoxy Resin Co., Ltd., trade name " EP 1 032H60", hereinafter referred to as "EP1 032"). • Bisphenol F-type liquid epoxy resin (manufactured by Nippon Epoxy Resin Co., Ltd., trade name "YL983U", hereinafter referred to as "YL983"). • Flexible epoxy resin (manufactured by Nippon Epoxy Resin Co., Ltd., trade name "YL7175", hereinafter referred to as "YL7175"). (b) Hardener • 2-Phenyl-4.5-dihydroxymethylimidazole (manufactured by Shikoku Chemicals Co., Ltd., trade name “2PHZ-PW”, hereinafter referred to as “2PHZ”)” • 2,4-Diamine -6-[2'-Methylimidazoline-(1,)]-ethyl-s-triazine isocyanuric acid (manufactured by Shikoku Kasei Co., Ltd., trade name "2MAOK-PW", below Called "2MAOK"). (c) Acrylic-based surface-treated slag or sulphuric acid grit material having a surface treated with the above-mentioned general formula (1) and methyl methacrylate (manufactured by Admatechs Co., Ltd., trade name "SE2050" -SMJ", an average particle diameter of 0·5 μηι, hereinafter referred to as "SM dioxide". • A methacrylic acid surface treated nano cerium oxide material (manufactured by Admatechs Co., Ltd., trade name "YA050C-SM", hereinafter referred to as "SM Nano _ oxidized sand"). (c’) Other information

S -43- 201229176 •未處理之二氧化矽塡料(Admatechs股份有限公司 製造,商品名「SE205 0」,平均粒徑〇.5μιη,以下稱爲「 未處理二氧化砂」)。 .胺基矽烷處理之二氧化矽塡料(Admatechs股份有 限公司製造,商品名「SE2050-SXJ」,平均粒徑0·5μηι, 以下稱爲「SX二氧化矽」)。 -環氧矽烷處理之二氧化矽塡料(Admatechs股份有 限公司製造,商品名「SE2050-SEJ」,平均粒徑0.5μηι, 以下稱爲「SE二氧化矽」)。 •苯基矽烷處理之二氧化矽塡料(Admatechs股份有 限公司製造,商品名「SE2050-SPJ」,平均粒徑0.5μιη, 以下稱爲「SP二氧化矽」)。 •苯基表面處理之奈米二氧化矽塡料(Admatechs股 份有限公司製造,商品名「YA05OC-SP」,平均粒徑 5 0nm,以下稱爲「SP奈米二氧化矽」)。 •有機塡料(1)(三菱縲縈製造,商品名「W5 5 00 」,以下稱爲「W5 5 00」)。 •有機塡料(2) (ROHM&amp;HASS (股)公司製造’商 品名「EXL-2655」,蕊殻型有機微粒子,以下稱爲「 EXL2655」)。 (d)分子量1 0000以上之高分子成分 .苯氧樹脂(東都化成股份有限公司製造,商品名 ZX1356」 ,Tg:約 71°C,Mw:約 63000,以下稱爲 201229176 ZX1356」)。S -43- 201229176 • Untreated cerium oxide (manufactured by Admatechs Co., Ltd., trade name "SE205 0", average particle size 〇.5μιη, hereinafter referred to as "untreated silica sand"). Amino decane-treated cerium oxide (manufactured by Admatechs Co., Ltd., trade name "SE2050-SXJ", average particle diameter: 0.5 μm, hereinafter referred to as "SX cerium oxide"). - Epoxy decane-treated cerium oxide (manufactured by Admatechs Co., Ltd., trade name "SE2050-SEJ", average particle size 0.5 μηι, hereinafter referred to as "SE cerium oxide"). • Phenyl decane-treated cerium oxide (manufactured by Admatechs Co., Ltd., trade name "SE2050-SPJ", average particle size 0.5 μιη, hereinafter referred to as "SP cerium oxide"). • Phenyl surface treated nano cerium oxide (manufactured by Admatechs Co., Ltd., trade name "YA05OC-SP", average particle size 50 nm, hereinafter referred to as "SP nano cerium oxide"). • Organic Dip (1) (Mitsubishi, manufactured under the trade name “W5 5 00”, hereinafter referred to as “W5 5 00”). • Organic Dip (2) (Manufactured by ROHM &amp; HASS Co., Ltd.) Product name "EXL-2655", core-shell type organic fine particles, hereinafter referred to as "EXL2655"). (d) A polymer component having a molecular weight of 10,000 or more. A phenoxy resin (manufactured by Tohto Kasei Co., Ltd., trade name: ZX1356), Tg: about 71 ° C, Mw: about 63,000, hereinafter referred to as 201229176 ZX1356").

如上述合成之聚醯亞胺A (e )助焊活性劑(助焊劑) •二酚酸(東京化成股份有限公司製造) •己二酸(和光純藥工業股份有限公司製造) 〈半導體封裝用薄膜狀接著劑之製作〉 (實施例1 ) 以使固體成分成爲60質量%之方式饋入環氧樹 EP1032) 100質量份、硬化劑(2PHZ) 7.5質量份、 (S Μ二氧化矽)1 7 5質量份、助焊活性劑(二酸酸 質量份以及ΜΕΚ溶劑,添加與固體成分等量之 0.8mm之珠粒及直徑2.0mm之珠粒,以珠粒硏磨機( FRITSCH股份有限公司’行星型微粉碎機rP_7」) 3〇分鐘。接著,添加100質量份(換算固體成分)之 亞胺A,再以珠粒硏磨機攪拌3 〇分鐘後,過濾去除 所使用之珠粒,獲得樹脂漆料。 以小型精密塗佈裝置(廉井精機製造)將所得樹 料塗佈於基材薄膜(帝人杜邦薄膜股份有限公司製造 品名「PUREX A53」)上,且在乾淨烘箱(ESPEC股 限公司製造)中,在70 °C乾燥1〇分鐘,製作薄膜狀 劑。 脂( 塡料 )25 直徑 曰本 攪拌 聚醯 攪拌 脂漆 ,商 份有 接著 -45- 201229176 (實施例2〜3及比較例1〜6) 除將使用之原材料組成變更爲如下述表1以外,餘與 實施例1同樣,製作實施例2〜3及比較例1之薄膜狀接 著劑。 以下列示實施例及比較例中獲得之薄膜狀接著劑之評 價方法。 〈於26(TC之彈性率之測定〉 將薄膜狀接著劑衝切成特定尺寸(長37mmx寬4mmx 厚0.13mm ),在乾淨烘箱(ESPEC股份有限公司製造) 中,於1 80°C保持3小時使之硬化。硬化後,使用黏彈性 測定裝置(Rheometrics製造,商品名「RASII」),測定 耐回焊性評價時之回焊爐之到達溫度爲260°C之彈性率。 測定係在溫度範圍-30~270°C,升溫速度5°C/分鐘,測定 波長10Hz下進行。 〈吸濕後之於260°C之接著力測定〉 將薄膜狀接著劑衝切成特定尺寸(長5mmx寬5mmx厚 0.025mm),在60°C貼附於矽晶片(長 5mmx寬 5mmx厚 0.725mm,氧化膜塗覆),使用熱壓著試驗機(日立化成 科技股份有限公司製造)壓著於塗覆有抗焊劑(太陽油墨 製造,商品名「AUS308」)之玻璃環氧基板(厚度 0.02mm)上(壓著條件:薄膜狀接著劑之到達溫度1 8 0 °C /10秒/0.5MPa,接著薄膜狀接著劑之到達溫度245 °C/10 -46 -Polyethylenimine A (e) fluxing active agent (flux) synthesized as described above • Diphenolic acid (manufactured by Tokyo Chemical Industry Co., Ltd.) • Adipic acid (manufactured by Wako Pure Chemical Industries Co., Ltd.) <Semiconductor packaging (Production of the film-form adhesive) (Example 1) 100 parts by mass of epoxy resin EP1032), 7.5 parts by mass of hardener (2PHZ), and (S Μ Μ2) were added so that the solid content was 60% by mass. 7 5 parts by mass, fluxing active agent (dicarboxylic acid mass part and hydrazine solvent, adding 0.8 mm of beads and 2.0 mm diameter beads equivalent to solid content to bead honing machine (FRITSCH Co., Ltd.) 'Planetary fine pulverizer rP_7') 3 minutes, and then 100 parts by mass (as solid content) of imine A was added, and the mixture was stirred for 3 minutes in a bead honing machine, and then the beads used were removed by filtration. The resin paint was obtained. The obtained tree material was applied to a base film (manufactured by Teijin DuPont Film Co., Ltd. under the name "PUREX A53") in a small precision coating device (manufactured by Lianjing Seiki), and in a clean oven (ESPEC shares) Limited company system In the case, it is dried at 70 ° C for 1 minute to prepare a film-like agent. Grease (draft) 25 diameter 曰 搅拌 stirring 醯 stirring grease paint, the quotient has been followed -45- 201229176 (Examples 2 to 3 and comparative examples) 1 to 6) Film-like adhesives of Examples 2 to 3 and Comparative Example 1 were produced in the same manner as in Example 1 except that the composition of the raw materials to be used was changed to the following Table 1. In the following Examples and Comparative Examples, Evaluation method of the film-form adhesive obtained. <26 (Measurement of elastic modulus of TC) The film-shaped adhesive was die-cut into a specific size (length 37 mm x width 4 mm x thickness 0.13 mm) in a clean oven (manufactured by ESPEC Co., Ltd.) In the case of curing at 1800 ° C for 3 hours, after hardening, the temperature of the reflow furnace at the time of evaluation of the reflow resistance was 260 using a viscoelasticity measuring device (manufactured by Rheometrics, trade name "RASII"). The modulus of elasticity is measured at a temperature range of -30 to 270 ° C, a temperature increase rate of 5 ° C / min, and a measurement wavelength of 10 Hz. <Measurement of the adhesion force at 260 ° C after moisture absorption > Punching into specific dimensions (length 5mm x width 5mm x thickness 0.0 25mm), attached to a ruthenium wafer (length 5mm x width 5mm x thickness 0.725mm, oxide film coating) at 60 ° C, pressed with a solder resist using a hot pressing tester (manufactured by Hitachi Chemical Co., Ltd.) (Sun ink manufacturing, trade name "AUS308") on a glass epoxy substrate (thickness 0.02 mm) (compression conditions: film-like adhesive reaching temperature of 180 ° C / 10 sec / 0.5 MPa, followed by film Agent arrival temperature 245 °C/10 -46 -

S 201229176 秒/0.5MPa)。接著,在乾淨烘箱中(ESPEC股份有限公 司製造)中後硬化(1 8 01: /3小時)。隨後,放置於8 5 °C 、相對濕度60%之恆溫恆濕器(ESPEC股份有限公司製造 ,商品名「PR-2KP」)中48小時,取出後,在260。(:之 加熱板上使用接著力測定裝置(D AGE公司製造,萬能型 Bond Test DAGE4〇00型),以距離基板之治具高度 0.0 5 m m,治具速度0 · 0 5 m m /秒之條件測定。 〈初期連接性之評價〉 將製作之薄膜狀接著劑衝切成特定尺寸(長8mmx寬 8mmx厚0_025 mm),貼附於玻璃環氧基板(玻璃環氧基 材:420μηι厚,銅配線:9μιη厚,80μιη間距)上,以覆 晶安裝裝置「FCB3」(Panasonic製造,商品名)安裝附 有焊接凸塊之半導體晶片(晶片尺寸:長7mmx寬7mmx高 〇.15mm,凸塊:銅栓柱及焊料,80μηι間距)(安裝條件 :薄膜狀接著劑之到達溫度180°C、10秒鐘、0.5MPa,接 著,薄膜狀接著劑之到達溫度245 °C、10秒鐘、0.5MPa ) 。據此,與圖4同樣地使上述玻璃環氧基板與附有焊接凸 塊之半導體晶片菊鏈(daisy chain )連接,獲得半導體裝 置。 使用電壓計(ADVANTEST製造’商品名「R68 7 1 E」 )測定所得半導體裝置之連接電阻値’藉此評價安裝後可 否初期導通。連接電阻値爲1 1〜1 4Ω時評價爲連接性良好 「A」,其以外之連接電阻値時或產生連接不良(斷開) -47- 201229176 而無法表示電阻値時評價設爲「B」^ 〈耐回焊性之評價〉 使用封裝材(日立化成工業股份有限公司製造,商品 名「CEL9700HF10K」),在 180 °C、6.75 MPa、90 秒之條 件下將上述半導體裝置模製成特定形狀,在乾淨烘箱( E SPEC股份有限公司製造)中,於175 °C硬化5小時,獲 得封裝。接著,使該封裝在JEDEC等級(level ) 2之條件 高溫吸濕後,使封裝通過 IR回焊爐(FURUKAWA ELECTRIC製造,商品名「SALAMANDER」)。以與後述 之初期連接性之評價相同之方法評價回焊後之封裝之連接 性’作爲耐回焊性之評價。未剝離、連接良好之情況設爲 「A」,產生剝離或連接不良而無法表示電阻値之情況設 爲「B」。 〈連接信賴性之評價(耐TCT評價)〉 使用封裝材(日立化成工業股份有限公司製造,商品 名「CEL9700HF10K」),在 180 °C、6.75MPa、90 秒之條 件下將上述半導體裝置模製成特定形狀,在乾淨烘箱( ESPEC股份有限公司製造)中,於175°C硬化5小時,獲 得封裝。將該封裝放入冷熱循環試驗機(ETAC製造,熱 衝擊腔室NT1200)內,流入1mA之電流,以25°C2分鐘 /-55°C 15分鐘/25°C 2分鐘/125°C 15分鐘/25°C 2分鐘作爲一 循環測定連接電阻,評價重複1 〇〇〇次循環後之連接電阻 -48-S 201229176 seconds / 0.5MPa). Subsequently, it was post-hardened in a clean oven (manufactured by ESPEC Co., Ltd.) (1 8 01: /3 hours). Subsequently, it was placed in a thermo-hygrostat (produced by ESPEC Co., Ltd., trade name "PR-2KP") at 85 ° C and a relative humidity of 60% for 48 hours, and taken out at 260. (: The heating plate is equipped with an adhesion measuring device (manufactured by D AGE, Universal Bond Test DAGE 4〇00 type), with a height of 0.0 5 mm from the fixture of the substrate, and a fixture speed of 0 · 0 5 mm / sec. [Evaluation of initial connectivity] The film-form adhesive prepared was die-cut into a specific size (length 8 mm x width 8 mm x thickness 0_025 mm) and attached to a glass epoxy substrate (glass epoxy substrate: 420 μηι thick, copper wiring) A semiconductor wafer with solder bumps is mounted on a flip chip mounting device "FCB3" (manufactured by Panasonic, trade name) on a chip-mounting device (9 μm thick, 80 μm pitch) (wafer size: length 7 mm x width 7 mm x stencil. 15 mm, bump: copper) Bolt and solder, 80μηι spacing) (Installation conditions: film-like adhesive reaches temperature of 180 ° C, 10 seconds, 0.5 MPa, then, film-like adhesive reaches temperature of 245 ° C, 10 seconds, 0.5 MPa) According to this, the glass epoxy substrate and the semiconductor wafer with the solder bumps were daisy-chained in the same manner as in Fig. 4 to obtain a semiconductor device. Using a voltmeter (Manufactured by ADVANTEST), the trade name "R68 7 1 E " ) The connection resistance 値' of the obtained semiconductor device was used to evaluate whether or not the initial connection was possible after the mounting. When the connection resistance 値 was 1 1 to 1 4 Ω, the connection was evaluated as good "A", and when the connection resistance was 値 or the connection was poor (broken) ()) -47- 201229176 When the resistance is not indicated, the evaluation is set to "B". <Evaluation of the reflow resistance.> The package material (manufactured by Hitachi Chemical Co., Ltd., trade name "CEL9700HF10K") is used at 180 °C. The above semiconductor device was molded into a specific shape under the conditions of 6.75 MPa and 90 seconds, and hardened at 175 ° C for 5 hours in a clean oven (manufactured by E SPEC Co., Ltd.) to obtain a package. Then, the package was made in JEDEC. After the high-temperature moisture absorption, the package was passed through an IR reflow furnace (manufactured by FURUKAWA ELECTRIC, trade name "SALAMANDER"), and the package after reflow was evaluated in the same manner as the evaluation of the initial connectivity described later. "Connectivity" is evaluated as reflow resistance. When the film is not peeled off and the connection is good, it is set to "A", and peeling or poor connection may occur, and the resistance may not be indicated. "B". "Evaluation of connection reliability (TCT evaluation)" The package material (manufactured by Hitachi Chemical Co., Ltd., trade name "CEL9700HF10K") was used at 180 ° C, 6.75 MPa, and 90 seconds. The above semiconductor device was molded into a specific shape, and hardened at 175 ° C for 5 hours in a clean oven (manufactured by ESPEC Co., Ltd.) to obtain a package. The package was placed in a thermal cycle tester (manufactured by ETAC, thermal shock chamber NT1200), and a current of 1 mA was flowed in at 25 ° C for 2 minutes / -55 ° C for 15 minutes / 25 ° C for 2 minutes / 125 ° C for 15 minutes. /25 ° C 2 minutes as a cycle to determine the connection resistance, evaluate the connection resistance after repeating 1 〇〇〇 cycle -48-

S 201229176 之變化。與初期之電阻値波形比較經1 000次循環後亦無 太大變化之情況設爲「A」,產生1Ω以上差時設爲「B」 〈絕緣信賴性之評價(耐HAST評價)〉 將製作之薄膜狀接著劑衝切成特定尺寸(長lOmmx寬 5mmx厚25μιη),於聚醯亞胺基板上形成配線銅配線,貼 附於梳型電極基板(配線間距:0.05mm)上,如圖5所示 ,於形成梳型電極90之基板20上層合薄膜狀接著劑40, 製作樣品。又,於圖5,爲方便起見而省略薄膜狀接著劑 之圖示。接著’將樣品置於乾淨供箱(ESPEC股份有限公 司製造)中,在1 8 5 °C保持3小時使之硬化。硬化後,取 出各樣品,置於加速壽命試驗裝置(HIRAYAMA公司製造 ’商品名「PL- 422R8」,條件:130°C /相對濕度85%/200 小時/施加5V )中,測定絕緣電阻。經過200小時,絕緣 電阻爲108Ω以上時評價爲「A」。未達108Ω時評價爲「 Β」。 各實施例及比較例之接著劑組成物之原材料之組成( 單位:質量份)示於表1,各試驗之結果示於表2。 £ -49- 201229176 [表1] 飾例 比較例 1 2 3 1 2 3 4 5 6 EP1032 100 100 69 100 100 100 100 100 69 環氧樹脂 YL983 一 一 23 23 YL7175 - — 7 一 - — — - 7 硬化劑 2PHZ 7. 5 7,5 — 7. 5 7. 5 7. 5 7. 5 7. 5 — 2MAOK — 一 3 - - - — - 3 SM二氧化矽 175 150 SM奈米二氧化矽 - - 70 - - - - 一 - 未處理二氧化矽 - — 46 175 - - - 一 46 SX二氧化矽 - - — - 175 — - — 塡料 SE二氧化矽 一 - - 一 一 175 — - — SP二氧化矽 150 — SP奈米一氧化矽 70 W5500 - 25 — — — - 25 25 EXL2655 一 - 15 — — - 一 - 15 高分子 聚醯亞胺A 100 100 - 100 100 100 100 100 — 成分 2X1356 - - 46 46 奸担刪 —* aPAggfft —mm. 25 25 一 25 25 25 25 25 - 己二酸 - 一 6 一 一 — - 一 6 [表2]Changes in S 201229176. It is set to "A" when there is no change after 1 000 cycles compared with the initial resistance 値 waveform, and "B" when 1 Ω or more is different. <Evaluation of insulation reliability (HAST evaluation)> The film-like adhesive is die-cut into a specific size (length lOmmx width 5 mm x thickness 25 μm), and wiring copper wiring is formed on the polyimide substrate, and is attached to the comb-type electrode substrate (wiring pitch: 0.05 mm), as shown in FIG. As shown in the figure, a film-like adhesive 40 is laminated on the substrate 20 on which the comb-shaped electrode 90 is formed to prepare a sample. Further, in Fig. 5, the illustration of the film-like adhesive is omitted for the sake of convenience. Then, the sample was placed in a clean supply box (manufactured by ESPEC Co., Ltd.) and hardened at 1 85 ° C for 3 hours. After the hardening, each sample was taken out and placed in an accelerated life tester (manufactured by HIRAYAMA Co., Ltd., trade name "PL-422R8", condition: 130 ° C / relative humidity 85% / 200 hours / applied 5 V), and the insulation resistance was measured. After 200 hours, the insulation resistance was 108 Ω or more, and it was evaluated as "A". When it is less than 108 Ω, it is evaluated as "Β". The composition (unit: parts by mass) of the raw materials of the adhesive compositions of the respective examples and comparative examples is shown in Table 1, and the results of the respective tests are shown in Table 2. £ -49- 201229176 [Table 1] Ornamental Comparative Example 1 2 3 1 2 3 4 5 6 EP1032 100 100 69 100 100 100 100 100 69 Epoxy resin YL983 One 23 23 YL7175 - 7 A---- 7 Hardener 2PHZ 7. 5 7,5 — 7. 5 7. 5 7. 5 7. 5 7. 5 — 2MAOK — A 3 - - - - - 3 SM cerium oxide 175 150 SM nano cerium oxide - - 70 - - - - one - untreated cerium oxide - 46 175 - - - one 46 SX cerium oxide - - - - 175 - - - SE SE SE 二 - - - 一 一 175 — - — SP II Cerium oxide 150 — SP nanometer 一 矽 70 W5500 - 25 — — — — 25 25 EXL2655 One - 15 — — — One - 15 Polymer Polyimine A 100 100 - 100 100 100 100 100 — Composition 2X1356 - - 46 46 奸被除—* aPAggfft — mm. 25 25 a 25 25 25 25 25 - adipic acid - one 6 one one - - one 6 [Table 2]

評價 實施例 比較例 1 2 3 1 2 3 4 5 6 260。。彈性率(MPa) 350 220 280 155 180 370 160 220 260 吸濕後260°C接著力(MPa) 3. 3 2. 6 3. 3 2. 4 2. 4 2. 1 2. 3 2 2. 4 初期連接性 A A A A A A A A A 耐回焊性 A A A B B B B B B . 連接信賴性(耐TCT性) A A A A A A A A A 絕緣信賴性(耐HAST性) A A A A A A A A A 3 -50- 201229176 使用丙烯酸系表面處理塡料之實施例1〜3確認吸濕後 在260°C之接著力高,耐回焊性、耐TCT性及耐HAST性 任一特性均優異。 【圖式簡單說明】 圖1爲顯示本發明之半導體裝置之一實施形態之示意 剖面圖。 圖2爲顯示本發明之半導體裝置之另一實施形態之示 意剖面圖。 圖3爲顯示本發明之半導體裝置之另一實施形態之示 意剖面圖。 圖4爲示意性顯示本發明之半導體裝置之製造方法之 一實施形態之步驟剖面圖。 圖5爲顯示絕緣信賴性試驗用之樣品外觀之示意圖。 【主要元件符號說明】 1 〇 :半導體晶片 1 5 :配線(連接部) 2〇 :基板(配線電路基板) 3〇 :連接凸塊 3 2 :凸塊(連接部) 34 :貫穿電極 4〇 :接著劑組成物(薄膜狀接著劑) 50 :中介片Evaluation Example Comparative Example 1 2 3 1 2 3 4 5 6 260. . Elasticity (MPa) 350 220 280 155 180 370 160 220 260 260 ° C after the moisture absorption (MPa) 3. 3 2. 6 3. 3 2. 4 2. 4 2. 1 2. 3 2 2. 4 Initial connection AAAAAAAAA Reflow resistance AAABBBBBB . Connection reliability (TCT resistance) AAAAAAAAA insulation reliability (HAST resistance) AAAAAAAAA 3 -50- 201229176 Example 1 to 3 using acrylic surface treatment materials to confirm moisture absorption It has a high adhesion at 260 ° C and is excellent in any of reflow resistance, TCT resistance and HAST resistance. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device of the present invention. Fig. 2 is a schematic cross-sectional view showing another embodiment of the semiconductor device of the present invention. Fig. 3 is a schematic cross-sectional view showing another embodiment of the semiconductor device of the present invention. Fig. 4 is a cross-sectional view showing the steps of an embodiment of a method of manufacturing a semiconductor device of the present invention. Fig. 5 is a view showing the appearance of a sample for an insulation reliability test. [Description of main component symbols] 1 〇: semiconductor wafer 1 5 : wiring (connection portion) 2 〇: substrate (wiring circuit substrate) 3 〇: connection bump 3 2 : bump (connection portion) 34 : through electrode 4 〇: Substance composition (film-like adhesive) 50 : Interposer

S -51 - 201229176 6 〇 :抗焊劑 9 Ο :梳型電極 100、 200、 300 ' 400、 500、 600 :半導體裝置 -52-S -51 - 201229176 6 〇 : Solder resist 9 Ο : Comb electrode 100, 200, 300 ' 400, 500, 600 : Semiconductor device -52-

Claims (1)

201229176 七、申請專利範圍: 1. 一種接著劑組成物,其係於半導體晶片及配線電路 基板各自的連接部互相電連接的半導體裝置、或複數的半 導體晶片各自的連接部互相電連接的半導體裝置中密封前 述連接部的接著劑組成物,其中 該接著劑組成物含有環氧樹脂、硬化劑、與經具有以 下述通式(1)表示之基的化合物表面處理之丙烯酸系表面處 理塡料; [化1] R1 Ο201229176 VII. Patent application scope: 1. An adhesive composition which is a semiconductor device in which a connection portion of each of a semiconductor wafer and a printed circuit board is electrically connected to each other, or a semiconductor device in which respective connection portions of a plurality of semiconductor wafers are electrically connected to each other An adhesive composition for sealing the joint portion, wherein the adhesive composition contains an epoxy resin, a hardener, and an acrylic surface treatment material surface-treated with a compound having a group represented by the following formula (1); [Chemical 1] R1 Ο (1) (I II I h2C=C-C-0 [式(1)中,R1表示氫原子或碳數1或2之烷基,R2表 不碳數1~30之伸院基]。 2.如申請專利範圍第1項之接著劑組成物,其中前述 化合物爲以下述通式(2)表示之化合物; [化2] R1 0 H2c=c—C—Ο—R2—S|~4〇R3)3 (2) [式(2)中,R1表示氫原子或碳數1或2之烷基,R2表 示碳數1〜30之伸烷基,R3表示碳數1〜30之烷基]。 3 . —種接著劑組成物,其係於半導體晶片及配線電路 •53- 201229176 基板各自的連接部互相電連接的半導體裝置、或複數的半 導體晶片各自的連接部互相電連接的半導體裝置中密封前 述連接部的接著劑組成物,其中 該接著劑組成物含有環氧樹脂、硬化劑、與具有以下 述通式(1)表示之基的塡料; [化3] R1 Ο(1) (I II I h2C=CC-0 [In the formula (1), R1 represents a hydrogen atom or an alkyl group having 1 or 2 carbon atoms, and R2 represents a stretching group having a carbon number of 1 to 30]. The adhesive composition of claim 1, wherein the compound is a compound represented by the following formula (2); [Chemical 2] R1 0 H2c=c-C-Ο-R2—S|~4〇R3) 3 (2) In the formula (2), R1 represents a hydrogen atom or an alkyl group having 1 or 2 carbon atoms, R2 represents an alkylene group having 1 to 30 carbon atoms, and R3 represents an alkyl group having 1 to 30 carbon atoms. 3. An adhesive composition which is sealed in a semiconductor device in which a semiconductor wafer and a wiring circuit are connected to each other at a connection portion of a substrate, or a connection portion in which a plurality of semiconductor wafers are electrically connected to each other An adhesive composition of the above-mentioned joint portion, wherein the adhesive composition contains an epoxy resin, a hardener, and a mash having a group represented by the following formula (1); [Chemical 3] R1 Ο (I II 2 m2C=C—C—Ο—-R2 [式(1)中,R1表示氫原子或碳數1或2之烷基,R2表 示碳數1〜30之伸烷基]。 4.如申請專利範圍第1至3項中任一項之接著劑組成 物,其係進一步含有重量平均分子量爲10000以上之高分 子成分。 5 ·如申請專利範圍第4項之接著劑組成物,其中前述 高分子成分之重量平均分子量爲3000G以上、玻璃轉移溫 度爲100°C以下。 6. 如申請專利範圍第1至5項中任一項之接著劑組成 物’其係進一步含有助熔活性劑。 7. 如申請專利範圍第1至6項中任一項之接著劑組成 物,其形狀係薄膜狀。 8. —種半導體裝置之製造方法,其係半導體晶片及配 線電路基板各自的連接部互相電連接的半導體裝置、或複 -54 201229176 數的半導體晶片各自的連接部互相電連接的半導體裝置之 製造方法,其具備 使用如申請專利範圍第1至7項中任一項之接著劑組 成物,將前述連接部密封之步驟。 9. 如申請專利範圍第8項之製造方法,其中前述連接 部係含有由金、銀、銅、鎳、錫及鉛所成之群組中選出之 至少一種金屬作爲主要成分。 10. —種半導體裝置,其係藉由如申請專利範圍第8 或9項之製造方法而得。 _S -55-(I II 2 m2C=C—C—Ο—R2 [In the formula (1), R1 represents a hydrogen atom or an alkyl group having 1 or 2 carbon atoms, and R2 represents an alkylene group having 1 to 30 carbon atoms]. The adhesive composition according to any one of claims 1 to 3, further comprising a polymer component having a weight average molecular weight of 10,000 or more. 5. The adhesive composition of claim 4, wherein The polymer component has a weight average molecular weight of 3,000 G or more and a glass transition temperature of 100 ° C or less. 6. The adhesive composition of any one of claims 1 to 5 further contains a fluxing active agent. 7. The adhesive composition according to any one of claims 1 to 6, wherein the shape is a film. 8. A method of manufacturing a semiconductor device, which is a connection portion between a semiconductor wafer and a printed circuit board. A method of manufacturing a semiconductor device in which a semiconductor device electrically connected to each other or a connection portion of each of the plurality of semiconductor wafers of the plurality of semiconductor chips is electrically connected to each other, which is provided with an adhesive composition according to any one of claims 1 to 7. Object, before The method of manufacturing the sealing portion of the invention, wherein the connecting portion contains at least one metal selected from the group consisting of gold, silver, copper, nickel, tin, and lead. Main component 10. A semiconductor device obtained by the manufacturing method of claim 8 or 9. _S -55-
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI554530B (en) * 2012-10-08 2016-10-21 國立臺灣大學 Polymer, gel electrolyte made of the polymer and the preparing method thereof

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101455951B1 (en) * 2010-09-30 2014-10-28 히타치가세이가부시끼가이샤 Adhesive composition, method for manufacturing semiconductor device, and semiconductor device
JP2013221121A (en) * 2012-04-18 2013-10-28 Mitsubishi Chemicals Corp Coating solution of interlayer filler composition for three-dimensional multi-layer semiconductor device
JP2013221122A (en) * 2012-04-18 2013-10-28 Mitsubishi Chemicals Corp Interlayer filler composition for three-dimensional multi-layer semiconductor device and coating solution thereof
SG11201406941TA (en) * 2012-04-26 2014-11-27 Furukawa Electric Co Ltd Film adhesive composition, method for producing the same, film adhesive, semiconductor package using the film adhesive, and method for manufacturing the semiconductor package
JP6065495B2 (en) * 2012-09-25 2017-01-25 東レ株式会社 Electronic components and power semiconductor devices
WO2014199843A1 (en) 2013-06-13 2014-12-18 東レ株式会社 Resin composition, resin sheet, and production method for semiconductor device
JP6368990B2 (en) * 2013-06-26 2018-08-08 日本ゼオン株式会社 Particle mixture of optical adhesive composition, optical adhesive composition, and method for producing optical adhesive layer
JP2015030745A (en) * 2013-07-31 2015-02-16 住友ベークライト株式会社 Resin composition, semiconductor device, multilayer circuit board, and electronic component
JP2015129247A (en) * 2014-01-09 2015-07-16 住友ベークライト株式会社 Resin composition, adhesive film, adhesive sheet, dicing tape integrated adhesive sheet, back grind tape integrated adhesive sheet, dicing tape and back grind tape integrated adhesive sheet, and electronic device
US20170135227A1 (en) * 2014-06-19 2017-05-11 Alpha Metals, Inc. Engineered Residue Solder Paste Technology
WO2016088859A1 (en) * 2014-12-05 2016-06-09 日立化成株式会社 Semiconductor adhesive, and semiconductor device and method for manufacturing same
CN105081614B (en) * 2015-09-07 2017-08-04 东莞市富默克化工有限公司 A kind of pre- preserved material of OSP
US10734350B2 (en) * 2016-05-09 2020-08-04 Hitachi Chemical Company, Ltd. Method for manufacturing semiconductor device
KR102538175B1 (en) 2016-06-20 2023-06-01 삼성전자주식회사 Semiconductor package
JP2017038081A (en) * 2016-10-27 2017-02-16 住友ベークライト株式会社 Semiconductor device
WO2018105125A1 (en) * 2016-12-09 2018-06-14 日立化成株式会社 Composition, adhesive, sintered body, joined body, and method for producing joined body
KR102290957B1 (en) * 2017-03-31 2021-08-20 주식회사 엘지에너지솔루션 Binder composition for secondary battery, and electrode for secondary battery and lithium secondary battery comprising the same
WO2018235854A1 (en) * 2017-06-21 2018-12-27 日立化成株式会社 Adhesive for semiconductors, method for producing semiconductor device, and semiconductor device
JP7210031B2 (en) * 2017-11-27 2023-01-23 ナミックス株式会社 Film semiconductor sealing material
WO2020071391A1 (en) * 2018-10-02 2020-04-09 日立化成株式会社 Adhesive for semiconductors, method for producing semiconductor device, and semiconductor device
WO2022120715A1 (en) * 2020-12-10 2022-06-16 深圳先进技术研究院 Insulating adhesive film material, preparation method therefor and application thereof

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4197141B2 (en) 2003-08-22 2008-12-17 電気化学工業株式会社 Spherical alumina powder and use thereof
JP2005325210A (en) * 2004-05-13 2005-11-24 Nitto Denko Corp Epoxy resin composition for sealing semiconductor and semiconductor device using the same
JP2006193666A (en) * 2005-01-14 2006-07-27 Sumitomo Bakelite Co Ltd Adhesive film for semiconductor, carrier material having adhesive film for semiconductor and semiconductor device
CN101794638B (en) * 2006-07-21 2012-06-06 日立化成工业株式会社 Circuit connecting material, connecting structure for circuit parts and connecting method for circuit parts
WO2008032620A1 (en) * 2006-09-13 2008-03-20 Sumitomo Bakelite Co., Ltd. Semiconductor device
JP2008085264A (en) 2006-09-29 2008-04-10 Sumitomo Bakelite Co Ltd Semiconductor device
JP2008174624A (en) * 2007-01-17 2008-07-31 Admatechs Co Ltd Surface-treated inorganic powder
JP5309886B2 (en) * 2007-10-22 2013-10-09 日立化成株式会社 Film-like adhesive for semiconductor sealing, method for manufacturing semiconductor device, and semiconductor device
KR101455951B1 (en) * 2010-09-30 2014-10-28 히타치가세이가부시끼가이샤 Adhesive composition, method for manufacturing semiconductor device, and semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI554530B (en) * 2012-10-08 2016-10-21 國立臺灣大學 Polymer, gel electrolyte made of the polymer and the preparing method thereof

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