TW201007862A - Material connection method for metal contact structure - Google Patents

Material connection method for metal contact structure Download PDF

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Publication number
TW201007862A
TW201007862A TW098117502A TW98117502A TW201007862A TW 201007862 A TW201007862 A TW 201007862A TW 098117502 A TW098117502 A TW 098117502A TW 98117502 A TW98117502 A TW 98117502A TW 201007862 A TW201007862 A TW 201007862A
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Taiwan
Prior art keywords
contact
burr
rib
microstructure
contact surface
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TW098117502A
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Chinese (zh)
Inventor
Michael Zwanzig
Stefan Fiedler
Ralf Schmidt
Wolfgang Scheel
Michael Topper
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Fraunhofer Ges Forschung
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Publication of TW201007862A publication Critical patent/TW201007862A/en

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    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
    • H05K3/326—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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  • Engineering & Computer Science (AREA)
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  • Metallurgy (AREA)
  • Wire Bonding (AREA)

Abstract

The invention relates to a material connection method for at least two metal contact structures, each of which has a flat or curve contact section with at least a raised tiny structure on the contact face of the contact section so that two contact structures can then be mutually connected. Therefore, the material connection can then be generated between the raised tiny structure and the corresponding contact structure. The characteristic of the invention is to have at least one tiny structure on the contact structure contact face constructed by rib-shape steep grains that are raised and perpendicular to the contact face , each of the rib-shape steep grains having a sharp rib-shape burr with a random shape and size on the contact face. At least two contact structures are mutually connected to make the tiny structure on one contact structure connect the contact face of another contact structure through the rib-shape burr and burr point end.

Description

201007862 六、發明說明： 【發明所屬之技術領域】 本發明係有關一種使至少兩個金屬接點結構材料連接之 方法及裝置，其各具一平坦或彎曲接觸部分，其中至少一 接觸部份的接觸面具有凸起的微結構，使兩接點結構互相 接觸，而至少在微結構與相對的接點結構之間產生材料連 接。 參 【先前技術】 製造高積體微電子元件及系統時，隨著晶片功能密度的 成長，需要高密度的佈線結構以使晶片或積體電路達到電 性接觸。今日微電子所使用的整合技術為所謂的sip (Systems in package)或 s〇p(Systems〇nPackage)，其在 ❹技術上介於將所有功能整合在一矽晶片上的系統單晶片與 將各元件整合在一印刷電路板上的多晶片模組之間。由於 所使甩晶片模組微型化之要求提高，故研發出csp (Chip Size Package)，其晶片封裝外殼只略大於晶片本身，亦參 閲 WO 2003/065448 或 US 590910,晶圓級封裝 WLP(Wafer201007862 VI. Description of the Invention: [Technical Field] The present invention relates to a method and apparatus for joining at least two metal joint structural materials, each having a flat or curved contact portion, wherein at least one contact portion The contact surface has a raised microstructure that causes the two contact structures to contact each other, and at least a material connection between the microstructure and the opposing contact structure. [Prior Art] When manufacturing high-integration microelectronic components and systems, as the functional density of the wafer grows, a high-density wiring structure is required to electrically contact the wafer or integrated circuit. The integration technology used by microelectronics today is the so-called sip (Systems in package) or s〇p (Systems〇nPackage), which is technically based on a system that integrates all functions on a single chip. The components are integrated between multiple wafer modules on a printed circuit board. Csp (Chip Size Package) has been developed due to the increased miniaturization requirements of the chip module. The chip package is only slightly larger than the wafer itself. See also WO 2003/065448 or US 590910, wafer level package WLP ( Wafer

Level package)可以晶圓進行所有1(：封裝步驟封包大小 與晶片大小一致，或亦可進行3D整合。 為達到可靠及持久的電性及機械連接，尤其是微電子元 3 201007862 件及半導體晶片積體電路等，一般皆使用打線接合技術及 其衍生技術，如楔形接合、球形接合、帶形接合或彼此相 對且至少部分重疊之晶片接面，所謂的接墊，構成的列或 陣列’其上方或之間可塗佈導電輔助材料。 塗佈於至少-連接元件晶片接面之輔助材料可為焊料或 焊堆陣列，所謂的焊點凸塊，其例如構成一球柵格陣列bga (BaU Grid Array)。電鍍沉積出之金屬凸塊或一或多個堆疊 參金球構成的所謂金凸塊亦可使連接元件接觸而不使用焊 堆0 所謂的無凸塊覆晶技術經常使用一種橋接導電材料，例 如等向性導電膠。橋接導電顆粒，如非等向性導電膠亦可 使兩接觸元件之接面持久連接。所有將表面具有接面之晶 片翻轉的接觸方法皆屬覆晶技術。 - 曰曰曰圓之連接使用曰曰曰圓接合技術。#原理基本上與兩連接 元件機械連接之材料接觸相同，以導通電流及/或熱能。 金屬材料連接，亦即利用焊堆溶化而接合或接墊金凸塊 無焊料接合，除了使用壓力以外，亦可利用暫時提高溫度 及接合工具（覆晶接合機、晶圓接合機等）局部竊合超音 波而提供所需的能量。相關之技術例如為熱壓接合及熱壓 接超音波接合（TCB )。 由於使用之半導體材料本身或其上方之元件或與其連接 之載體或基板，例如聚合物薄膜，對溫度負荷或壓力負荷 201007862 敏感，故提升覆晶技術之使用性需降低接合使用之能量， 尤其是熱能’亦包括超音波能量。兩者可同時提高覆晶製 程之通過量。此處溫度在川代以下時被稱作低溫製程。 晶片接面及其相應接觸面，所謂的卩以或Level package) can be used for all wafers 1 (: package step size is the same as the size of the wafer, or 3D integration. For reliable and long-lasting electrical and mechanical connections, especially microelectronics 3 201007862 and semiconductor wafers Integral circuits, etc., generally use wire bonding techniques and their derivative techniques, such as wedge bonding, ball bonding, ribbon bonding or wafer junctions that are opposite each other and at least partially overlap, so-called pads, columns or arrays A conductive auxiliary material may be applied above or between. The auxiliary material applied to at least the connecting element wafer junction may be a solder or a stack of solder bumps, so-called solder bumps, which for example form a ball grid array bga (BaU Grid Array). The so-called gold bumps formed by electroplating deposited metal bumps or one or more stacked gold balls can also make the connecting elements contact without using the soldering stack. The so-called bumpless flip chip technology often uses a bridge. a conductive material, such as an isotropic conductive paste. Bridging conductive particles, such as anisotropic conductive paste, can also permanently connect the joints of the two contact elements. The contact method of the wafer flipping of the junction is a flip chip technology. - The round connection is performed using a round joint technique. The # principle is basically the same as the material contact of the mechanical connection of the two connecting elements to conduct current and/or Thermal energy. The connection of metal materials, that is, the solder bumps are used to bond or bond the gold bumps without solder joints. In addition to the pressure, temporary temperature and bonding tools (such as flip chip bonding machines, wafer bonding machines, etc.) can be used. Locally stealing ultrasonic waves to provide the required energy. Related technologies are, for example, thermocompression bonding and thermocompression ultrasonic bonding (TCB). Due to the semiconductor material itself or the components above it or the carrier or substrate connected thereto, For example, polymer film is sensitive to temperature load or pressure load 201007862, so the use of flip chip technology needs to reduce the energy used for bonding, especially thermal energy 'including ultrasonic energy. Both can simultaneously improve the throughput of flip chip process. Here, the temperature is called the low temperature process when it is below the Chuandian. The wafer junction and its corresponding contact surface, so-called 卩 or

Footprint，具有一配合接合方法 〇接〇万在之表面0口質，而為無光澤 或有光澤。所使用焊點凸塊的大小即焊點體積必須配合互 相接觸之接面的大小。焊料熔化時的毛細管力會導致接觸 籲面接觸，其凝固時使其連接。使用大面積bga時的要求 為，陣列所有焊墊需可靠地彼此連接，接面或焊點體積的 大小不均句時無法達到可靠及持久的接觸。 此外，具次結構之接面亦為已知。Cu、Pd及Cu-Pd合金 可在焊墊一側產生樹枝狀晶體，以在接觸之焊球熔化前達 到可逆機械連接’參閱US 5075965。為改良對位及連接， 接面亦可設有凹口，參閱US 6683387B1，或平凹槽，參閱 φ Wen S，Huff D，Lu G-Q (2001) Enhancement of Thermal Fatigue Reliability of Power Semiconductor interconnects using Dimple-Array Solder Joints。Proc 32nd IEEE Power Electronics .Specialists Conference o Vancouver， Canada， 6 月 17-22 日，1926-1931 〇 為使無焊料之覆晶接合（FCB)產生BGA之粗糙焊墊，可 使基礎材料在金屬沉積之前被化學或機械粗糙化，參閱US 58 16478A。亦可在金屬接面增設鑽石顆粒而改良覆晶接合 201007862 之連接，參閱US 6630203 B2。0.5 μιη-5 0 μπι大的鑽石顆粒 可首先被鎳然後被金無電流覆蓋，而在連接時增大產生接 觸的面。亦可使用接觸夾於絕緣導線，其設有晶體表面， 而在利用一彈簧夾緊時確保導線穿過絕緣層而可靠接觸 [ΕΡ1463151Α2] 〇 規則分佈之接觸面次結構，例如柱體或棒體，參閱Wang T，Tung F, Foo L, Dutta V (2001) Studies on a novel φ flip-chip interconnect structure。Pillar bump。 In: Electronic Components and Technology Conference, 2001。 Proceeding, 51st 945-949 (05/29/2001- 06/01/2001, Orlando, FL, USA) ISBN:0-7803-7038-4; Tummala RR, Raj PM, Aggarwal A, Mehrotra G, Koh SW, Bansal S, Tiong TT, Ong CK, Chew J, Vaidyanathan K. Rao V S (2006) Copper Interconnection for High Performance and Fine Pitch Flipchip digital Applications and Ultra-miniaturized RF Module .Application o Fifty-Sixth Electronic Components & Technology Confernce (ECTC) 2006 年 5 月 30 曰-6 月 2 曰， San Diego, USA ° Proceedings, pp. 102-111 }或金字塔形接 觸面，參閱 Watanabe N，Ootani Y, Asano T (2005) Pyramid Bumps for Fine-Pitch Chip-Stack Interconnection。Jpn. J. Appl. Phys. 44: 2751-275 5，可降低接合時需要的壓力及提 高熱負荷下的工作強度。此處上述金凸塊亦可被視作具次 結構之晶圓接面。 201007862 如目標在於使一電路板或另一基板上〇2〇1或〇丨〇〇5晶片 的標準化微被動元件接觸，則通常先使用一膠體預固定接 點，然後再以波焊、紅外線焊接等接合。同樣首先以所謂 的Chip on Board晶片直接封裝技術將封裝晶片或裸晶（即 所謂的bare dies)組裝在基板上，然後進行焊接或接合。 此處放置及接觸步驟之結合亦大為擴大可使用材料之範圍 及提升通過量。 ❹ 上述主動或被動微電子元件之載體及基板可使用不同硬 度及撓性的材料’如半導逋、陶瓷，例如HTCc、織物、 磁磚或顆粒與聚合物、聚合物薄膜、薄膜及紙之複合物。 通常簡單的以連接方式做區分’如剛性-剛性、剛性_撓性、 撓性-撓性。 以提供一種適用經常使用之基板材料的低溫接合方法為 目標時’無凸塊之覆晶技術（BLFC)為最理想方法。 【發明内容】 本發明之目的在於提供一種接面成形方法，使得無凸塊 之覆晶技術（BLFC)可在低溫及溫和的壓力之下達到可靠的 材料連接及電性接觸，而擴大覆晶技術之使用範圍。 本目的由申請專利範圍第1項之特徵部份所述方法達 成。申請專利範圍第17項提出一種使至少兩金屬接點結構 材料連接之裝置。本發明方法之裳置之有利其他設計參閱 201007862 申請專利範圍各附屬項及下述實施例之說明。 本發明使至少兩金屬接點結構材料連接之方法中，接點 結構各具一平坦或彎曲接觸部分，其中至少一接觸部份的 接觸面具有凸起的微結構，使兩接點結構互相接觸，而至 少在微結構與相對的接點結構之間產生材料連接，其特徵 為，首先使至少一接點結構接觸面上的微結構由垂直於接 觸面而凸起的肋狀陡坡晶粒構成，其各具一鋒利肋狀毛 • 刺，該毛刺局部具有一三角形尖端，毛刺在接觸面上的分 佈及其形狀與大小為隨機。接著使兩接點結構受力之作用 而互相連接，使得一接點結構上的微結構以其肋狀毛刺及 毛刺尖端與另一接點結構之接觸面接觸。有利的是使設有 微結構之至少一接點結構至少部份變形及/或以其毛刺尖 端***另一接點結構中，而在兩接點結構之間產生材料連 接。 ® 晶片金屬接面較佳具有複數個完全覆蓋接面之凸起晶粒 肋狀毛刺。特別有利的是，使肋狀陡坡晶粒由與晶片接面 相同的材料構成，故以電鍍沉積出之晶粒與接面之間產生 可承受機械負荷之連接。當然亦可使晶粒由不同於接面的 金屬材料構成。較佳之金屬為金、銀、翻及銅。 以電化學方式沉積在接面上的晶體結構形狀近似微型化 的高山地形，具有複數個相連及/或互相穿插的陡坡晶體肋 片’其具毛刺及尖端’該肋片之形狀及大小為隨機。沉積 201007862 在接面上之晶體結構的平均最大粗糙度一般為Rz 〇〇ΐμιη 至50μιη，尤其是〇.5μηι至1〇μηι。此處各晶粒在底部，亦 即在連接之接面平面上，的縱向長度最大為ι〇〇μιη，尤其 是〇.5μη^ 10μηι，特別是1μιη至5μηι。晶粒底部之橫向 長度最大為2一’尤其是〇·1μιη至1μιη，特別是〇 5μπι 至2μιη。以沉積在接面上的整個晶體結構來看，具可變形 尖端及毛刺之晶粒所佔比例至少為接面的2〇%。此處每一 ❹陡坡晶粒至少具有兩個在毛刺相交的邊緣，其相交角度 α<90尤其疋α<6〇。。此種晶體形狀及大小特別具有穩定 性’而可使兩彼此連結之元件#晶粒形狀穩定地咬合。故 本發明方法使以突出微結構連接的接點結構或接面正面互 相接近時，眾多晶體邊緣及毛刺或肋狀毛刺及尖端在兩接 點結構的複數個接觸位置彼此相交。以力的作用繼續使兩 接點結構互相靠近時，接觸位置出現互相***，而使兩接 點結構之間接觸面擴大’梳狀肋片互相咬合。兩連接元件 接點結構之微結構的此種***及變形受益於構成晶體邊 緣毛刺及尖编所使用金屬的機械形狀穩定特性及其變形 特性。 除了上述兩連接疋件之連接方法外，本發明尚有關—種 使至少兩個金屬接點結構材料連接之裝置，其各具一平坦 或彎曲接觸部分，其中至少—接觸部份的接觸面具有^ 的微’構’其特徵在於’接觸面上的微結構由垂直於接觸 201007862 電路，其.電路載板為剛性或撓性 面而凸起的肋狀陡坡晶粒構成 該毛刺在接觸面上的分佈及其 此種裝置特別有利於電子零 電路板或撓性聚合物基板。 ’其各具一鋒利肋狀毛刺， 形狀與大小為隨機。 件之表面組裝，尤其是積體 尤其是陶瓷基板、印刷Footprint, which has a mating joint method, has a surface quality of 0, but is dull or shiny. The size of the solder bumps used, i.e., the solder joint volume, must match the size of the junctions that are in contact with each other. The capillary force when the solder melts causes the contact to come into contact with the surface, which is connected when it solidifies. The requirement when using large-area bga is that all the pads of the array need to be reliably connected to each other, and the contact or the size of the solder joints cannot reach reliable and long-lasting contact. In addition, joints with secondary structures are also known. Cu, Pd and Cu-Pd alloys can produce dendrites on one side of the pad to achieve a reversible mechanical connection before the solder balls in contact are melted' see U.S. Patent 5,075,965. For improved alignment and connection, the joints can also be provided with notches, see US 6683387B1, or flat grooves, see φ Wen S, Huff D, Lu GQ (2001) Enhancement of Thermal Fatigue Reliability of Power Semiconductor interconnects using Dimple- Array Solder Joints. Proc 32nd IEEE Power Electronics .Specialists Conference o Vancouver, Canada, June 17-22, 1926-1931 〇In order to make a solderless flip chip bond (FCB) to produce a BGA rough pad, the base material can be deposited before metal deposition To be chemically or mechanically roughened, see US 58 16478A. It is also possible to add diamond particles to the metal joint to improve the connection of flip-chip bonding 201007862. See US 6630203 B2. Diamond particles of 0.5 μιη-5 0 μπι can be first covered by nickel and then covered with gold without current, and increased when connected. The surface that produces the contact. It is also possible to use a contact clip on the insulated wire, which is provided with a crystal surface, and when the clamp is clamped by a spring, it is ensured that the wire passes through the insulating layer and reliably contacts the contact surface substructure of the regular distribution [ΕΡ1463151Α2], such as a cylinder or a rod. See Wang T, Tung F, Foo L, Dutta V (2001) Studies on a novel φ flip-chip interconnect structure. Pillar bump. In: Electronic Components and Technology Conference, 2001. Proceeding, 51st 945-949 (05/29/2001- 06/01/2001, Orlando, FL, USA) ISBN: 0-7803-7038-4; Tummala RR, Raj PM, Aggarwal A, Mehrotra G, Koh SW, Bansal S, Tiong TT, Ong CK, Chew J, Vaidyanathan K. Rao VS (2006) Copper Interconnection for High Performance and Fine Pitch Flipchip Digital Applications and Ultra-miniaturized RF Module .Application o Fifty-Sixth Electronic Components & Technology Confernce ( ECTC) May 30 - June 2, 2006, San Diego, USA ° Proceedings, pp. 102-111 } or pyramidal contact surfaces, see Watanabe N, Ootani Y, Asano T (2005) Pyramid Bumps for Fine- Pitch Chip-Stack Interconnection. Jpn. J. Appl. Phys. 44: 2751-275 5, which reduces the pressure required for joining and increases the working load under thermal load. The gold bumps described above can also be considered as sub-structured wafer junctions. 201007862 If the goal is to contact a standardized micro-passive component of a 电路2〇1 or 〇丨〇〇5 wafer on a circuit board or another substrate, then a colloid pre-fixed contact is usually used first, followed by wave soldering and infrared soldering. Wait for the joint. First, packaged wafers or bare crystals (i.e., so-called bare dies) are first assembled on a substrate using a so-called Chip on Board wafer direct packaging technique, and then soldered or bonded. The combination of placement and contact steps here also greatly expands the range of materials that can be used and increases throughput.载体 The carrier and substrate of the above active or passive microelectronic components can use materials of different hardness and flexibility, such as semi-conductive ceramics, such as HTCc, fabric, tile or particle and polymer, polymer film, film and paper. Complex. It is usually simple to distinguish between connections such as rigid-rigid, rigid-flexible, flexible-flexible. The bumpless flip chip technique (BLFC) is the most desirable method for providing a low temperature bonding method suitable for a substrate material that is often used. SUMMARY OF THE INVENTION It is an object of the present invention to provide a joint forming method such that a bumpless flip chip technique (BLFC) can achieve reliable material connection and electrical contact under low temperature and gentle pressure, and expand the flip chip. The scope of use of technology. This object is achieved by the method described in the characterizing part of claim 1. Article 17 of the scope of the patent application proposes a device for joining at least two metal joint structural materials. Advantageous other designs of the method of the present invention are described in the respective claims of the Japanese Patent Application No. 201007862 and the following description of the embodiments. In the method of connecting at least two metal contact structure materials, the contact structures each have a flat or curved contact portion, wherein the contact surface of at least one contact portion has a convex microstructure, so that the two contact structures are in contact with each other And at least forming a material connection between the microstructure and the opposite contact structure, wherein the microstructure of the contact surface of the at least one contact structure is first composed of rib-like steep slope grains protruding perpendicular to the contact surface. Each has a sharp rib-like hair thorn, the burr partially has a triangular tip, and the distribution of the burr on the contact surface and its shape and size are random. Then, the two contact structures are connected to each other by force, so that the microstructure on one contact structure is in contact with the contact surface of the other contact structure with its rib-like burr and the tip of the burr. Advantageously, the at least one contact structure provided with the microstructure is at least partially deformed and/or the burr tip is inserted into the other contact structure to create a material connection between the two contact structures. The wafer metal junction preferably has a plurality of raised grain rib burrs that completely cover the junction. It is particularly advantageous to have the ribbed steep slope grains consisting of the same material as the wafer junction, so that a bond that can withstand mechanical loading is created between the die deposited by the electroplating and the junction. It is of course also possible for the crystal grains to be composed of a metal material different from the junction. Preferred metals are gold, silver, turn and copper. The shape of the crystal structure electrochemically deposited on the junction is approximately miniaturized in the alpine terrain, with a plurality of connected and/or interpenetrating steep-slope crystal ribs 'having burrs and tips'. The shape and size of the ribs are random . Deposition 201007862 The average maximum roughness of the crystal structure at the junction is generally Rz 〇〇ΐμιη to 50μιη, especially 〇.5μηι to 1〇μηι. Here, the respective crystal grains are at the bottom, that is, on the plane of the joint surface, and the longitudinal length is at most ι 〇〇 μηη, especially 〇.5μη^ 10μηι, especially 1 μηη to 5 μηι. The lateral length of the bottom of the crystal grains is at most 2'', especially 〇1μιη to 1μιη, especially 〇5μπι to 2μιη. In view of the entire crystal structure deposited on the joint, the proportion of the crystal grains having the deformable tip and the burr is at least 2% of the junction. Here, each steep slope grain has at least two edges intersecting at the burr, and the intersection angle α < 90 is especially 疋 α < 6 〇. . Such a crystal shape and size are particularly stable, and the two element-connected elements can be stably bit-shaped. Thus, the method of the present invention allows a plurality of crystal edges and burrs or rib-like burrs and tips to intersect each other at a plurality of contact locations of the two contact structures when the contact structures or junction faces that are joined by the protruding microstructures are in close proximity to each other. When the force of the force continues to bring the two contact structures closer to each other, the contact positions are inserted into each other, and the contact faces between the two contact structures are enlarged, and the comb-like ribs are engaged with each other. The two connection elements The insertion and deformation of the microstructure of the contact structure benefit from the mechanical shape stability characteristics and deformation characteristics of the metal used to form the edge burrs and the sharp edges of the crystal. In addition to the above-described connection method of two connecting members, the present invention relates to a device for connecting at least two metal contact structural materials, each having a flat or curved contact portion, wherein at least the contact portion has a contact surface The micro-structure of ^ is characterized by the fact that the microstructure on the contact surface consists of a circuit perpendicular to the contact 201007862, and the rib-like steep slope grains that are raised by the circuit carrier are rigid or flexible surfaces constitute the burr on the contact surface. The distribution and its arrangement are particularly advantageous for electronic zero circuit boards or flexible polymer substrates. Each has a sharp rib-like burr, and its shape and size are random. Surface assembly of parts, especially integrated bodies, especially ceramic substrates, printing

以元素或化合物半導趙為基礎’電路載板為剛性或撓 性’尤其是陶究基板、印刷電路板或撓性聚合物基板，之 感測器或主動元件亦可以本發明方法彼此材料連結。 本發明方法之另一優點在於，所有種類基板，亦即剛性 或撓性基板，的整個上方皆可沉積或設置本發明金屬接點 結構。 半導體（晶片）材料、陶竟基板或聚合物基板（印刷電 路板及薄膜）接面之無焊劑連接可保持在高於室温臆 以内的溫度。 本發明方法之另一優點在於，兩連接元件接觸面連接後 之距離可特別小。彼此材料連接之元件間的縫隙高度可減 少到數微米。故可減少整體高度，尤其是疊置之晶片⑻p, s〇p)，而提高電子元件之封裝密度。 本發明方法之另一優點在於，可使用薄半導體材料。可 ，持BLFC結構之彈性變形及封裝撓性，而可應用於例如 汽車、航空儀電系統、智慧卡、穿戴式電腦、醫學技術等 領域 201007862 本發明方法之另一優點在於，由於可使用同種金屬覆晶 接點，例如金-金、銀-銀、鉑-鉑，故不會有介面合金共化 物（IMC)或相Ί封裝（連接）之溫度變化财受性（熱機 械穩定性）及功能可靠性提高。 散佈於接點結構整個表面的晶體毛刺、邊緣及尖端構成 連接το件之複數個接觸點，利用機械負荷而連接時可減少 彼此之塑性彈性變形，且至少部份增強彼此之咬合。故連 鲁接時局部使用的壓力超過一般有凸塊或無凸塊接觸面連接 程序初階時的壓力。 本發明接觸部分的大小，尤其是相應接點結構面積的比 例，不同於使用焊球的結構體，對接點的型態沒有影響， 其只受接點結構陣列面的層厚均勻度左右。設計接點結構 時，散佈之晶體毛刺、邊緣及尖端的幾何型態較佳利用電 鍍沉積條件而調整。本發明具有大小大致相同之晶體毛 刺、邊緣及尖端的BLFC打線接合可使整個連接.區域達到 一致的接觸。 1：鍍之金 屬成分’尤其是只為一種金屬，例如Au、Ag、pt。、ν» 體之基板可由同一材料或另一材料或數種不同的材 成’例如可使基板或載體完全.或部份被責金屬，.例如 銀、銘，或非貴金屬’例如紹、鈦、銅，構成的薄膜覆 此處基板本身的材料是否為半導體材料，例如石夕、氮化 11 201007862 砷化物、填化物'其他半導體材料或特殊條件下之超導材 料，為無關緊要。 本發明無凸塊覆晶（BLFC )接觸方法較佳用於微電子電 路之電性接點。該BLFC方法亦可製造出與絕緣散熱部之 導熱接點或此種面或區域。 上述方法可應用於下述實例中： -電子元件彼此之組合或組裝在剛性或徺性基板上 -微電子多層結構 _ LED或OLED結構體 -感測結構，可使用電性、電子、光學、生物檢測原理 -混合動力系統 -微電子元件與活細胞及組織之介面 -有或無附加黏合層之聚合物基板上導線之固定 -晶圓打線接合 _基板或晶圓上微機電動作感測系統（mems)2連接。 接點結構之晶體毛刺、邊緣及尖端通常與一導電結構， 例如導線’接觸，或與一散熱部材料連接接觸以排熱。 本發明兩連接元件材料連接之接點結構主要係用於在兩 連接元件之間產生電性接觸。具上述晶體結構之本發明接 面亦可如習知用於斑句圈垃餓 、巴圓接觸面之固體介質之電性接觸， 尤其是用於電荷注入。jt由，、,恭朴 其中以電何注入導電層為較佳之用 途。相關.之應用實例可玲明·1^· f Μ J Γ說月Nafion溥膜或電漿點火之擴散 12 201007862 層的接觸。本發明亦有關相關薄膜複數個接觸面之局部接 觸及其二度空間之圖案。 以下將依據附圖所示之實施例詳細說明本發明。 【實施方式】 第1至8圖中相同或近似之元件使用相同之編號。 ❿ 第1圖顯示一俯視圖以說明接點結構之表面。由圖中可 清楚看出’平面中晶體邊緣或毛刺之方向為隨機分佈。兩 個此種結構面對面接觸時’會產生已述之相互接觸、接觸 區及咬合，其將在下面被詳細說明。 第2圖顯示-多晶接點結構之侧視圖。由圖中可看出相 鄰較大毛刺及邊緣彼此直接或間接接觸。 第3圖顯示本發明接點結構一部分之截面圖。基板1〇上 的連接部份被本發明晶體層覆蓋。此處一金屬中間層Μ直 接覆蓋在基板表面上，其構成沉積晶粒之初金屬化層，晶 粒以邊緣或肋狀毛刺3 1及毛刺尖端3 2連接。 第4圖顯示上中下三個連續之步驟，其依序在一基板⑽ 之初金屬化層200上沉積出本發明之晶體層3〇〇。上圖只 顯示基板1〇〇’其為剛性或撓性或構成-元件之接觸部分: 中圖顯示基板與其上方之薄導電&酬。下圖顯示沉積在 其上方具上述晶體邊緣、毛刺及尖端之多晶層⑽。 第5圖三個連續的立體圖A、B、C顯示兩連接元件之晶 13 201007862 體結構實例。兩連接元件⑷彼此接近時首先（B)出現晶粒 局部接觸（40)，其經互相擠壓（c)而產生材料連接。 第ό圖為兩連接元件接觸面之對位實例。由圖中可看出 上方基板110的材料種類及組成或撓性及硬度與下方基板 不同。但其彼此連接之接觸面310的晶體結構則無不 同。 第7圖顯示晶體結構不同的兩個接觸面310及320。晶體 ® 層的厚度不同或相同為不重要。 第8圖為依據第i、2及5圖之圖，其中兩連接元件之表 面只有局部接觸及咬合。分別以斜線及菱格紋表示之兩連 接元件彼此進一步靠近時接面產生材料連結。 【圖式簡單說明】 第1圖係本發明具晶體邊緣、毛刺及尖端之接面的掃瞄 β 電子微顯微鏡圖。 第2圖係具晶體邊緣、毛刺及尖端之接面的細部圖（斜 視圖）。 第3圖係如第1及2圖具晶體邊緣、毛刺及尖端之基板 的截面圖’其利用基板表面之初禽屬化而產生一接點結構。 第4圖係在基板初金屬化層上產生本發明具散佈之晶體 邊緣、毛刺及尖端之接點結構之一實施例。 第5圖係連接過程中兩連接元件晶體邊緣局部接觸之示 201007862 意圖。 第6圖係具相同晶體表面之兩連接基板的對位示意圖。 第7圖係具不同晶體表面之兩連接基板的對位示意圖。 第8圖係晶體邊緣、毛刺及尖端以接觸及咬合而產生接 點之示意圖。 參 【主要元件符號說明】 10 基板 20 初金屬化 30 晶體層 30a 晶體邊緣 30b 晶體邊緣 31 晶體邊緣 32 晶體尖端 40 局部接觸 100 基板 110 基板 200 初金屬化 300 晶體層 3 10 晶體層 320 晶體層 15 201007862 400 接點Based on the element or compound semiconductor, the circuit board is rigid or flexible, in particular the ceramic substrate, the printed circuit board or the flexible polymer substrate. The sensors or active components can also be materially connected to each other by the method of the present invention. . Another advantage of the method of the present invention is that the metal contact structure of the present invention can be deposited or disposed over the entire top of all types of substrates, i.e., rigid or flexible substrates. The solderless connection of the semiconductor (wafer) material, ceramic substrate or polymer substrate (printed circuit board and film) junction can be maintained at temperatures above room temperature 臆. A further advantage of the method according to the invention is that the distance between the contact faces of the two connecting elements can be particularly small. The gap height between components connected to each other can be reduced to a few microns. Therefore, the overall height can be reduced, especially the stacked wafers (8) p, s〇p), and the packaging density of the electronic components can be increased. Another advantage of the method of the invention is that a thin semiconductor material can be used. However, the elastic deformation of the BLFC structure and the flexibility of the package can be applied to fields such as automobiles, aircraft electrical systems, smart cards, wearable computers, medical technology, etc. 201007862 Another advantage of the method of the present invention is that the same species can be used Metal flip-chip contacts, such as gold-gold, silver-silver, platinum-platinum, so there is no temperature change property (thermo-mechanical stability) of interface alloy compound (IMC) or phase-on-package (connection) and Increased functional reliability. The crystal burrs, edges and tips interspersed throughout the surface of the contact structure form a plurality of contact points connecting the members, which are mechanically loaded to reduce the plastic elastic deformation of each other and at least partially enhance the engagement of each other. Therefore, the pressure used locally during the connection is more than the pressure at the initial stage of the bump or bumpless contact surface. The size of the contact portion of the present invention, especially the ratio of the area of the corresponding contact structure, is different from the structure using the solder ball, and has no effect on the shape of the contact point, which is only affected by the uniformity of the layer thickness of the array surface of the contact structure. When designing the contact structure, the geometry of the scattered crystal burrs, edges, and tips is preferably adjusted using electroplating deposition conditions. The BLFC wire bonding of the present invention having substantially the same size of crystal burrs, edges and tips allows for uniform contact of the entire joint region. 1: The plated metal component 'is in particular only one metal, such as Au, Ag, pt. The substrate of the ν» body may be made of the same material or another material or a plurality of different materials, for example, the substrate or the carrier may be completely or partially responsible for the metal, such as silver, inscription, or non-precious metal such as Shao, titanium. , copper, the film formed by the material of the substrate itself is a semiconductor material, such as Shi Xi, nitride 11 201007862 arsenide, filler 'other semiconductor materials or superconducting materials under special conditions, is irrelevant. The bumpless flip chip (BLFC) contact method of the present invention is preferably used for an electrical contact of a microelectronic circuit. The BLFC method can also produce a thermally conductive contact or such face or region with an insulated heat sink. The above method can be applied to the following examples: - electronic components are combined with each other or assembled on a rigid or inert substrate - microelectronic multilayer structure - LED or OLED structure - sensing structure, can be used electrical, electronic, optical, Bioassay Principles - Hybrid Systems - Interfaces between Microelectronic Components and Living Cells and Tissues - Fixation of Conductors on Polymer Substrates with or Without Additional Adhesive Layers - Wafer Bonding _ Substrate or On-wafer Microelectromechanical Motion Sensing System (mems) 2 connection. The crystal burrs, edges and tips of the contact structure are typically in contact with a conductive structure, such as a wire', or in contact with a heat sink material to dissipate heat. The joint structure of the two connecting element materials of the present invention is mainly used to make electrical contact between the two connecting elements. The interface of the present invention having the above crystal structure can also be used for electrical contact of a solid medium which is conventionally used for a hue and a round contact surface, particularly for charge injection. Jt consists of,,, and Gong. It is better to use a conductive layer to inject electricity. Related examples of application can be clarified · 1 ^ · f Μ J Γ said month Nafion 溥 film or plasma ignition diffusion 12 201007862 layer contact. The invention is also related to the partial contact of a plurality of contact faces of the associated film and the pattern of its second space. The invention will be described in detail below with reference to the embodiments shown in the drawings. [Embodiment] The same or similar elements in the first to eighth figures use the same reference numerals. ❿ Figure 1 shows a top view to illustrate the surface of the joint structure. It can be clearly seen from the figure that the direction of the crystal edges or burrs in the plane is randomly distributed. When two such structures are in face-to-face contact, the resulting mutual contact, contact area and bite will occur, as will be explained in more detail below. Figure 2 shows a side view of the polycrystalline contact structure. It can be seen from the figure that the adjacent large burrs and edges are in direct or indirect contact with each other. Figure 3 is a cross-sectional view showing a portion of the joint structure of the present invention. The connecting portion on the substrate 1 is covered by the crystal layer of the present invention. Here, a metal intermediate layer is directly coated on the surface of the substrate, which constitutes the initial metallization layer of the deposited crystal grains, and the crystal grains are joined by the edge or rib-like burr 31 and the burr tip 32. Figure 4 shows the upper, middle and lower three successive steps of depositing the crystal layer 3 of the present invention on the metallization layer 200 of the substrate (10). The figure above shows only the substrate 1 〇〇' which is a rigid or flexible or constituting-contact portion of the component: The middle panel shows the substrate with a thin conductive & The figure below shows a polycrystalline layer (10) deposited on top of it with the crystal edges, burrs and tips. Figure 5 Three consecutive perspective views A, B, C show the crystals of two connecting elements 13 201007862 Example of the body structure. When the two connecting elements (4) approach each other, first (B) a partial contact (40) of the grains occurs, which is pressed against each other (c) to produce a material connection. The figure is an example of the alignment of the contact faces of the two connecting elements. As can be seen from the figure, the material type and composition or flexibility and hardness of the upper substrate 110 are different from those of the lower substrate. However, the crystal structure of the contact faces 310 connected to each other is different. Figure 7 shows two contact faces 310 and 320 having different crystal structures. It is not important that the thickness of the Crystal ® layer is different or the same. Figure 8 is a diagram based on Figures i, 2 and 5 in which the surfaces of the two connecting elements are only partially in contact and engaged. When the two connecting elements, which are respectively indicated by diagonal lines and rhombic lines, are closer to each other, a material joint is formed. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a scanning electron micromicrograph of a scanning edge of a crystal edge, a burr and a tip of the present invention. Figure 2 is a detailed view (oblique view) of the junction of the crystal edge, burr and tip. Figure 3 is a cross-sectional view of a substrate having crystal edges, burrs, and tips as shown in Figures 1 and 2, which utilizes the initial flocking of the substrate surface to create a contact structure. Figure 4 is an illustration of one embodiment of the contact structure of the interdigitated crystal edges, burrs and tips of the present invention on the initial metallization layer of the substrate. Figure 5 shows the partial contact of the crystal edges of the two connecting elements during the connection process. 201007862 Intent. Figure 6 is a schematic illustration of the alignment of two connected substrates having the same crystal surface. Figure 7 is a schematic alignment of two connected substrates with different crystal surfaces. Figure 8 is a schematic diagram of the edges, burrs, and tips of the crystal to create contacts by contact and bite. References [Main component symbol description] 10 Substrate 20 Initial metallization 30 Crystal layer 30a Crystal edge 30b Crystal edge 31 Crystal edge 32 Crystal tip 40 Partial contact 100 Substrate 110 Substrate 200 Initial metallization 300 Crystal layer 3 10 Crystal layer 320 Crystal layer 15 201007862 400 Contact

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Claims (1)

201007862 七、申請專利範圍： 1. 一種使至少兩個金屬接點結構材料連接之方法，其各具 一平坦或彎曲接觸部分，其中至少一接觸部份的接觸面 具有凸起的微結構，使兩接點結構互相接觸，而至少在 微結構與相對的接點結構之間產生材料連接，其特徵為 包含下述步驟： -使至少一接點結構接觸面上的微結構由垂直於接觸面 而凸起的肋狀陡坡晶粒構成，其各具一鋒利肋狀毛 刺，該毛刺在接觸面上的分佈及其形狀與大小為隨 機；及 -使兩接點結構受力之作用而互相連接，使得一接點結 構上的微結構以其肋狀毛刺及毛刺尖端與另一接點結 構之接觸面接觸。 ’ 2. 參 3. 如申請專利範圍第1項之方法，其中，垂直於接觸面而 凸起的肋狀陡坡晶粒具一近似三角形之基本形狀。 如申請專利範圍第1或2項之方法，其中，至少兩肋狀 陡坡晶粒互相***或至少接觸。. 4. 如申請專利範圍第1至3項中任一項之方法，其中，晶 粒肋狀毛刺具一三角形毛刺尖端。 5. 如申請專利範圍第4項之方法，其中，毛刺尖端削圓而 具小於1 μηι之半徑。 6. 如申請專利範圍第1至5項中任一項之方法，其中，至 17 201007862 少一接點結構接觸面上的微結構平均高度為〇 〇丨μιη至 50μιη，尤其是 0·5μιη 至 ΙΟμπι。 7·如申請專利範圍第1至6項中任一項之方法，其中，肋 狀陡坡晶粒在接觸面上的底部縱向長度可達1⑽， 肋片厚度可達25μιη。 8.如申請專利範圍第1至7項中任一項之方法，其中，每 一接點結構上肋狀毛刺佔整個接觸面的比例為至少2〇 • % ^ 9.如申請專利範圍第1至8項中任一項之方法，其中，肋 狀陡坡晶粒兩晶體邊緣構成的毛刺角度α可達9〇。，尤 其是α小於60。。 1〇.如申請專利範圍第i至9項中任一項之方法，其中 微結構直接以電鍍沉積或間接成形於基板上。 η.如申請專利範圍第1〇項之方法，其中，基板表面由 層導電材料構成及/或塗佈-層導電層，且基板表面 導電層上沉積出微結構。 12. 如申請專利範圍第1至^ 任一項之方法，其中 晶粒只由一種金屬成分構成。 13. 如申請專利範圍第丨至u 頡甲任一項之方法，其中 至少兩接點結構之連接利用〜 — 力負何，使得設在至少 接點結構上的微結構至少部 丨知變形及/或***另一接 結構上的肋狀毛刺。 18 201007862 14 .如申請專利範圍第項中任一項之方法，盆中， 兩接點結構皆設有微結構時，兩接點結構的微結構至少 15. 部份互相咬合。 如申請專利範項中任—項之方法，其中， 兩接點結構之力貞荷連接被辅以超音波及/或熱能，其 被輸至兩接點結構之連接範圍。 16. ❹ 如申請專利範圍第1至15項中任一項之方法，其中， 以接點結構表面連結之連接元件可為：電子元件、積體 電路、剛性或撓性電路載板，如陶瓷基板、印刷電路板 或撓性聚合物基板。 17. 鲁 18. 19. 20. 一種使至少兩個金屬接點結構材料連接之裝置，其各 具一平坦或彎曲接觸部分，其中至少一接觸部份的接觸 面具有凸起的微結構，其特徵在於：至少一接點結構接 觸面上的微結構由垂直於接觸面而凸起的肋狀陡坡晶 粒構成’其各具一鋒利肋狀毛刺，該毛刺在接觸面上的 分佈及其形狀與大小為隨機。 如申請專利範圍第17項之裝置，其中，晶粒由一種金 屬成刀構成’其成.形在金屬或金屬化基板表面上。 如申請專利範圍第17或18項之裝置，其中，垂直於接 觸面而凸起的肋狀陡坡晶粒具一近似三角形之基本形 狀。 如申請專利範圍第17至19項中任一項之裝置，其中， 19 201007862 至少兩肋狀陡坡晶粒互相***或至少接觸。 21. 如申請專利範圍第17至20項中任一項之裝置，其中， 晶粒肋狀毛刺具一三角形毛刺尖端，且毛刺尖端削圓而 具小於Ι μιη之半徑。 22. 如申請專利範圍第17至21項t任一項之裝置，其中， 至少一接點結構接觸面上的微結構的平均高度為 Ο.ΟΙμιη 至 50μιη 尤其是 0.5μπι 至 ΙΟμιη。 # 23.如申請專利範圍第17至22項中任一項之裝置，其中， 肋狀陡坡晶粒在接觸面上的底部縱向長度可達 ΙΟΟμηι，肋片厚度可達25μπι。 24. 如申請專利範圍第丨7至23項中任一項之裝置，其中， 每一接點結構上肋狀毛刺佔整個接觸面的比例為至少 20% 〇 25. 如申請專利範圍第17至24項中任一項之裝置，其中， ® 肋狀陡坡晶粒兩晶體邊緣構成的毛刺角度α可達9〇。， 尤其是α小於60。。 26. 如申請專利範圍第17至25項中任一項之裝置，其中’ 微結構直接以電鍍沉積或間接成形於基板上。 27. 如申請專利範圍第26項之方法，其中，基板表面由一 層導電材料構成及/或塗佈一層導電層，且基板表面或 導電層上沉積出微結構。 28. ——種如申請專利範圍第17至27項中任一項之裝置之 201007862 · 用途，其被使用於以元素或化合物半導體及剛性或撓性 電路載板為基礎之感測Is或主動元件。201007862 VII. Patent application scope: 1. A method for connecting at least two metal joint structural materials, each having a flat or curved contact portion, wherein at least one contact portion has a convex microstructure, so that the contact surface has a convex microstructure The two contact structures are in contact with each other, and at least the material connection is formed between the microstructure and the opposite contact structure, and the method comprises the steps of: - making the microstructure of the contact surface of the at least one contact structure perpendicular to the contact surface The convex rib-like steep slope crystal grains each have a sharp rib-like burr, and the distribution and shape and size of the burr on the contact surface are random; and - the two joint structures are connected by force The microstructure on one of the contact structures is brought into contact with the contact surface of the other contact structure with its rib-like burrs and burr tips. 2. The method of claim 1, wherein the ribbed steep slope grains that are perpendicular to the contact surface have a substantially triangular basic shape. The method of claim 1 or 2, wherein at least two ribbed steep slope grains are interdigitated or at least in contact with each other. 4. The method of any one of claims 1 to 3 wherein the grain rib burr has a triangular burr tip. 5. The method of claim 4, wherein the burr tip is rounded to have a radius of less than 1 μη. 6. The method of any one of claims 1 to 5, wherein the average height of the microstructure of the contact surface of the contact structure of 17 201007862 is 〇〇丨μιη to 50μιη, especially 0·5μιη ΙΟμπι. The method of any one of claims 1 to 6, wherein the ribbed steep slope grains have a longitudinal length of up to 1 (10) on the contact surface and a rib thickness of up to 25 μm. 8. The method of any one of claims 1 to 7, wherein the ratio of the rib-like burrs of each joint structure to the entire contact surface is at least 2 〇•% ^ 9. as claimed in claim 1 The method of any one of the preceding claims, wherein the burr angle α formed by the edges of the two crystals of the ribbed steep slope grain is up to 9 〇. Especially, α is less than 60. . The method of any one of claims 1 to 9, wherein the microstructure is deposited directly on the substrate by electroplating or indirectly. The method of claim 1, wherein the substrate surface is composed of a layer of a conductive material and/or a coating-layer conductive layer, and a microstructure is deposited on the conductive layer of the substrate surface. 12. The method of any one of claims 1 to 2, wherein the crystal grains consist of only one metal component. 13. The method of any one of the claims of the present invention, wherein the connection of at least two contact structures utilizes a force to cause at least a portion of the microstructure disposed on at least the contact structure to be deformed and / or insert a rib-like burr on another joint structure. In the method of any one of the claims, in the basin, when the two joint structures are provided with a microstructure, the microstructures of the two joint structures are at least 15. The method of any of the preceding claims, wherein the force-charge connection of the two-contact structure is supplemented by ultrasonic waves and/or thermal energy, which is input to the connection range of the two-contact structure. 16. The method of any one of claims 1 to 15, wherein the connecting elements joined by the surface of the contact structure are: electronic components, integrated circuits, rigid or flexible circuit carriers, such as ceramics Substrate, printed circuit board or flexible polymer substrate. 17. Lu 18. 19. 20. A device for joining at least two metal joint structural materials, each having a flat or curved contact portion, wherein the contact surface of at least one of the contact portions has a convex microstructure, The feature is that the microstructure of the contact surface of at least one of the contact structures is composed of rib-like steep slope grains which are convex perpendicular to the contact surface, each of which has a sharp rib-like burr, and the distribution and shape of the burr on the contact surface With size is random. A device according to claim 17, wherein the crystal grains are formed of a metal-forming knife. The shape is formed on the surface of the metal or metallized substrate. A device according to claim 17 or 18, wherein the rib-shaped steep slope crystal grains which are convex perpendicular to the contact surface have a substantially triangular basic shape. The apparatus of any one of claims 17 to 19, wherein 19 201007862 at least two ribbed steep slope dies are interdigitated or at least in contact with each other. The device of any one of claims 17 to 20, wherein the ribbed burr has a triangular burr tip and the burr tip is rounded to a radius smaller than Ι μηη. 22. The device of any one of clauses 17 to 21, wherein the average height of the microstructures on the contact surface of at least one of the contact structures is Ο.ΟΙιη to 50μιη, especially 0.5μπι to ΙΟμιη. The apparatus according to any one of claims 17 to 22, wherein the rib-shaped steep slope crystal grains have a longitudinal length of ΙΟΟμηι on the contact surface and a rib thickness of 25 μm. 24. The device of any one of claims 7 to 23, wherein the ratio of rib-like burrs to the entire contact surface of each contact structure is at least 20% 〇25. In any of the 24 items, the burr angle α of the edge of the two crystals of the ribbed steep slope grain is up to 9 〇. , especially α is less than 60. . 26. The device of any one of claims 17 to 25, wherein the microstructure is deposited directly on the substrate by electroplating or indirectly. 27. The method of claim 26, wherein the surface of the substrate is composed of a layer of electrically conductive material and/or a layer of electrically conductive layer is deposited, and a microstructure is deposited on the surface of the substrate or the electrically conductive layer. 28. Use of the device of claim 10,078,062, for use in an apparatus or a semiconductor or rigid or flexible circuit carrier based on sensing or is active. element. 21twenty one
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