TW200939510A

TW200939510A - Solar cell contact formation process using a patterned etchant material

Info

Publication number: TW200939510A
Application number: TW097144699A
Authority: TW
Inventors: Timothy W Weidman; Rohit Mishra
Original assignee: Applied Materials Inc
Priority date: 2007-11-19
Filing date: 2008-11-19
Publication date: 2009-09-16
Also published as: WO2009067483A1; US7888168B2; US20090142880A1; US20110104850A1; JP2011503910A; CN101889348A; EP2220687A1; CN101889348B

Abstract

Embodiments of the invention contemplate the formation of a high efficiency solar cell using novel methods to form the active region(s) and the metal contact structure of a solar cell device. In one embodiment, the methods include the use of various etching and patterning processes that are used to define point contacts through a blanket dielectric layer covering a surface of a solar cell substrate. The method generally includes depositing an etchant material that enables formation of a desired pattern in a dielectric layer through which electrical contacts to the solar cell device can be formed.

Description

200939510 六、發明說明：【發明所屬之技術領域】本發明之實施例一般涉及光電電池（ph〇t〇v〇ltaie cell) 之製造。【先前技術】《陽能電池為光電元件，其係將太陽光直接轉換為電 0 力。最常用的太陽能電池材料為⑦，其呈現單晶或多晶基板的形式，有時稱之為晶圓。由於形成矽系 (silicon-based )太陽能電池以產生電力之償還性花費高於使用傳統方法產生電力之花費，因此已針對減少形成太陽能電池的花費付出了努力。存在有多種方法以製造太陽能電池之主動區（ Μ-)以及太陽能電池之載流（㈣rent carrying)金屬 • 収或導體)'然而，這些習知製造方法存在有許多問題。舉例來說，形成之製程為複雜的多步驟製程，因此增加了形成太陽能電池所需之花費。因此，針對在基板的表面上形成主動區及載流區以形成太陽能電池的改良式方法及設備存在有需求。【發明内容】本發明一般係提供—種形成太陽能電池元件的方法，該方法包括··在-基板的至少一表面上形成一介電層,· 200939510 將-㈣劑物質設置在該介電層的複數個區域上；加熱該基板至一期望溫度，以使得該蝕刻劑物質將至少一部分之該介電層移| 價秒陈，以及在該至少一含矽區域上沉積— 導電層。本發明亦提供-種形成一太陽能電池元件的方法，該方法包括：在一基板的至少一表面上形成一介電層，其中該介電層包含-摻雜物質；將—^刻劑物“置在該200939510 VI. Description of the Invention: [Technical Field of the Invention] Embodiments of the present invention generally relate to the manufacture of a photovoltaic cell (ph〇t〇v〇ltaie cell). [Prior Art] The solar cell is a photovoltaic element that directly converts sunlight into electric force. The most commonly used solar cell material is 7, which takes the form of a single crystal or polycrystalline substrate, sometimes referred to as a wafer. Efforts have been made to reduce the cost of forming solar cells because the cost of forming silicon-based solar cells to generate electricity is higher than the cost of generating electricity using conventional methods. There are a number of methods for fabricating the active region of a solar cell (Μ-) and the carrying current of a solar cell (a) or a conductor. However, these conventional manufacturing methods have many problems. For example, the resulting process is a complex multi-step process, thus increasing the cost of forming a solar cell. Accordingly, there is a need for an improved method and apparatus for forming an active region and a current carrying region on a surface of a substrate to form a solar cell. SUMMARY OF THE INVENTION The present invention generally provides a method of forming a solar cell element, the method comprising: forming a dielectric layer on at least one surface of the substrate, · 200939510, placing a -(tetra) agent substance on the dielectric layer The plurality of regions are heated; the substrate is heated to a desired temperature such that the etchant material moves at least a portion of the dielectric layer, and a conductive layer is deposited over the at least one germanium-containing region. The present invention also provides a method of forming a solar cell component, the method comprising: forming a dielectric layer on at least one surface of a substrate, wherein the dielectric layer comprises a dopant material; Placed in

介電層的複數個區域上，其中該敍刻劑物質包括“ 銨；加熱該基板至-期望溫度，以使得該蝕刻劑物質將至y部"刀之该介電層移除；以及在該含矽區域上沉積一導電層。【實施方式】本發明之實施例預期了使用新穎方法以形成高效率太陽能電池，而該方法係形成太陽能電池元件的主動區及金屬接點結構。在-實施例中，該方法包括使用多種钱刻及圖案化製程’該些製程係用以界定穿過覆蓋太陽能電池基板的表面之毯覆介電層的點觸（p〇int c〇ntact)。該方法一般包括沉積一蝕刻劑物質，而該物質係使得在介電層中形成期望圖案，且通過該圖案可形成至太陽能電池元件的電性接點.可使用各種技術以形成太陽能電池之主動區及金屬接點結構。受益於本發明之太陽能電池基板（例如，「第1A圖」的基板n〇)包括具有主動 200939510 區之撓性（flexible )基板’而該主動區包含有機物質、單晶石夕、多晶碎、複晶矽、鍺（Ge )、石申化鎵（GaAs )、碲化锡（CdTe )、硫化錫（CdS )、砸化銅銦鎵（ciGS )、硒化銅銦（CuInSe2)、磷化鎵銦（Gainp2)、以及異質接 - 面電池（heter〇juncti〇n cell )，例如：GalnP/GaAs/Ge 或a plurality of regions of the dielectric layer, wherein the smear material comprises "ammonium; heating the substrate to a desired temperature such that the etchant material is removed to the y portion" of the dielectric layer of the knives; A conductive layer is deposited on the germanium containing region. [Embodiment] Embodiments of the present invention contemplate the use of novel methods to form high efficiency solar cells that form the active region and metal contact structure of the solar cell component. In an embodiment, the method includes using a plurality of engraving and patterning processes to define a touch through a blanket dielectric layer overlying a surface of the solar cell substrate. The method generally includes depositing an etchant material such that a desired pattern is formed in the dielectric layer and an electrical contact to the solar cell component can be formed by the pattern. Various techniques can be used to form the active region of the solar cell. And a metal contact structure. The solar cell substrate (for example, the substrate n〇 of the "Fig. 1A") which benefits from the present invention includes a flexible region having an active 200939510 region. Substrate' and the active region comprises organic matter, single crystal, polycrystalline, polycrystalline germanium, germanium (Ge), gallium arsenide (GaAs), antimony telluride (CdTe), tin sulfide (CdS), germanium Copper indium gallium (ciGS), copper indium selenide (CuInSe2), gallium indium phosphide (Gainp2), and heterojunction cell, such as GalnP/GaAs/Ge or

ZnSe/GaAs/Ge基板，其係用於將太陽光轉換為電力。在一實施例中，基板110包括ρ·η接合區（p_n juncti〇n) 0 型結構’而該結構係近似於位於基板3 1 0中的結構類型 (將結合「第4A〜4D圖」而討論如下），而該基板i 1〇具有形成於其上之介電層（例如元件符號或311)。灰陽能電池形# y f 「第1A〜1G圖」係繪示用以在太陽能電池1〇〇之表面120上形成接點結構之製程順序的不同階段中之太陽能電池基板110的剖面視圖。「第2圖」繪示用於在太陽月b電池上形成主動區及/或接點結構之製程順序2〇〇。「第 _ 2圖」t的順序係相應於在此將討論之「第1A〜1(}圖」的多個階段。在步驟202’介電層lu係形成在基板11〇的至少一表 Φ上（如第圖」所示）。在一實施例中，介電層m 為氧化矽層，例如二氧化矽層，其係形成在含矽基板的表面120上。可以使用習知的熱氧化製程而形成含有氧化矽的介電層111，而該熱氧化製程係例如為：爐退火製程、快速熱氧化製程、大氣壓或低壓CVD製程、電聚輔助CVD製程、PVD製程，或者使用喷塗（sprayed_on )、 6 200939510 旋塗（spin-on )、滾塗 < r〇u_〇n )、或其他類似的沉積類型而施加該網印（screen printed) 含有氧化矽的介電層 111。在一實施例中，介電層111 氧化矽層，其厚度為約50 A〜蘭A。在另一實施例中，介電層ιη、為^ 度小於2_ Α的二氧切層。在一實施例中，表面A ZnSe/GaAs/Ge substrate that is used to convert sunlight into electricity. In one embodiment, the substrate 110 includes a p-n junction region (p_n juncti〇n) 0-type structure' and the structure is similar to the structure type located in the substrate 310 (which will be combined with "4A to 4D") Discussion is as follows), and the substrate i 1 〇 has a dielectric layer (for example, a component symbol or 311) formed thereon.灰阳能电池形# y f "1A to 1G" shows a cross-sectional view of a solar cell substrate 110 in different stages of the process sequence for forming a contact structure on the surface 120 of the solar cell. Fig. 2 shows the process sequence for forming the active region and/or the contact structure on the solar cell b. The order of "Fig. 2" t corresponds to the plurality of stages of "1A to 1(} map" which will be discussed herein. In step 202, the dielectric layer lu is formed on at least one of the substrates 〇. Above (as shown in the figure). In an embodiment, the dielectric layer m is a ruthenium oxide layer, such as a ruthenium dioxide layer, which is formed on the surface 120 of the ruthenium-containing substrate. Conventional thermal oxidation can be used. The process comprises forming a dielectric layer 111 containing yttrium oxide, and the thermal oxidation process is, for example, a furnace annealing process, a rapid thermal oxidation process, an atmospheric pressure or low pressure CVD process, an electropolymerization assisted CVD process, a PVD process, or a spray coating ( Sprayed_on), 6 200939510 Spin-on, roll-on < r〇u_〇n), or other similar deposition type applies the screen printed dielectric layer 111 containing yttria. In one embodiment, the dielectric layer 111 has a ruthenium oxide layer having a thickness of about 50 A to Lan A. In another embodiment, the dielectric layer i n is a dioxy-cut layer having a degree less than 2 Å. In an embodiment, the surface

為所形成之太陽能電池的㈣。纽意針對氧切型介電層之形成的討論並未欲於限制本發明之範_，因為介電層111亦可使用其他習知的沉積製程(例如找㈣沉積）形成，及/或由其他介電材料製成。在一實施例中，介電層111為形成在含矽基板的表面u 層^厚度為⑽人〜胸人。在—實施例中，^石; 或氮化硬形a製程係在購自加州聖克拉拉之應用材料公司（Applied Materials Inc.)的 Vantage RadiancepiusTM Rtp、vantage RadOX丁μ RTp 或是 Appued pr〇d_r DARC®，或是其他類似的腔室中進行。For the formed solar cell (four). The discussion of the formation of an oxygen-cut dielectric layer is not intended to limit the invention, as the dielectric layer 111 can also be formed using other conventional deposition processes (eg, (four) deposition), and/or by Made of other dielectric materials. In one embodiment, the dielectric layer 111 is formed on the surface of the germanium-containing substrate, and the thickness of the layer is (10) human to chest. In the embodiment, the stellite or nitriding hard a process is based on Vantage RadiancepiusTM Rtp, vantage RadOX butyl μ RTp or Appued pr〇d_r from Applied Materials Inc. of Santa Clara, California. DARC®, or other similar chambers.

在另一實施例中，介電層i〗包括一多層薄膜堆疊，例如·氧化矽/氮化矽層堆疊（例如：厚度為〜20 A至〜 3/00 A的氧化矽層，以及厚度為〜ι〇〇Α至〜A的氮匕夕層）、非晶矽/氧化矽層堆疊（例如··厚度為〜 A的非晶矽層，以及厚度為〜至a的氧化夕層），或是非晶矽/氮化矽堆疊（例如：厚度為〜3〇至100 A的非晶矽層，以及厚度為〜〗〇〇至1 〇〇〇 A的氮衫^層）〇一》 , 在一貫例中，使用CVD製程而在矽基板上沉積50 A的非晶矽層，並接著使用cVD或pvD製程沉積 7 200939510 75〇A的氮化梦層。 ^ ^ ^ 在另一實例中，使用快速熱氧化製程在發基板上形成5 A #In another embodiment, the dielectric layer includes a multilayer film stack, such as a yttria/tantalum nitride layer stack (eg, a yttria layer having a thickness of 〜20 A to 〜3/00 A, and a thickness) a layer of amorphous yttrium/yttria layer (for example, an amorphous tantalum layer having a thickness of ~A, and an oxidized layer having a thickness of ~A), Or an amorphous tantalum/tantalum nitride stack (for example, an amorphous tantalum layer having a thickness of 〜3 〇 to 100 Å, and a layer of 衫〇〇 to 1 〇〇〇A) In a consistent example, a 50 A amorphous germanium layer was deposited on a germanium substrate using a CVD process, and then a nitrided layer of 7 200939510 75 A was deposited using a cVD or pvD process. ^ ^ ^ In another example, a rapid thermal oxidation process is used to form 5 A on the substrate.

的乳化矽層，並接著使用CVD ^ PVD製程在氧化矽層上沉積750 A的氮化矽。可適於形成此處所述之非晶石夕層、氮化梦或氧化石夕的沉積室及/ 或製程的實例係進一步在 ’在，、问受讓且同時另案待審之美國專利申請序號第12/178,289號（申請日厕年了月 2 3日）以及共同登夕μ 又讓之美國專利申請序號第12/202,213 ❹ ❹ 號（申請日為2_年8月29日）中討論，在此將其整體併入以做為參考。在步驟204,餘刻劑物質121係選擇性地沉積在介電層⑴上’其係利用習知的嘴墨印刷、橡膠衝印（_ 咖Ping)、網版印刷或其他類似之製程以形成並界定期望的圖案’而該圖案即為通往下方基板表φ (例如：矽）之電性接點的形成處（「第1Β圖」）。在一實施例中，藉由網版印刷製程而將蝕刻劑物質設置在介電層丨丨丨上，而在製程中，係透過具有尺寸介於約1〇〇〜約ι〇〇〇μιη 且中心距離小於2 mm的特徵結構陣列之聚醋遮罩而印刷餘刻劑物質。在-實例中，特徵結構為圓形孔洞、狹縫、矩形孔洞、六角形孔洞或其他期望形成在介電層^ 中的形狀。在一實例中，係透過具有尺寸大於約i〇〇pm 且中心距離小於約1〜2mm的特徵結構陣列之聚酯遮罩而印刷蝕刻劑物質。在另一實例中，特徵結構的尺寸係小於約1000 μπι且中心距離小於約【〜2 mm。在—實例中，網版印刷製程係在購自加州聖克拉拉之應用材料公 8 200939510 司的分公司Baccini S.p.A.的SoftLineTM中進行在一實施例中，蝕刻劑物質121為含有氟化銨（ΝΗ4〇之物質，其係經配製以蝕刻介電層丨丨丨。在—實例中，蝕刻劑物質含有：200 g/1的敗化銨（NH4F )、Μ的 0MW聚乙二醇（PEG)、5Gg/1的乙醇以及剩餘以去離子水補滿i公升體積。「第1C圖」繪示已沉積在介電層111上的蝕刻劑物質121的量之近視圖。舉例來說， ❹ 1公升的蝕刻劑物質包括：90毫升的6 : i之B〇E蝕刻溶液、5g的500MW聚乙二醇（PEG)、5g的乙醇，以及剩餘以去離子水補滿〗公升體積。蝕刻溶液中的額外成分通常係經選擇以促進介電層lu的「濕潤」，並同時使得會影響形成在介電層1U中的圖案之散佈的量最小化。當聚氧化乙烯（即，聚乙二醇）系的物質以及其他相關物質扮演好蝕刻劑物質中的界面活性劑之角色匕們亦會在尚於250C之溫度分解，以形成揮發 ©&的副產物’藉以避免在下-步驟的加熱基板之後而清洗基板表面的後清洗（post-rinse )步驟之需求。在一實施例中，蝕刻劑物質1 21包括氟化銨（NH4F )、與氟化銨形成均質混合物的溶劑、pH調整劑（例如 B0E、HF )以及界面活性劑/濕潤劑。在一實施例中，溶劑為二甲胺、二乙胺、三乙胺或乙醇胺，而其係配製在水溶液申。一般來說，亦可使用會與氟化銨形成均質混合物的任何其他胺類。在一實例中，界面活性劑/濕潤劑可以為聚乙二醇（PEG)、聚丙二醇、聚乙二醇-聚丙二醇 200939510The enamel layer was emulsified and then 750 A of tantalum nitride was deposited on the yttrium oxide layer using a CVD ^ PVD process. Examples of deposition chambers and/or processes that may be suitable for forming amorphous layers, nitriding dreams, or oxidized oxides as described herein are further described in the U.S. Patent Application Serial No. No. 12/178, 289 (application for the day of the toilet, 23 days), and the joint eve of the United States patent application serial number 12/202,213 ❹ ( (application date is August 2nd, August 29) It is hereby incorporated by reference in its entirety. At step 204, the residual agent material 121 is selectively deposited on the dielectric layer (1) by conventional ink jet printing, rubber stamping, screen printing or the like to form And defining the desired pattern', which is the formation of the electrical contact to the lower substrate table φ (for example: 矽) ("1"). In one embodiment, the etchant material is disposed on the dielectric layer by a screen printing process, and in the process, the transmission has a size of between about 1 〇〇 and about ι〇〇〇μηη. The engraved material is printed by a vinegar mask of a characteristic structure array having a center distance of less than 2 mm. In the example, the features are circular holes, slits, rectangular holes, hexagonal holes or other shapes that are desired to be formed in the dielectric layer. In one example, the etchant material is printed through a polyester mask having an array of features having a dimension greater than about i〇〇pm and a center distance less than about 1 to 2 mm. In another example, the feature structure has a dimension of less than about 1000 μm and a center distance of less than about [~2 mm. In an example, the screen printing process is performed in SoftLineTM, available from Baccini SpA, a division of Applied Materials, Inc., 839539510, Santa Clara, Calif., in one embodiment, the etchant material 121 is containing ammonium fluoride (ΝΗ4). a substance that is formulated to etch a dielectric layer. In the example, the etchant material comprises: 200 g/1 of ammonium sulphate (NH4F), ruthenium of 0 MW polyethylene glycol (PEG), 5Gg/1 of ethanol and the remainder of the i liter volume filled with deionized water. "Figure 1C" shows a close up view of the amount of etchant substance 121 deposited on the dielectric layer 111. For example, ❹ 1 liter The etchant material comprises: 90 ml of a 6:i B〇E etching solution, 5 g of 500 MW polyethylene glycol (PEG), 5 g of ethanol, and the remaining liter volume in deionized water. The additional ingredients are typically selected to promote "wetting" of the dielectric layer lu while at the same time minimizing the amount of dispersion that would affect the pattern formed in the dielectric layer 1U. When polyethylene oxide (ie, polyethylene glycol) Materials and other related substances act as etchants The role of the surfactant in the solution will also decompose at a temperature of still 250C to form a by-product of volatilization©& to avoid post-rinse cleaning of the substrate surface after heating the substrate in the next step. The need for a step. In one embodiment, the etchant species 1 21 includes ammonium fluoride (NH4F), a solvent that forms a homogeneous mixture with ammonium fluoride, a pH adjuster (e.g., B0E, HF), and a surfactant/wetting agent. In one embodiment, the solvent is dimethylamine, diethylamine, triethylamine or ethanolamine, which is formulated in an aqueous solution. In general, any other amine which will form a homogeneous mixture with ammonium fluoride may also be used. In one example, the surfactant/wetting agent can be polyethylene glycol (PEG), polypropylene glycol, polyethylene glycol-polypropylene glycol 200939510

之塊狀共聚合物’或是甘油…般來說，可以使用能與氟化銨及溶劑混合物均質地混合，且亦會「濕潤」介電表面之任何其他界面活性劑。在一實例令，蝕刻劑物質 κι包括與5 mL的二甲胺混合之2〇 g的氟化銨，以及 25 g的甘油，其會接著加熱至1〇〇<t直到混合物的pH值達到約7並形成均質混合物為止。在另-實例中，5“ 氟化銨與5mL的乙醇胺混合’並接著將2mL的hfm 入^化銨與乙醇胺的混合物中，以使pH下降至約7，並接著加入聚乙二醇-聚丙二醇之塊狀共聚合物〆在步驟206，基板加熱至約2〇〇〜3〇〇t：，而此會導致蝕刻劑物質中的化學物質對於形成在基板上的介電層進行蝕刻，以在基板110上形成暴露區域125。暴露區域125在介電層111中提供開口 ’通過開口則可形成通往基板m的電料接。在—實_中，基板表面上的暴露區域U5之直徑係介於約5μιη〜約2〇〇叫。相化在溫度介於約100〜如ot下，將含有氧化破之介電層m 如厚度為1000A)暴露於含有氟化錢（NH4F)的姓刻劑物質121約2分鐘，則介電層m會被银刻以產生揮發14的姓刻產物，而該些姓刻產物會在製程過程中由 :板11二表面蒸發（例如，「第1D圖」中的元件符號在-實例中’基板係放置在熱製程室中，而在該製程室甲’係施加約50〜綱。C的逐漸升溫至基板約6分 :的循環’以餘刻介電層"1。因此，在期望溫度下進行期望的持續時間（例如〜2分鐘）之製程之後，揮發性 200939510 的蝕刻產物將會被移除，並在暴露區域125中留下乾淨的表面110A，則可在該些區域中形成可靠的背側電性接點°相信反應將會循著式（1 )而進行：The bulk copolymer or glycerin can be used in any other surfactant which is homogeneously mixed with the ammonium fluoride and solvent mixture and which also "wet" the dielectric surface. In one example, the etchant substance κι includes 2 〇g of ammonium fluoride mixed with 5 mL of dimethylamine, and 25 g of glycerol, which is then heated to 1 〇〇<t until the pH of the mixture reaches Approximately 7 and a homogeneous mixture is formed. In another example, 5" ammonium fluoride is mixed with 5 mL of ethanolamine' and then 2 mL of hfm is added to the mixture of ammonium and ethanolamine to lower the pH to about 7, and then polyethylene glycol-poly The block copolymer of propylene glycol 〆 In step 206, the substrate is heated to about 2 〇〇 to 3 〇〇 t:, which causes the chemistry in the etchant substance to etch the dielectric layer formed on the substrate to An exposed region 125 is formed on the substrate 110. The exposed region 125 provides an opening in the dielectric layer 111. The opening of the substrate can form an electrical connection to the substrate m. In the actual state, the diameter of the exposed region U5 on the surface of the substrate The system is between about 5 μm and about 2 Å. The phase is exposed to a galvanic acid (NH4F) surname at a temperature of about 100 to OT, such as an oxidized dielectric layer m, such as a thickness of 1000 A. After the encapsulating material 121 is about 2 minutes, the dielectric layer m is silver-engraved to produce a surrogate product of volatilization, and the surnamed products are evaporated by the surface of the plate 11 during the process (for example, "1D The symbol in the figure is in the example - the substrate is placed in the thermal process chamber, and The process chamber A's application of about 50 deg. C. The gradual warming of the C to the substrate is about 6 minutes: the cycle 'over the dielectric layer'. Therefore, the desired duration is performed at the desired temperature (eg ~2) After the process of minutes), the etch product of the volatile 200939510 will be removed, leaving a clean surface 110A in the exposed area 125, and a reliable backside electrical contact can be formed in the areas. Will follow the formula (1):

Si〇2+4NH4F— SiF4+2H20 + 4NH, Ο 「第ΙΕ圖」繪示在執行了「第1A〜1D圖」及「第2圖」所不之步驟202〜206之後，所形成之經圖案化的介電層 111。在此處所討論之蝕刻劑配方及製程順序的一實施熊樣為能夠在介電層111中形成暴露區域125,而不需要^ 行任何的後清潔處理，此乃因為❹】產物及殘留的餘刻劑物質藉由蒸發而移除，因此留下乾淨的表面而可直接在製程的步驟210進行金屬化。因此，在一實施例中，製程順序包括在介電層⑴中形成暴露區域125，並進行沉積導電層114的步驟（步驟21〇)。在部分實例中，係期望避免延長的等待時間，或是在步驟咖及⑽之 :執行其他長時間的中間製程步驟，以防止導電層114 沉積在暴露的基板（例如結晶矽基板）表面上之前其上形成實質氧化物層（例如陶。在部分實例令，俘月在步驟2〇6〗210之間避免執行濕式製程步驟，以 1 方止清洗及乾燥基板所需的額外時間、與執行濕式製程步驟相關的擁有成本（c〇<jt f 暴露—hip)之增加，以及暴紅域125之氧化或污染的增加機會。 '在實施例中，於步驟206所執行的製程完成 200939510 之後’於基板110上執行—選用的清潔處理（步驟2〇8)，以移除任何不期發六+ k ν 望存在的殘留物及/或形成一鈍化表〜在實施例中，清潔處理之執行可以藉由：以清潔命液m板’藉以移除在步驟鹰t後所殘留的物、在基板上之各區域執行接續之沉積步驟之前，清潔基板的表面β可以藉由噴m、浸潰、浸沒或其他適合技術乂進行潤濕之步驟。後蝕刻清潔溶液可以為s。清Si〇2+4NH4F—SiF4+2H20 + 4NH, 「 “Drawing” shows the pattern formed after the steps 202 to 206 of “1A to 1D” and “2nd” are executed. Dielectric layer 111. An embodiment of the etchant formulation and process sequence discussed herein is capable of forming an exposed region 125 in the dielectric layer 111 without the need for any post-cleaning treatment because of the product and residual residue. The engraved material is removed by evaporation, thus leaving a clean surface that can be metallized directly in step 210 of the process. Thus, in one embodiment, the process sequence includes the steps of forming an exposed region 125 in the dielectric layer (1) and depositing the conductive layer 114 (step 21). In some instances, it is desirable to avoid extended latency, or in steps (10): perform other long intermediate process steps to prevent conductive layer 114 from depositing on the surface of the exposed substrate (eg, crystalline germanium substrate). A substantial oxide layer is formed thereon (for example, ceramics. In some examples, the capture process avoids performing a wet process step between steps 2 and 6 210, and the additional time required to clean and dry the substrate is performed, and execution is performed. The increase in cost of ownership associated with the wet process step (c〇<jtf exposure-hip), and the increased chance of oxidation or contamination of the red burst domain 125. In the embodiment, the process performed in step 206 is completed 200939510 Thereafter, the cleaning process (step 2〇8) is performed on the substrate 110 to remove any residue that is expected to be present and/or form a passivation table. In the embodiment, the cleaning process is performed. Execution can be performed by: cleaning the liquid crystal plate to remove the residue remaining after the step eagle t, and performing the subsequent deposition step on each region on the substrate, the surface of the cleaning substrate can be borrowed Spray m, dipping, immersion, or other suitable technique qe the wetting step after the etch-clean solution may be is s. Qing

❹ 潔溶液、SC2清潔溶液、稀釋的咖抓型清潔溶液、臭氧化的水*液、稀釋的氫氧化錄（νΗ4〇η ) |液、過氧化氫（H2Q2 )溶液、去離子水，或使用其他適合且具成本效益之清潔處理以清潔含矽基板。在步驟210，如第1F圖」所示，導電層係沉積在基板110的表φ 12〇上，而其係電連接基板11〇表面上的暴露區域（例如··乾淨表面11〇A)。在一實施例中’ 所形成的導電層114的厚度為約5〇〇〜約5〇〇〇〇〇人，並含有例如銅（Cu)、銀（Ag)、錫（Sn)、钻（c〇)、銖（Rh)、鎳（Ni)、鋅（Zn)、錯（Pb)及/或铭（A1)之金屬。在 -實施例中’導電$ 114含有兩層’其係藉由首先利用物理氣相沉積（PVD)製程或蒸鍍製程而沉積鋁（A1) 層112’並接著藉由使用PVD沉積製程以沉積釩鎳（Niv) 罩蓋層113而形成。在部分實例中，當導電層1丨4係施加在叉型全黑接觸（interdigitated all black contact)太 1¼能電池結構上時，係期望將沉積的導電層i丨4圖案化以形成兩個分離的區域，其係藉由使用物質移除處理來 12 200939510 達成’例如雷射剝離法、圖案化及乾式餘刻或其他類似之技術。在一實施例中，藉由使用無電沉積製程而在基板1 10 的暴露區域12 5上形成含錄層。不範性之辞沉積化學作用、沉積方法及形成導電層的製程係進一步描述在美國臨時申請案第61/003,754號中（申請曰為2007年11月 19日）’在此將其併入以做為參考。在錦沉積步驟之後， Ο 導電層114的其他部分可以形成在鎳層上。在一實施例中’於沉積導電層114 (步驟21 〇 )之後，係執行一選用的熱處理步驟，以確保在導電層114與表面120之間的界面形成良好的電性接觸。在一實施例中’基板係加熱至約300°C〜約8〇(TC並持續約i分鐘〜約30分鐘，以形成良好的歐姆接點（例如形成矽化物）。在步驟210之後，可執行多種步驟以製備及/或紋理化基板的相對表面101 (「第1G圖」）。在一實施例中，基 © 板U〇的相對表面101為太陽能基板的前側，其在形成太陽能電池之後係適以接收太陽光。在一實例中，相對表面101係經紋理化，並接著使用喷塗或氣相的高溫擴散製程以進行選擇性地摻雜，並再利用應層119 (例氣化石夕）來純化之。在—實施例中，具有一或多個主動層118的異皙垃& ", 开負接面116型之太陽能電池結構係形成在經過紋理化的相斟矣 , 相對表面101上。應注意的是，相對表面之製備亦可以在執行步驟2〇2或是製程順序2〇〇中的其他步驟之贺寂夕& 衣狂 < 則進行，且不偏離在此所揭露之本 13 200939510 發明的範疇。示範性之紋理化製程的實例係進—步描述在美國臨時申請案第61/039,384號中（申請日為2〇〇8 年3月25曰），在此將其併入以做為參考。另外，在一實施例中，於製備相對表面1〇1之後，可以使用習知的製程以在其上形成一或多個導電前接觸線（圖中未示），藉以形成太陽能電池i 〇〇之前接觸結構。摻雜製程在一實施例中’於步驟202、204及/或206所執行的製程係經改變以提供在執行製程順序200之後，而可用於在基板110的乾淨表面11〇A上或其下方形成圖案化的介電層及摻雜區域（「第1D〜1E圖」）的製程。—般來說，造些技術係用於在執行接續之高溫熱製程之後所暴露的基板區域中形成高度摻雜區域。在一實施例中，蝕刻物質係設置在未摻雜之介電層部分的上方，以餘刻並形成暴露區域’而可使用此處所述之製程而輕易的對暴 ❹露區域進行掺雜。含有摻質（—Μ)的物質可因而加入蝕刻劑配方中’以增加殘留物的掺質濃度，並最終增加在接點下方之不同的摻雜程度。在此配置中，可藉由此處所述之製程而形《選擇性接雜的點觸或者是選擇性射極接觸型（emitter c〇ntacts type)太陽能電池，以形成高效率之太陽能電池。在步驟202之替換形式令，介電層ηι係形成且已含有期望量的η型或p型摻質原子，並在介電層⑴成分 (例如^氧）揮發之後，其仍然為表面上的富含有推 14 200939510 質之殘留物。在形成摻質殘留物之後，則於接續的高溫製程步驟（即，㈣206 )過程中，摻質物質被驅動：入基板表面中。殘留在摻質殘留物中的高濃度掺質原子可因此有利地用於形成高度摻雜區域，其係藉由在接續的高溫擴散步驟中，將殘留的摻雜原子驅動進入鄰近所形成之暴露區域的下方基板中。在部分實例中，必須要小心地處理基板，以預防輕度附著之摻質殘留物移動至基板表面的其他區域，因而在擴散步驟之後產生不期望的摻雜區域。在一實施财，㈣2〇6中的製程係在爐管中或RTP室中高於約800t的溫度進行。在步驟2〇6 中所執行的製程之其他實施例中，係使用二步驟之加熱製程，其中基板係首先加熱至約300<»c的溫度約5分鐘，並接著加熱至約800〜約12〇〇t：的溫度一段期望的時間，以允許形成摻質殘留物，並接著將摻質驅動進入基板表面中。在步驟206之製程的又另一實施例中，係 φ 使用二步驟之加熱製程，其中基板係首先加熱至小於約 3 00 C的/jdl度約1〜5分鐘，並接著加熱至大於約的溫度一段期望的時間。因此，由於在摻質殘留物中的高濃度摻雜原子之故，則可較輕易地擴散進入基板表面中’以在暴露區域形成高度摻雜區域。在步驟204之替換形式中，蝕刻劑物質} 2丨含有期望量的摻質物質’而該些摻質物質可在步驟2〇6所執行的製程過程中被驅動進入基板丨丨〇的乾淨表面n 〇 A中。如上所討論者，在一實施例中，於步驟2〇6所執行的製程 15 200939510 係在爐S中或RTP室中高於約800°C的溫度且在存在有還原氧體（例如：氮氫混合氣體、空氣或氧氣）之條件下進行，以驅動摻質物質進入。洁Clean solution, SC2 cleaning solution, diluted coffee-type cleaning solution, ozonated water*, diluted hydroxide (νΗ4〇η) | solution, hydrogen peroxide (H2Q2) solution, deionized water, or used Other suitable and cost effective cleaning processes to clean the ruthenium containing substrate. In step 210, as shown in Fig. 1F, a conductive layer is deposited on the surface φ 12 of the substrate 110, which electrically connects the exposed regions on the surface of the substrate 11 (e.g., clean surface 11A). In one embodiment, the conductive layer 114 is formed to have a thickness of about 5 Å to about 5 Å, and contains, for example, copper (Cu), silver (Ag), tin (Sn), and drill (c). Metals of 〇), rhodium (Rh), nickel (Ni), zinc (Zn), erbium (Pb) and/or Ming (A1). In the embodiment - 'conductive $ 114 contains two layers' by depositing an aluminum (A1) layer 112' by first using a physical vapor deposition (PVD) process or an evaporation process and then depositing by using a PVD deposition process A vanadium nickel (Niv) cap layer 113 is formed. In some examples, when the conductive layer 1丨4 is applied to an interdigitated all black contact solar cell structure, it is desirable to pattern the deposited conductive layer i丨4 to form two separations. The area is achieved by using a material removal process 12 200939510, such as laser stripping, patterning, and dry remanufacturing or other similar techniques. In one embodiment, the recording layer is formed on the exposed regions 125 of the substrate 1 10 by using an electroless deposition process. Unconventional deposition chemistry, deposition methods, and processes for forming conductive layers are further described in U.S. Provisional Application Serial No. 61/003,754 (filed on Nov. 19, 2007), which is incorporated herein As a reference. After the gold deposition step, other portions of the germanium conductive layer 114 may be formed on the nickel layer. In an embodiment, after depositing the conductive layer 114 (step 21 〇), an optional heat treatment step is performed to ensure good electrical contact at the interface between the conductive layer 114 and the surface 120. In one embodiment, the substrate is heated to a temperature of from about 300 ° C to about 8 Torr (TC for about i minutes to about 30 minutes to form a good ohmic junction (eg, forming a telluride). After step 210, A plurality of steps are performed to prepare and/or texture the opposite surface 101 of the substrate ("1G"). In one embodiment, the opposing surface 101 of the substrate U is the front side of the solar substrate, after forming the solar cell The system is adapted to receive sunlight. In one example, the opposing surface 101 is textured and then selectively sprayed using a spray or gas phase high temperature diffusion process, and reuse of the layer 119 (eg, gas fossils) In the embodiment, a hetero-cell &""""""<RTIID=0.0>> On the opposite surface 101. It should be noted that the preparation of the opposite surface can also be carried out in the steps of step 2〇2 or other steps in the process sequence 2〇〇, and the madness is performed without deviation The disclosed article 13 200939510 hair The scope of the exemplary texturing process is described in US Provisional Application No. 61/039,384 (application date is March 25, 2008), which is incorporated herein. In addition, in an embodiment, after preparing the opposite surface 1〇1, a conventional process may be used to form one or more conductive front contact lines (not shown) thereon to form a solar cell. i 〇〇 Prior Contact Structure. Doping Process In one embodiment, the processes performed at steps 202, 204, and/or 206 are modified to provide a clean surface for substrate 110 after performing process sequence 200. A process for forming a patterned dielectric layer and doped regions ("1D~1E") on or below 11A. In general, these techniques are used to perform the subsequent high temperature thermal process. A highly doped region is formed in the exposed substrate region. In one embodiment, the etchant is disposed over the undoped dielectric layer portion to allow for the formation of the exposed region and can be used herein. Process and easy to violent Doping. The dopant-containing material can thus be added to the etchant formulation to increase the dopant concentration of the residue and ultimately increase the different doping levels below the junction. In this configuration, The selective touch or the selective emitter contact type solar cell is formed by the process described herein to form a highly efficient solar cell. So that the dielectric layer ηι is formed and already contains the desired amount of n-type or p-type dopant atoms, and after the dielectric layer (1) component (eg, oxygen) is volatilized, it is still rich in the surface of the push 14 200939510 The residue of the quality. After the dopant residue is formed, the dopant species are driven into the surface of the substrate during successive high temperature processing steps (i.e., (iv) 206). The high concentration of dopant atoms remaining in the dopant residue can thus advantageously be used to form highly doped regions by driving residual dopant atoms into adjacent exposures during successive high temperature diffusion steps. In the lower substrate of the area. In some instances, the substrate must be carefully handled to prevent lightly adhering dopant residues from moving to other areas of the substrate surface, thereby creating undesirable doped regions after the diffusion step. In one implementation, the process in (4) 2〇6 is carried out in a furnace tube or in an RTP chamber at a temperature higher than about 800 t. In other embodiments of the process performed in step 2〇6, a two-step heating process is employed in which the substrate is first heated to a temperature of about 300 <»c for about 5 minutes and then heated to about 800 to about 12 The temperature of 〇〇t: is for a desired period of time to allow the formation of dopant residues and then drive the dopant into the surface of the substrate. In still another embodiment of the process of step 206, the system φ uses a two-step heating process in which the substrate is first heated to a temperature of less than about 300 C/jdl for about 1 to 5 minutes, and then heated to greater than about Temperature for a desired period of time. Therefore, due to the high concentration of dopant atoms in the dopant residue, it is easier to diffuse into the surface of the substrate to form highly doped regions in the exposed regions. In an alternative form of step 204, the etchant material contains a desired amount of dopant material and the dopant species can be driven into the clean surface of the substrate during the process performed in step 2:6. n 〇A. As discussed above, in one embodiment, the process 15 200939510 performed in step 2〇6 is in the furnace S or in the RTP chamber at a temperature above about 800 ° C and in the presence of a reducing oxygen species (eg, nitrogen hydrogen) It is carried out under conditions of a mixed gas, air or oxygen to drive the entry of the dopant.

Ο 在製程順序2〇〇的一實施例中，蝕刻劑物質121含有 n型摻質物質，例如含有填（P )、# ( Sb )或;Bt ( As ) 之化合物，而該些化合物係在步驟204所執行的製程中叹置在基板的表面上。加入蝕刻劑物質121中的摻質原子可用於形成局部的n+區域，以提供對於n型基板的較佳電性接觸’或是形成在基板11G中的η型擴散區域。在一實例中，蝕刻物質121的摻雜成分可包括選自由下列物質所組成之群組之其中一者，該些物質為磷酸 ^Η3Ρ〇4)、亞碟酸（Η3Ρ〇3)、次鱗酸（Η3Ρ〇2)、亞填酸銨（ΝΗ4Η2Ρ〇3)以及次填酸二氫銨（ΝΗ4Η2Ρ〇2)。 β I擇地，蝕刻劑物質1 2 1可含有Ρ型摻質物質，例如3有蝴（Β )、铭（A1)、铜（Ιη)或錄（Ga)之化合物，藉以形成局部的P+區域，以提供對於P型基板的較佳電性接觸，或是形成在基板11G中的p型擴散區域。在一實施例中，摻質前驅物可包括 ( Η3Β〇3)、四說领酸錢（NH4BF4)及/或其組合。隻_代性摻雜舉释程的另一實施 206 )之前，例如含有一或介電層為含有在步驟202、204及/或206所執行之製例中，在執行高溫熱製程步驟（例如步驟蝕刻物質係施加在含有摻質之介電層上，多個換質原子的介電層111。在一實例中， 16 200939510 ύ ❹ 磷石夕酸鹽玻璃（咖）或是_酸鹽玻璃（bsg)之物質。在將大部分的二氧切成分於步驟撕轉變為叫並使其揮發之後（由於介電材料與㈣物質反應），則捧質物質的濃縮殘留物係形成，或是殘留在暴露表面上。在步驟206過程中’或是在一接續之高溫擴散步驟中，在（未钱刻）摻雜層（例如BSG或pSG層）中的摻質以及存在於蝕刻開口之表面上的更為濃縮之摻質殘留物，皆被驅動進入太陽能電池基板中。在—實施例中，#刻物質中的捧質含有不同於摻雜介電層中含有之摻質（例如B、p) 的摻質類型（例如As、AhGa、In)。因此，在一實施例中’在暴露區域處可形成更高度及/或更深人的換雜區域，且在未蝕刻之摻雜介電層下方具有較淺之摻雜分佈 (profile )。相信由於在基板表面之摻雜原子的較高濃度，以及殘留的摻質原子可較輕易（相較於通過摻雜層）擴散進入基板表面之故，則可在暴露區域處達到較深之換雜分佈。是复身C Ink Deposition )製盘「第3A及3B圖」係繪示在太陽能基板31〇上製造的矽太陽能電池300之一實施例。基板31〇包括p型基極區域301、n型射極區域302以及設置在其間的ρ·η接合區（P-η junction ) 303。η型區域或η型半導體之形成係藉由將特定之元素種類，例如磷（Ρ )、砷（As )或銻（Sb )，接雜至半導體，藉以增加負電荷載子（即，電子）的數里。在一配置中，係藉由使用包括含有摻質之氣體的非 17 200939510 曰曰、微晶或複晶矽CVD沉積製程以形成n型射極區域 3〇2。相似的，ρ型區域或ρ型半導體之形成係藉由將三價原子添加入結晶晶格中，而造成正常矽晶格之4個共價鍵之其中一者的電子短缺。因此，摻質原子可以接受來自相鄰原子的共價鍵之電子，以完成第4個鍵。摻質原子接受電子，導致相鄰原子之半個鍵遺失’因而造成「電洞」。在一配置中，ρ型基極區域3〇1為太陽能電池 • 基板，例如結晶矽基板（例如單晶、多晶、複晶）或是其他結合「第1Α圖」之基板所討論於上之相似基板材料。繪示於「第3Α〜3Β圖」中的太陽能電池元件配置以及下方所述之其他配置並未欲於限制本發明之範_，因為也可使用此處所述之方法及設備而對其他的基板及太陽能元件區域配置進行金屬化，且不偏離本發明之基本範*#。當太陽光落在太陽能電池300上，來自入射光子的能 © 量會在Ρ-η接合區303之兩側產生電子-電洞對。電子擴散跨越ρ-η接合區至較低的能階’電洞則往相反方向擴散’藉以在射極產生負電’並在基極上產生相應之正電。當在射極與基極之間產生電路，且ρ-η接合區暴露於光的部分波長，則電流將會流動。當照射時，由半導體產生的電流會流經設置在表面320 (即，光接收側）的接點，以及太陽能電池300的背側321。如「第3Β圖」所示之頂部接點結構308係通常配置為具有寬間隔之薄金屬線（或指狀物）309Α，而其係供應電流給與指狀物為 18 200939510 橫向定位之匯流排（bus bar) 309Β β背接點3〇6通常不會限制於形成為多個薄金屬線，因為其不用預防入射光線照射太陽能電池300。太陽能電池300係覆蓋有介電材料之薄層，例如氮化矽（ShN* )或氮化矽之氫化物 (SixNy:H) ’以作為抗反射塗層311或是arc層311，其係用以使得由太陽能電池300之頂表面反射的光最小化。可使用物理氣相沉積（PVD )製程、化學氣相沉積 _ 製程或其他相似技術而形成ARC層311。可使用退火步驟（> 600 C )以進一步鈍化已沉積的arc層3 11 » 接點結構308係與基板接觸，並適於與摻雜區域（例如.π型射極區域3 02)形成歐姆連接。歐姆接點是半導體元件上的一個區域，其係經製備以使得元件的電流-電壓（I-V )曲線為線性並對稱，也就是說，在半導體元件及金屬接點之間沒有高電阻界面。低電阻且穩定的接點係確保太陽能電池的效能及在太陽能電池製造過程中所 © 形成的電路之可靠性。背接點306係完成了太陽能電池 300所需的電路，並藉由形成與基板之p型基極區域301 為歐姆接觸的導電層而產生電流。第4A〜40圖」繪示在太陽能電池之表面上形成導電層之製程順序的不同階段之太陽能電池剖面示圖，而該導電層係例如為「第3A圖」的接點結構308。「第5 圖」繪不製程順序500或是一系列的方法步驟，其係用於形成太陽能電池上的接點結構308。在「第5圖」中的方法步驟係相應於「第4A〜4D圖」所繪示之階段， 19 200939510 在此係討論之。在步驟502,如上所討論者，透過習知方法，太陽能電池係形成而在基板31〇的表面上形成有arc層3丨丨（參見「第3A及4A圖」）。應注意到如在上方所討論之任何步驟中的背接點306 (「第3A圖」）並不需要在基板31〇的部分表面320進行金屬化之前形成。 toIn one embodiment of the process sequence 2, the etchant material 121 contains an n-type dopant such as a compound containing (P), #(Sb) or Bt(As), and the compounds are The process performed in step 204 is slanted on the surface of the substrate. The dopant atoms added to the etchant species 121 can be used to form a local n+ region to provide a better electrical contact for the n-type substrate or an n-type diffusion region formed in the substrate 11G. In an example, the doping component of the etchant material 121 may include one selected from the group consisting of phosphoric acid Η 3 Ρ〇 4), sub-disc acid (Η 3 Ρ〇 3), sub-scale Acid (Η3Ρ〇2), ammonium sub-alkali (ΝΗ4Η2Ρ〇3) and hypo-hydrogen ammonium dihydrogenate (ΝΗ4Η2Ρ〇2). θ I, the etchant substance 1 2 1 may contain a quinoid type dopant substance, for example, a compound having 3 (Β), Ming (A1), copper (Ιη) or recorded (Ga), thereby forming a local P+ region. To provide a preferred electrical contact to the P-type substrate or a p-type diffusion region formed in the substrate 11G. In one embodiment, the dopant precursor can include (Η3Β〇3), four-lead acid (NH4BF4), and/or combinations thereof. Before another implementation of the _ generation doping release process 206), for example, the inclusion of a dielectric layer or the dielectric layer is included in the examples performed in steps 202, 204, and/or 206, in performing the high temperature thermal processing step ( For example, the step etching material is applied to a plurality of dielectric atoms of the dielectric layer 111 on the dielectric layer containing the dopant. In one example, 16 200939510 ύ 磷 phosphorite powder (coffee) or _ acid salt a substance of glass (bsg). After most of the dioxin component is converted into a step and volatilized (because the dielectric material reacts with the (iv) substance), a concentrated residue of the material is formed. Or remaining on the exposed surface. During the step 206, or in a continuous high temperature diffusion step, the dopant in the (not-etched) doped layer (such as BSG or pSG layer) and the presence in the etch opening The more concentrated dopant residue on the surface is driven into the solar cell substrate. In the embodiment, the dopant in the #-engraved material contains a different dopant than that contained in the doped dielectric layer (eg B, p) type of dopant (eg As, AhGa, In) Thus, in one embodiment, a more highly and/or deeper person-doped region can be formed at the exposed regions and a shallower doping profile below the unetched doped dielectric layer. The higher concentration of dopant atoms on the surface of the substrate, as well as the residual dopant atoms, can be easily diffused into the surface of the substrate (as compared to through the doped layer), resulting in a deeper mismatch distribution at the exposed regions. The "C Ink Deposition" disk "3A and 3B" shows an embodiment of a tantalum solar cell 300 fabricated on a solar substrate 31. The substrate 31A includes a p-type base region 301, an n-type emitter region 302, and a p-n junction region 303 interposed therebetween. The formation of the n-type region or the n-type semiconductor is performed by adding a specific element species such as phosphorus (Ρ), arsenic (As) or antimony (Sb) to the semiconductor, thereby increasing the negative charge carriers (ie, electrons). A few miles. In one configuration, the n-type emitter region 3〇2 is formed by using a non-17 200939510 曰曰, microcrystalline or polycrystalline germanium CVD deposition process including a dopant-containing gas. Similarly, the formation of a p-type region or a p-type semiconductor results in a shortage of electrons in one of the four covalent bonds of the normal germanium lattice by adding a trivalent atom to the crystal lattice. Therefore, the dopant atoms can accept electrons from covalent bonds of adjacent atoms to complete the fourth bond. The dopant atoms accept electrons, causing half of the bonds of adjacent atoms to be lost, thus causing "holes." In one configuration, the p-type base region 3〇1 is a solar cell • substrate, such as a crystalline germanium substrate (eg, single crystal, polycrystalline, polycrystalline) or other substrate in combination with the “first schematic” discussed above. Similar substrate material. The configuration of the solar cell elements shown in the "3rd to 3rd drawings" and other configurations described below are not intended to limit the scope of the present invention, as the methods and devices described herein can also be used for other The substrate and the solar element region are arranged to be metallized without departing from the basic scope of the present invention. When sunlight falls on the solar cell 300, the amount of energy from the incident photons creates an electron-hole pair on either side of the Ρ-η junction region 303. The electron spread across the ρ-η junction to the lower energy level 'hole is diffused in the opposite direction' to generate a negative charge at the emitter and a corresponding positive charge at the base. When a circuit is created between the emitter and the base, and the ρ-η junction is exposed to a partial wavelength of light, current will flow. When illuminated, current generated by the semiconductor flows through the contacts disposed on the surface 320 (i.e., the light receiving side) and the back side 321 of the solar cell 300. The top contact structure 308 as shown in the "Fig. 3" is generally configured as a thin metal wire (or finger) 309 宽 having a wide spacing, and is supplied by a current supply finger 18 200939510 lateral positioning confluence The bus bar 309 Β β back contact 3 〇 6 is generally not limited to being formed into a plurality of thin metal wires because it does not prevent incident light from illuminating the solar cell 300. The solar cell 300 is covered with a thin layer of a dielectric material such as tantalum nitride (ShN*) or a tantalum nitride (SixNy:H)' as an anti-reflective coating 311 or an arc layer 311. The light reflected by the top surface of the solar cell 300 is minimized. The ARC layer 311 can be formed using a physical vapor deposition (PVD) process, a chemical vapor deposition process, or other similar technique. An annealing step (> 600 C) may be used to further passivate the deposited aRC layer 3 11 » the contact structure 308 is in contact with the substrate and is adapted to form an ohmic with the doped region (eg, the .π-type emitter region 302) connection. The ohmic junction is a region on the semiconductor component that is prepared such that the current-voltage (I-V) curve of the component is linear and symmetrical, that is, there is no high resistance interface between the semiconductor component and the metal contact. The low resistance and stable contact ensures the performance of the solar cell and the reliability of the circuit formed during the solar cell manufacturing process. The back contact 306 completes the circuitry required for the solar cell 300 and generates a current by forming a conductive layer in ohmic contact with the p-type base region 301 of the substrate. 4A to 40D are cross-sectional views showing solar cells at different stages of the process sequence for forming a conductive layer on the surface of a solar cell, and the conductive layer is, for example, a contact structure 308 of "Fig. 3A". "Picture 5" depicts a process sequence 500 or a series of method steps for forming a contact structure 308 on a solar cell. The method steps in "Picture 5" correspond to the stages shown in "4A~4D", 19 200939510 is discussed here. In step 502, as discussed above, the solar cell is formed by a conventional method, and an arc layer 3 is formed on the surface of the substrate 31 (see "3A and 4A"). It should be noted that the back contact 306 ("FIG. 3A") as in any of the steps discussed above does not need to be formed prior to metallization of the portion of surface 320 of substrate 31A. To

在下一步驟（或步驟504 )’藉由習知的噴墨印刷、網版印刷、橡膠衝印或其他類似之製程而將含金屬油墨39〇物質選擇性地沉積在ARC層311上，藉以形成並界定待形成接點結構308 (即’指狀物309A及匯流排309B) 之區域。在一實施例中，含金屬油墨39〇為含鎳油墨，其係經配製以蚀刻ARC層311 ’並使得基板31〇的下方表面302A金屬化。在一實施例中，含錄油墨包含：1〇呂的醋酸鎳（Ni(OOCCH3)2 · 4H20 )、1〇 g 的 42% 次填酸 (H3P〇2 )、1〇 g 的聚破酸（H6P4〇13 )、3 g 的氟化錄（nh4F ) 以及2 g的500MW聚乙二醇（PEG)。在另一實施例中，含鎳油墨係主要含有：10 g的醋酸鎳（Ni(〇〇CCH3)2. 4H2〇)、10g的42%次磷酸（H3P〇2)以及3 g的氟化銨 (NH4F )。在一實施例中，係期望將期望量的甲醇或乙醇添加至含鎳溶液中。在接點層形成步驟中（或步驟506 )，基板係加熱至介於約250〜3 00X：，而其會使得含金屬油墨390中的化學物質去蝕刻ARC層311’並使得基板的下方表面3〇2A 金屬化。在一實施例中，加熱含鎳之含金屬油墨390的 20 200939510 製程係使得含氫切（SiN)之術層川被㈣，並使矽化鎳（NixSiy)形成在基板 2 域斯）的上方表面上。「第4^^_如1型射極區 Μ M ^ 」係不出形成在η型射極£域302上的接點層3〇“在— M 杜實施例中，係使用積製程以形成接點層3〇4，而該接點層3〇4係匕括厚度為約10〜約2000A的主要鎳層。在一實施例中，於步驟506執行之製程完成之後，可心 C MOUh選用的清潔處理’以移除任何不期望存在的殘留物’及/或形成鈍化表面。在—實施例中，可藉由清潔溶液潤濕基板以進行清潔處理，而該清潔溶液係用以移除任何在執行步驟506之製程之後所殘留的物質。在—實例中，係期望移除來自含金屬油墨390的殘留物’例如來自經姓刻之ARC層311的殘留物、聚磷酸殘留物及/或P E G殘留物。可以藉由噴灌、浸潰、浸沒或其他適合技術以進行潤濕之步驟。清潔溶液可以為 sc’i清潔溶液、SC2清潔溶液、稀釋的则如型清潔溶液臭氧化的水溶液、稀釋的氫氧化錄（NH4〇H )溶液、過氡化氫（H202 )溶液、去離子水，或使用其他適合且具成本效益之清潔處理以清潔含矽基板。在一實施例中，係期望在步驟506之製程執行之後，以及在步驟5〇7及/或508之製程執行之前，不要對基板進行清力或清潔，卩避免清洗及乾燥基板所需的額外時間、與執行濕式製程步驟相關的擁有成本之增加，以及基板表面之氧化或污染的增加機會。在一實例中， 21 200939510 當含金屬油墨390之配方不含有形成殘留物之物質，例如：聚磷酸、PEG或其他類似物質，則基板表面不進I 清潔。行在步驟507,如「第4C圖」所繪示，導電層3〇5係選擇性地沉積在接點層304上，以形成接點結構3〇8之主要導電部分。在一實施例中，所形成之導電層3〇5厚度為約2000〜約50000A，並含有金屬，例如：銅（a)、銀（Ag)、金（Au)、錫（Sn)、鈷（c〇)、鍊（灿）、鎳 (N〇、鋅（Zn)、鉛（Pb)、鈀（pd)及/或鋁（ai)。在 —實施例中，係使用本質地會在接點層3〇4上形成金屬層之無電銀沉積製程而在接點層3〇4上沉積銀以形成導電層305。在步驟508，如「第4D圖」所示，可選地，匯流排線路330係附接至接點結構3〇8之至少一部分，以允許部分的太陽能電池元件可以連接至其他太陽能電池或外部 © 元件。一般來說，匯流排線路33〇係使用焊接物質331 (含有例如Sn/Pb、Sn/Ag之焊接物質）而連接至接點結構308。在一實施例中，匯流排線路33〇的厚度為約2 微米’並含有一金屬，例如為銅（Cu)、銀（Ag)、金（Au)、錫（Sn )、鈷（Co )、銖（Rh )、鎳（Ni )、辞（Zn )、鉛 (Pb )、le ( pd )及/或鋁（Ai )。在一實施例中，匯流排線路330係塗覆有一焊接物質，例如Sn/pb或Sn/Ag之焊接物質。在一貫施例中，可改變步驟5〇4、5〇6以提供用於形成 200939510 接點結構308之替代技術。在步驟5 04之替代形式中，並非將含金屬油墨390選擇性沉積在ARC層3 11的表面上，而是藉由簡單的旋塗、噴塗、浸潰或其他相似技術而跨越基板310的表面320或是基板的期望區域上方散佈或沉積油墨。在步驟506之替代形式中，將能量束，例如：光照射（如雷射束）或電子束，傳送至基板的表 I)In the next step (or step 504), a metal-containing ink 39 〇 substance is selectively deposited on the ARC layer 311 by conventional ink jet printing, screen printing, rubber printing or the like to form And defining an area where the contact structure 308 (i.e., 'finger 309A and bus bar 309B') is to be formed. In one embodiment, the metal-containing ink 39 is a nickel-containing ink that is formulated to etch the ARC layer 311' and metallize the underlying surface 302A of the substrate 31〇. In one embodiment, the ink containing ink comprises: 1 〇 of nickel acetate (Ni(OOCCH 3 ) 2 · 4H20 ), 1 〇 g of 42% acid (H3P 〇 2 ), 1 〇 g of poly-decomposition ( H6P4〇13), 3 g of fluorinated (nh4F) and 2 g of 500 MW polyethylene glycol (PEG). In another embodiment, the nickel-containing ink system mainly comprises: 10 g of nickel acetate (Ni(〇〇CCH3)2.4H2〇), 10 g of 42% hypophosphorous acid (H3P〇2), and 3 g of ammonium fluoride. (NH4F). In one embodiment, it is desirable to add the desired amount of methanol or ethanol to the nickel-containing solution. In the contact layer formation step (or step 506), the substrate is heated to between about 250 and 300X:, which causes the chemical in the metal-containing ink 390 to etch the ARC layer 311' and cause the lower surface of the substrate 3〇2A metallization. In one embodiment, the 20 200939510 process system for heating the nickel-containing metal-containing ink 390 is such that the hydrogen-containing (SiN) layer is formed (4) and the nickel-deposited nickel (NixSiy) is formed on the upper surface of the substrate 2) on. "The 4th ^^_1 type emitter region Μ M ^ " does not form the contact layer 3 形成 formed on the n-type emitter region 302. "In the -M Du embodiment, the integrated process is used to form The contact layer 3〇4, and the contact layer 3〇4 includes a main nickel layer having a thickness of about 10 to about 2000 A. In an embodiment, after the process performed in step 506 is completed, the core C MOUh is selected. Cleaning process 'to remove any undesired residues' and/or to form a passivated surface. In an embodiment, the substrate may be wetted by a cleaning solution for cleaning, and the cleaning solution is used for removal Any material remaining after performing the process of step 506. In the example, it is desirable to remove residues from the metal-containing ink 390, such as residues from the surnamed ARC layer 311, polyphosphate residues, and/or Or PEG residue. The step of wetting can be carried out by sprinkling, dipping, immersing or other suitable techniques. The cleaning solution can be a sc'i cleaning solution, an SC2 cleaning solution, or a diluted aqueous solution that is ozonated as a type cleaning solution. Diluted hydroxide (NH4〇H) solution, The hydrogen-containing (H202) solution, deionized water, or other suitable and cost-effective cleaning process to clean the ruthenium containing substrate. In one embodiment, it is desirable to perform after the process of step 506, and at step 5 Do not clean or clean the substrate before the process of 〇7 and/or 508, avoid the extra time required to clean and dry the substrate, increase the cost of ownership associated with performing the wet process steps, and oxidize the substrate surface. Or an increased chance of contamination. In one example, 21 200939510 When the formulation containing metal ink 390 does not contain a substance that forms a residue, such as polyphosphoric acid, PEG, or the like, the surface of the substrate is not cleaned. 507. As shown in FIG. 4C, a conductive layer 3〇5 is selectively deposited on the contact layer 304 to form a main conductive portion of the contact structure 3〇8. In one embodiment, the formed conductive layer 3〇5 has a thickness of about 2000 to about 50,000 A and contains a metal such as copper (a), silver (Ag), gold (Au), tin (Sn), cobalt ( C〇), chain (can), nickel (N〇, zinc (Zn), lead (Pb), palladium (pd) and/or aluminum (ai). In the embodiment, the use will be essentially at the junction An electroless silver deposition process for forming a metal layer on the layer 3〇4 and depositing silver on the contact layer 3〇4 to form the conductive layer 305. In step 508, as shown in FIG. 4D, optionally, the bus bar line The 330 series is attached to at least a portion of the contact structure 3〇8 to allow a portion of the solar cell component to be connected to other solar cells or external © components. In general, the busbar circuitry 33 uses a solder material 331 (including, for example, Sn/Pb, Sn/Ag solder material) is connected to contact structure 308. In one embodiment, bus bar line 33 has a thickness of about 2 microns and contains a metal such as copper (Cu), silver. (Ag), gold (Au), tin (Sn), cobalt (Co), rhodium (Rh), nickel (Ni), rhenium (Zn), lead (Pb), le (pd), and/or aluminum (Ai) In one embodiment, the bus bar circuit 330 is coated with a solder material, such as a Sn/pb or Sn/Ag solder material. In a consistent embodiment, steps 5〇4, 5〇6 may be modified to provide An alternative technique for forming the 200939510 contact structure 308. In an alternative form of step 504, the metal-containing ink 390 is not selectively deposited on the surface of the ARC layer 311, but by simple spin coating, spraying, dipping Or other similar techniques to spread or deposit ink across the surface 320 of the substrate 310 or over a desired area of the substrate. In an alternative form of step 506, an energy beam, such as a light illumination (such as a laser beam) or an electron beam, is transmitted. Table I to the substrate)

面以選擇性地加熱基板的區域，而使得在該些區域中的油墨之化學物質去蝕刻ARC層311，並使基板的下方表面302A金屬化。在一實施例中，能量束的傳送會使得在加熱區域中之含有鎳的含金屬油墨39〇去蝕刻含氮化石夕（SiN)的ARC層311，並在基板31〇 (例如n型射極區域302 )之上表面上形成梦化錄（队以小而若期望的話’可以將油墨之未加熱區域自基板的表面清洗去除。接雜接點之金馮化y科在製程順序5〇0之實施例中，银刻劑及/或含摻質之物質（例如含磷物質）係設置在基板的表面上，以在接續之步驟刻基板的表面及/或摻雜下方表面地八的區域。在-實施例中，將摻雜物質添加入含金屬油請溶液中，如上所討論者，藉此，的界面。成改良之金屬與石夕 m:!」，在步驟5°5係藉由簡單的旋塗、的期望5域相似技術而跨越基板的表面或在基板在冑例中，η型摻雜物質包括聚丙缔 23 200939510 酸（（CH2CHCO〇H)x)以及次磷酸（H3p〇2)，其係散佈在基板表面上。在一實施例中，摻雜物質可以含有染料或色素物質，其係用於突顯出設置在基板表面上之不同摻質物質類型（例如：η型或p型摻質）。接著，在步驟506之替代形式中，將能量束，例如：光照射（如雷射束）或電子束，傳送至基板的表面，以選擇性地加熱基板的區域，以將基板表面上的ARc層 311移除，並同樣使摻雜物質中的化學物質與基板3ι〇之下方表面302A中的物質反應及摻雜。在下-步驟，導電接點層3〇4係形成在基板的暴露區域上。在一實施例中，係使用無電鎳沉積製程以形成接層304,而該接點層3〇4包括位於摻雜區域上方之厚度為力1 〇〜約3 5 0 A的主要純鎳層。在部分實例中，沉積的薄膜可含有高含量的磷（例如約再者，用於無電鎳沉積製程的浸潰浴（bath )包括硫酸鎳 (NiS〇4)、氣化錄（NH4F)、氣化氫（hf)以及次亞碟酸根（H2P〇2-)。|例來$，浸潰浴的溫度為⑽，並包括15 g/L的NiS04、25 g/L的NH4F以及25g/L的次磷酸虱銨（NI^HaPO2 )，並將其暴露於基板表面約2分鐘。不範性製備及無電鎳沉積製程之實例係進一步描述在共同&讓之美國專利申請序號第1 1/553,878號（申請曰為 2006年1〇月27日），以及共同受讓之美國專利申請序號第11/385,041號（申請曰為2〇〇6年3月2〇曰），在此將其併入以做為參考。在一實施例中，無電鎳沉積製程 24 200939510 係在溫度約75〜851之間完成，並使用含有約25g的醋酸鎳（犯（〇〇(^113)2.41|2〇)、50§的42%次鱗酸（1{3?〇2) 以及足夠的乙二胺以達到pH 6.0 (加入至6. : 1 BOE溶液）的溶液，則可達到介於約250〜300 A/min的沉積速率。在此併入以做為參考之共同受讓的美國專利公開號第2007/0099 806號，以及第2007/0108404號，係描述了可與在此所述之一或多個實施例一同使用的示範性B〇e 溶液及蝕刻製程。在下一步驟中’導電層305係選擇性地沉積在接點層 3〇4上，以形成接點結構3〇8之主要導電部分。在一實施例中，所形成之導電層305的厚度為約2〇〇〇〜約 50000A’並含有金屬，例如··銅（Cu)、銀（Ag)、金（Au)、錫（Sn)、鈷（Co)、銖（Rh)、鎳（Ni)、辞（Zn)、鉛 (Pb )、鈀（Pd )及/或鋁（A1 )。在一實施例中，係使用電化學電鍍製程（例如銅沉積、銀沉積）而將含銅（cu) ❹ 的導電層305沉積在接點層304上。示範性的電鍍製程之實例係進一步描述在共同受讓之美國專利申請序號第 11/552,497號（申請曰為2006年1〇月24曰），以及共同受讓之美國專利申請序號第11/566,205號（申請曰為 2006年12月1曰），在此將兩者皆併入以做為參考。一般來說，係期望在電化學電鍍製程中於接近基板31〇之邊緣處產生至匯流排3G9B (「第3B圖」）之電性接觸，此乃因為匯流排309B 一般係按照一定尺寸製作以攜帶電流，並因此允許在寬間隔設置之薄金屬線3〇9A及較大 25 200939510 的匯流排3携上方產生導電層3〇5之均勻沉積。在另一實施例中’係使用本質地會在接點層3Q4上形成金屬層之無電銀沉積製程，而在接點層304上沉積銀（Ag)以形成導電層305。 ❹ 在下-步驟中’匯流排線路33()係附接至接點結構烟之至少—部分’以允許部分的太陽能電池it件連接至其他的太陽能電池或外部元件。—般純，匯流排線路33〇係使用焊接物f 331 (含有例如W WAg之焊接物質）而連接至接點結構在—實施例中，匯流排線路330的厚度為約200微米，並含有-金屬，例如為銅 (CU)、i(Ag)KAu)、^(Sn)、^(c〇)^(Rhh 錄（叫、鋅（Zn)u(pb)、說（pd)及 / 或銘（ai)。在一實施例中，各個匯流排線路33〇係由尺寸約線徑 (gauge ) ( AWG :〜0·254職）或更小的線形成。在一實施例中，匯流排線路33〇係塗覆有—焊接物質，例如 Sn/Pb或Sn/Ag之焊接物質。〜惟本發明雖以較佳實施例說明如上，然其並非用以限疋本發月，任何熟習此技術人員，在不脫離本發明的精神和範圍内所作的更動與潤飾，仍應屬本發明的技術範疇。【圖式簡單說明】為讓本發明之上述特徵更明顯易t董，可配合參考實施 26 200939510 例說明而了解簡單摘要如上之特定㈣，而部分之該些實施例乃緣示如附圖式。第1A〜1G @ ’緣示根據本發明之一實施例的在不同製程順序階段的太陽能電池之剖面示圖。第2圖，緣示根據本發明之-實施例而金屬化太陽能電池之方法的流程圖。The face selectively elects regions of the substrate such that the chemicals of the ink in the regions de-etch the ARC layer 311 and metallize the lower surface 302A of the substrate. In one embodiment, the transfer of the energy beam causes the nickel-containing metal-containing ink 39 in the heated region to etch the nitride-containing (SiN)-containing ARC layer 311 and on the substrate 31 (eg, an n-type emitter) The area 302) forms a dream recording on the upper surface (the team can clean and remove the unheated area of the ink from the surface of the substrate if desired). The Jin Fenghua y department of the contact point is in the process sequence 5〇0 In an embodiment, the silver engraving agent and/or the dopant-containing substance (for example, the phosphorus-containing substance) is disposed on the surface of the substrate to engrave the surface of the substrate and/or the area of the lower surface of the substrate in the subsequent step. In the embodiment, the dopant is added to the metal-containing oil solution, as discussed above, thereby, the interface. The modified metal and the stone ki m:!", borrowed in step 5 ° 5 The surface of the substrate is crossed by a simple spin-coating, desired 5-domain similar technique or in the case of a substrate, the n-type dopant includes polypropylene-23 200939510 acid ((CH2CHCO〇H)x) and hypophosphorous acid (H3p〇) 2), which is dispersed on the surface of the substrate. In one embodiment, doping The mass may contain a dye or pigment material that is used to highlight different dopant species (eg, n-type or p-type dopants) disposed on the surface of the substrate. Next, in an alternative form of step 506, the energy beam , for example: light illumination (such as a laser beam) or electron beam, transmitted to the surface of the substrate to selectively heat the area of the substrate to remove the ARc layer 311 on the surface of the substrate, and also in the dopant The chemical reacts and is doped with the material in the lower surface 302A of the substrate 3 ι. In the next step, the conductive contact layer 3 〇 4 is formed on the exposed region of the substrate. In one embodiment, an electroless nickel deposition process is used. To form the bonding layer 304, and the contact layer 3〇4 includes a main pure nickel layer having a thickness of 1 〇 to about 305 A above the doped region. In some examples, the deposited film may contain a high content. Phosphorus (for example, the bath for the electroless nickel deposition process includes nickel sulfate (NiS〇4), gasification (NH4F), hydrogenated hydrogen (hf), and sub-disc (H2P). 〇2-).|Examples, $, the temperature of the bath is (10), It also includes 15 g/L NiS04, 25 g/L NH4F and 25 g/L ammonium phosphinate (NI^HaPO2), and exposed to the surface of the substrate for about 2 minutes. Non-standard preparation and electroless nickel deposition process The examples are further described in the commonly-owned U.S. Patent Application Serial No. 1 1/553,878, filed on Jan. 27, 2006, and the commonly assigned U.S. Patent Application Serial No. 11/385,041.曰〇〇〇〇〇〇 3 3 3 3 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。 Contains about 25g of nickel acetate (Pin (^113) 2.41|2〇), 50% of 42% squaric acid (1{3?〇2) and enough ethylenediamine to reach pH 6.0 (added to A solution of 6. : 1 BOE solution can achieve a deposition rate of between about 250 and 300 A/min. U.S. Patent Publication Nos. 2007/0099 806, the disclosure of which is incorporated herein by reference in its entirety in its entirety in its entirety herein in Exemplary B〇e solution and etching process. In the next step, the conductive layer 305 is selectively deposited on the contact layer 3?4 to form the main conductive portion of the contact structure 3?8. In one embodiment, the formed conductive layer 305 has a thickness of about 2 Å to about 50,000 A' and contains a metal such as copper (Cu), silver (Ag), gold (Au), and tin (Sn). Cobalt (Co), rhodium (Rh), nickel (Ni), rhodium (Zn), lead (Pb), palladium (Pd) and/or aluminum (A1). In one embodiment, a conductive layer 305 containing copper (cu) ruthenium is deposited on the contact layer 304 using an electrochemical plating process (e.g., copper deposition, silver deposition). An example of an exemplary electroplating process is further described in co-assigned U.S. Patent Application Serial No. 11/552,497, filed on Jan. 24, 2006, and the commonly assigned U.S. Patent Application Serial No. 11/566,205 No. (Applicant filed December 1, 2006), both of which are incorporated herein by reference. In general, it is desirable to produce an electrical contact to the busbar 3G9B ("FIG. 3B") near the edge of the substrate 31 within the electrochemical plating process, since the busbar 309B is typically fabricated to a certain size. The current is carried, and thus the uniform deposition of the conductive layer 3〇5 is allowed to occur above the thin metal wires 3〇9A and the larger busbars 3200939510 of the wide spacing. In another embodiment, an electroless silver deposition process which essentially forms a metal layer on the contact layer 3Q4 is used, and silver (Ag) is deposited on the contact layer 304 to form the conductive layer 305. ❹ In the next step, the bus bar line 33() is attached to at least a portion of the junction structure smoke to allow a portion of the solar cell unit to be connected to other solar cells or external components. As is generally the case, the busbar line 33 is connected to the contact structure using a solder f 331 (containing a solder material such as W WAg). In the embodiment, the bus bar line 330 has a thickness of about 200 μm and contains - Metals such as copper (CU), i(Ag)KAu), ^(Sn), ^(c〇)^(Rhh recorded (called, zinc (Zn) u(pb), said (pd) and/or (ai). In one embodiment, each bus bar line 33 is formed by a wire having a size about a gauge (AWG: ~0·254) or less. In one embodiment, the busbar line 33 〇 is coated with a soldering substance, such as Sn / Pb or Sn / Ag soldering material. ~ However, the present invention is described above by way of a preferred embodiment, but it is not intended to be limited to this month, any familiar with this technology The changes and refinements made by the personnel without departing from the spirit and scope of the present invention should still belong to the technical scope of the present invention. [Simplified Description of the Drawings] In order to make the above features of the present invention more obvious, it can be implemented with reference. 26 200939510 The following is a brief description of the specific summary (4), and some of the embodiments are shown in the accompanying drawings. 1A~1 A cross-sectional view of a solar cell at different stages of the process sequence in accordance with an embodiment of the present invention. Fig. 2 is a flow chart showing a method of metallizing a solar cell according to an embodiment of the present invention.

，第3A圖’繪示根據本發明之一實施例而具有導電圖案形成在基板表面上之太陽能電池的剖面側視圖。第3B圖，繪示根據本發明之-實施例在完成前側金屬化内連線圖案之後的太陽能電池之等角視圖。第4A〜4D圖’繪示根據本發明之一實施例的在製程頃序之不同1¾段的太陽能電池之剖面視圖。第5圖，緣示根據本發明之實施例的太陽能電池之金屬化方法的流程圖。示相同的元而可應用到為便於了解，圖式中相同的元件符號表件。某一實施例採用的元件當不需特別詳述其他實施例。【主要元件符號說明】 100 太陽能電池 101 表面 110 基板 110A 表面 111 _介電層 112 在呂層 113 罩蓋層 114 導電層 27 200939510 116 異質接面 118 主動層 119 ARC層 120 表面 121 姓刻劑物質 125 暴露區域 200 製程順序 202,204,206,208,210 步 300 太陽能電池 301 基極區域 302 射極區域 302A 表面 303 p-n接合區 304 接點層 305 導電層 306 背接點 308 接點結構 309A 金屬線/指狀物 309Β 匯流排 310 基板 311 抗反射塗層/ARC層 320 表面 321 背側 330 匯流排線路 331 焊接物質 390 含金屬油墨 500 製程順序 5 02,5 04,505,506,507,508 步驟〇 283A is a cross-sectional side view of a solar cell having a conductive pattern formed on a surface of a substrate in accordance with an embodiment of the present invention. Figure 3B is an isometric view of a solar cell after completion of the front side metallization interconnect pattern in accordance with an embodiment of the present invention. 4A to 4D are cross-sectional views showing solar cells in different sections of the process sequence in accordance with an embodiment of the present invention. Fig. 5 is a flow chart showing a method of metallizing a solar cell according to an embodiment of the present invention. The same elements can be applied to the same component symbol table in the drawing for ease of understanding. The components employed in one embodiment are not specifically described in other embodiments. [Main component symbol description] 100 Solar cell 101 Surface 110 Substrate 110A Surface 111 _ Dielectric layer 112 In the L layer 113 Cover layer 114 Conductive layer 27 200939510 116 Heterojunction 118 Active layer 119 ARC layer 120 Surface 121 Surname substance 125 exposed area 200 process sequence 202, 204, 206, 208, 210 step 300 solar cell 301 base region 302 emitter region 302A surface 303 pn junction region 304 contact layer 305 conductive layer 306 back contact 308 contact structure 309A metal wire / finger 309 汇 bus bar 310 Substrate 311 Anti-reflective coating / ARC layer 320 Surface 321 Back side 330 Bus line 331 Welding material 390 Metal-containing ink 500 Process sequence 5 02,5 04,505,506,507,508 Step 〇28

Claims

200939510 七、申請專利範圍： 1. 一種形成一太陽能電池元件（solar cell device)的方法，包括：在一基板的一表面上形成一介電層；將一蝕刻劑物質設置在該介電層的複數個區域上；加熱該基板至一期望溫度’以使得該钱刻劑物質將該些區域中的至少一部分之該介電層移除，以暴露出該基板的該表面之複數個區域；以及在該表面之暴露出的該些區域上沉積一導電層。 2. 如申請專利範圍第1項所述之方法，其中該導電層包括鋁、鎳、鈦、鈕、鉻、鎢、銅、銀、錫、鋅、鉛及鉬。 3. 如申請專利範圍第1項所述之方法，其中該加熱之步驟包括將該基板加熱至約100〜300°C之一溫度。 ❿ 4. 如申請專利範圍第1項所述之方法，其中該蝕刻劑物質包括氟化錢β 申專利範圍第4項所述之方法，其中該蝕刻劑物質更包括—4Α */. 一得雜物質，而該摻雜物質包含一元素，且該元素係選自由电 ’、蝴、砷、銻、鋁、銦及鎵所組成之群 29 200939510 6_如申請專利範圍第4項所述之方法，其中該蝕刻劑物質更包括一界面活性劑’該界面活性劑係選自由聚乙_ 醇、聚丙二醇、聚乙二醇-聚丙二醇之塊狀共聚合物（M〇ck copolymer)及甘油所組成之群組。 7. 如申請專利範圍第4項所述之方法，其中該摻雜物質 ❹ 係為一物質，該物質係選自由磷酸（HJO4 )、亞磷酸 (H3P〇3)、次磷酸（H3P〇2)、亞磷酸銨（NH4H2P〇3)、次磷酸二氫銨（N^I^PO2)、硼酸（HJO3)及四氟硼酸録（NH4BF4 )所組成之群組。 8. 如申請專利範圍第5項所述之方法，其中該加熱之步驟包括將該基板加熱至大於約8〇〇艽之一溫度。 ® 9.如申請專利範圍第5項所述之方法，其中該加熱之步驟包括將該基板加熱至約5(rc〜3〇(rc之一第一溫度，並且接著加熱該基板至大於約8〇(rc之一第二溫度。 10.如申請專利範圍第！項所述之方法，其中該介電層包括一非晶矽層，以及氧化矽層或氮化矽層。 U.如申請專利範圍帛！項所述之方法，其中該介電層包括氧化石夕或氮化石夕’其形成在該基板的該表面上，而該 30 200939510 基板包括一結晶矽基板。 12. 如申請專利範圍第^項所述之方法，其中該介電層更包括一非晶矽層。 13. 如申請專利範圍第1項所述之方法，其中該些區域包括特徵結構（feature )之，陣列’而該些特徵結構之尺〇寸係大於約1 〇〇微米，並且中心間隔小於約2 mm。 14. 如申請專利範圍第1項所述之方法，其中該些區域包括特徵結構之一陣列，而該些特徵結構之尺寸係小於約 1000微米。 15. 如申請專利範圍第i項所述之方法，其f該在該表面上之暴露出的該些區域上沉積該導電層之步驟係實質為該加熱S亥基板至該期望溫度之步驟之後的用於形成該太陽能電池元件之下一步驟。 16.種形成一太陽能電池元件的方法，包括：在一基板的至少一表面上形成一介電層，其中該介電層包含一或多個摻雜元素；將一姓刻劑物質設置在該介電層的複數個區域上，其中該蝕刻劑物質包括氟化銨； U基板至-期望溫度，以使得該餘刻劑物質將 31 200939510 至少一部分之該介電層移除；以及在該含矽區域上沉積一導電層。 17.如申請專利範圍第μ項所述之方法’其中該導電層包括鋁、鎳、鈦、钽、鉻、鎢、銅、銀、錫、鋅、鉛及鉬。 ❾ 18·如申請專利範圍第16項所述之方法，其中該加熱之步驟包括將該基板加熱至大於約800它之一溫度。 19 ·如申凊專利範圍第16項所述之方法，其中該餘刻劑物質更包括一物質’且該物質係選自由磷酸（h3p〇4 )、亞鱗酸（h3p〇3 )、次磷酸（h3P〇2 )、亞磷酸銨 (nh4h2po3 )、次磷酸二氫銨（NH4H2p〇2)、硼酸（h3B〇3 ) 及四氟硼酸銨（NH4BF4 )所組成之群組。項所述之方法’其中該一或多銻、鋁、銦及鎵所組 20.如申請專利範圍第1( 個摻雜元素係選自由磷、成之群組。 21.如申請專利範圍第16习 16項所述之方法，其中該餘刻劑200939510 VII. Patent application scope: 1. A method for forming a solar cell device, comprising: forming a dielectric layer on a surface of a substrate; and disposing an etchant substance on the dielectric layer Heating the substrate to a desired temperature 'to cause the money engraving substance to remove at least a portion of the dielectric layer of the regions to expose a plurality of regions of the surface of the substrate; A conductive layer is deposited over the exposed areas of the surface. 2. The method of claim 1, wherein the conductive layer comprises aluminum, nickel, titanium, button, chromium, tungsten, copper, silver, tin, zinc, lead, and molybdenum. 3. The method of claim 1, wherein the step of heating comprises heating the substrate to a temperature of between about 100 and 300 °C. 4. The method of claim 1, wherein the etchant material comprises the method of claim 4, wherein the etchant material further comprises -4 Α */. a dopant, wherein the dopant comprises an element selected from the group consisting of electricity, arsenic, arsenic, antimony, aluminum, indium, and gallium. 29 200939510 6_as described in claim 4 The method wherein the etchant substance further comprises a surfactant. The surfactant is selected from the group consisting of poly(ethylene glycol), polypropylene glycol, polyethylene glycol-polypropylene glycol (M〇ck copolymer), and glycerin. The group formed. 7. The method of claim 4, wherein the dopant is a substance selected from the group consisting of phosphoric acid (HJO4), phosphorous acid (H3P〇3), and hypophosphorous acid (H3P〇2). A group consisting of ammonium phosphite (NH4H2P〇3), ammonium dihydrogen phosphate (N^I^PO2), boric acid (HJO3) and tetrafluoroboric acid (NH4BF4). 8. The method of claim 5, wherein the step of heating comprises heating the substrate to a temperature greater than about 8 Torr. The method of claim 5, wherein the step of heating comprises heating the substrate to about 5 (rc~3〇(rc) a first temperature, and then heating the substrate to greater than about 8 The method of claim 2, wherein the dielectric layer comprises an amorphous germanium layer, and a tantalum oxide layer or a tantalum nitride layer. The method of claim </ RTI> wherein the dielectric layer comprises oxidized oxidized stone or nitride argon formed on the surface of the substrate, and the 30 200939510 substrate comprises a crystalline germanium substrate. The method of claim 4, wherein the dielectric layer further comprises an amorphous layer. The method of claim 1, wherein the regions comprise features, the array The features of the features are greater than about 1 〇〇 micron and have a center spacing of less than about 2 mm. 14. The method of claim 1, wherein the regions comprise an array of features, and The size of the features is small About 1000 micrometers. 15. The method of claim i, wherein the step of depositing the conductive layer on the exposed regions on the surface is substantially the heating of the substrate to the desired a step of forming the solar cell component after the step of temperature. 16. A method of forming a solar cell component, comprising: forming a dielectric layer on at least one surface of a substrate, wherein the dielectric layer comprises One or more doping elements; a surname material is disposed on a plurality of regions of the dielectric layer, wherein the etchant material comprises ammonium fluoride; the U substrate is to a desired temperature such that the residual agent material Removing at least a portion of the dielectric layer of 31 200939510; and depositing a conductive layer on the germanium-containing region. 17. The method of claim [wherein the conductive layer comprises aluminum, nickel, titanium,钽铬铬 · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · temperature The method of claim 16, wherein the residual agent further comprises a substance and the substance is selected from the group consisting of phosphoric acid (h3p〇4), squaric acid (h3p〇3), Groups consisting of hypophosphorous acid (h3P〇2), ammonium phosphite (nh4h2po3), ammonium dihydrogen phosphate (NH4H2p〇2), boric acid (h3B〇3) and ammonium tetrafluoroborate (NH4BF4). Method 'where the one or more bismuth, aluminum, indium and gallium are grouped. 20. As claimed in the patent scope 1 (the doping element is selected from the group consisting of phosphorus, etc. 21. As claimed in the application of the 16th item 16 The method wherein the residual agent

甘油所組成之群組。 32 200939510 22. 如申請專利範圍第16項所述之方法，其中該加熱之步驟包括將該基板加熱至約5〇 t〜3〇〇 °C之一第一溫度’並且接著加熱該基板至大於約8〇〇它之一第二溫度。 23. 如申請專利範圍第16項所述之方法，其中該介電層係形成在一結晶矽基板上，且該介電層包括氧化矽或氮 4匕。 ❹ 24·如申請專利範圍第23項所述之方法，其中該介電層更包括一非晶矽層。 25. 如申請專利範圍第16項所述之方法，其中該些區域包括特徵結構之一陣列，而該些特徵結構之尺寸係大於約1 〇〇微米，並且中心間隔小於約2 mm。 26. 如申請專利範圍第16項所述之方法，其中該些區域包括特徵結構之一陣列，而該些特徵結構之尺寸係小於約1 0 0 〇微米。面如申请專利範圍第〗6項所述之方法，其中該在該表面上之暴露出的該些區域上沉積該導電層之步驟係實質熱D亥基板至該期望溫度之步驟之後的用於形成該太陽能電池元件之下一步驟。 33A group of glycerol. The method of claim 16, wherein the step of heating comprises heating the substrate to a first temperature of about 5 〇 to 3 ° C and then heating the substrate to be greater than About 8 〇〇 one of its second temperatures. 23. The method of claim 16, wherein the dielectric layer is formed on a crystalline germanium substrate and the dielectric layer comprises hafnium oxide or nitrogen. The method of claim 23, wherein the dielectric layer further comprises an amorphous germanium layer. 25. The method of claim 16, wherein the regions comprise an array of features having a dimension greater than about 1 〇〇 microns and a center spacing less than about 2 mm. 26. The method of claim 16, wherein the regions comprise an array of features, and the features are less than about 1000 microns in size. The method of claim 6, wherein the step of depositing the conductive layer on the exposed regions on the surface is performed after the step of substantially heating the substrate to the desired temperature Forming the next step of the solar cell component. 33