MXPA03004572A - Configuracion de circuito integrado con proteccion contra el analisis y proceso para la fabricacion de la configuracion. - Google Patents
Configuracion de circuito integrado con proteccion contra el analisis y proceso para la fabricacion de la configuracion.Info
- Publication number
- MXPA03004572A MXPA03004572A MXPA03004572A MXPA03004572A MXPA03004572A MX PA03004572 A MXPA03004572 A MX PA03004572A MX PA03004572 A MXPA03004572 A MX PA03004572A MX PA03004572 A MXPA03004572 A MX PA03004572A MX PA03004572 A MXPA03004572 A MX PA03004572A
- Authority
- MX
- Mexico
- Prior art keywords
- conductor tracks
- configuration
- integrated circuit
- producing
- protected against
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004020 conductor Substances 0.000 abstract 5
- 238000010586 diagram Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 238000001308 synthesis method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
- G06K19/07363—Means for preventing undesired reading or writing from or onto record carriers by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Theoretical Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Semiconductor Integrated Circuits (AREA)
- Storage Device Security (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
En la fabricacion de planos de cableado de construcciones o modulos logicos se rellenan las regiones (1) que se encuentran libres, de los carriles conductores, a traves del proceso de sintesis en los planos o niveles (10-13) metalicos superiores hasta un grado maximo con los carriles (30) conductores que sirven para proteger los circuitos integrados. Estos carriles conductores se realizan cada uno segun la disponibilidad de los elementos (T4) de construccion para el control o analisis, como carriles conductores (31-33) detectores, pero tambien como carriles (34) conductores libres de conexion para la confusion de un atacante posible.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10058078A DE10058078C1 (de) | 2000-11-23 | 2000-11-23 | Integrierte Schaltungsanordnung mit Analysierschutz und Verfahren zur Herstellung der Anordnung |
PCT/DE2001/004198 WO2002043147A1 (de) | 2000-11-23 | 2001-11-08 | Integrierte schaltungsanordnung mit analysierschutz und verfahren zur herstellung der anordnung |
Publications (1)
Publication Number | Publication Date |
---|---|
MXPA03004572A true MXPA03004572A (es) | 2004-05-05 |
Family
ID=7664330
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MXPA03004572A MXPA03004572A (es) | 2000-11-23 | 2001-11-08 | Configuracion de circuito integrado con proteccion contra el analisis y proceso para la fabricacion de la configuracion. |
Country Status (11)
Country | Link |
---|---|
US (1) | US7288786B2 (es) |
EP (1) | EP1336201B1 (es) |
JP (1) | JP2004514299A (es) |
KR (1) | KR100515555B1 (es) |
CN (1) | CN100359684C (es) |
BR (1) | BR0115535A (es) |
DE (1) | DE10058078C1 (es) |
MX (1) | MXPA03004572A (es) |
RU (1) | RU2263372C2 (es) |
UA (1) | UA75379C2 (es) |
WO (1) | WO2002043147A1 (es) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10218096A1 (de) * | 2002-04-23 | 2003-11-13 | Infineon Technologies Ag | Integrierte Schaltung |
DE10223176B3 (de) | 2002-05-24 | 2004-01-22 | Infineon Technologies Ag | Integrierte Schaltung mit sicherheitskritischen Schaltungskomponenten |
US7049667B2 (en) | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
US6924552B2 (en) | 2002-10-21 | 2005-08-02 | Hrl Laboratories, Llc | Multilayered integrated circuit with extraneous conductive traces |
DE10337256A1 (de) * | 2002-11-21 | 2004-06-09 | Giesecke & Devrient Gmbh | Integrierte Schaltkreisanordnung und Verfahren zur Herstellung derselben |
AU2003293540A1 (en) * | 2002-12-13 | 2004-07-09 | Raytheon Company | Integrated circuit modification using well implants |
CN100468722C (zh) | 2003-07-11 | 2009-03-11 | Nxp股份有限公司 | 对安全性敏感的半导体产品,尤其是智能卡芯片 |
DE102004023462B4 (de) * | 2004-05-12 | 2006-06-08 | Infineon Technologies Ag | Verfahren zur Ausbildung von Leiterbahnstrukturen auf Halbleiterbauelementen |
WO2005117115A1 (en) * | 2004-05-28 | 2005-12-08 | Koninklijke Philips Electronics N.V. | Chips with useful lines and dummy lines |
US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
JP2006228910A (ja) * | 2005-02-16 | 2006-08-31 | Matsushita Electric Ind Co Ltd | 半導体装置 |
DE102005042790B4 (de) | 2005-09-08 | 2010-11-18 | Infineon Technologies Ag | Integrierte Schaltungsanordnung und Verfahren zum Betrieb einer solchen |
US8168487B2 (en) | 2006-09-28 | 2012-05-01 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
WO2008102282A2 (en) * | 2007-02-20 | 2008-08-28 | Nxp B.V. | Semiconductor device with backside tamper protection |
US8195995B2 (en) * | 2008-07-02 | 2012-06-05 | Infineon Technologies Ag | Integrated circuit and method of protecting a circuit part of an integrated circuit |
CN102184270A (zh) * | 2010-11-24 | 2011-09-14 | 天津蓝海微科技有限公司 | 安全芯片的版图保护电路自动生成方法 |
FR2986632B1 (fr) | 2012-02-06 | 2016-02-12 | Altis Semiconductor Snc | Protection d'un circuit integre contre des attaques invasives |
US9627310B2 (en) * | 2012-04-11 | 2017-04-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device with self-aligned interconnects |
US8907497B2 (en) * | 2012-04-27 | 2014-12-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device with self-aligned interconnects and blocking portions |
US8779592B2 (en) * | 2012-05-01 | 2014-07-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Via-free interconnect structure with self-aligned metal line interconnections |
GB201311834D0 (en) | 2013-07-02 | 2013-08-14 | Qinetiq Ltd | Electronic hardware assembly |
KR20150037167A (ko) * | 2013-09-30 | 2015-04-08 | 에스케이하이닉스 주식회사 | 반도체 장치 및 이의 형성 방법 |
US11211342B1 (en) * | 2020-07-21 | 2021-12-28 | Taiwan Semiconductor Manufacturing Company Ltd. | Multiplexer cell and semiconductor device having camouflage design, and method for forming multiplexer cell |
WO2022161590A1 (en) | 2021-01-26 | 2022-08-04 | Tallinn University Of Technology | Physical obfuscation of hardware through capacitive coupling |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2471051A1 (fr) * | 1979-11-30 | 1981-06-12 | Dassault Electronique | Circuit integre a transistors mos protege contre l'analyse et carte comprenant un tel circuit |
SU1251138A1 (ru) | 1984-12-27 | 1986-08-15 | Рижское Ордена Ленина Производственное Объединение "Вэф" Им.В.И.Ленина | Идентификационна карта |
US4933898A (en) * | 1989-01-12 | 1990-06-12 | General Instrument Corporation | Secure integrated circuit chip with conductive shield |
US5262353A (en) * | 1992-02-03 | 1993-11-16 | Motorola, Inc. | Process for forming a structure which electrically shields conductors |
US5883000A (en) * | 1995-05-03 | 1999-03-16 | Lsi Logic Corporation | Circuit device interconnection by direct writing of patterns therein |
WO1997004377A1 (en) * | 1995-07-20 | 1997-02-06 | Dallas Semiconductor Corporation | Single chip microprocessor, math co-processor, random number generator, real-time clock and ram having a one-wire interface |
US5783846A (en) | 1995-09-22 | 1998-07-21 | Hughes Electronics Corporation | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
US5861652A (en) * | 1996-03-28 | 1999-01-19 | Symbios, Inc. | Method and apparatus for protecting functions imbedded within an integrated circuit from reverse engineering |
JP3960645B2 (ja) | 1996-12-27 | 2007-08-15 | ローム株式会社 | 回路チップ搭載カードおよび回路チップモジュール |
JPH10270562A (ja) * | 1997-03-27 | 1998-10-09 | Nippon Telegr & Teleph Corp <Ntt> | 半導体集積回路 |
JP3638778B2 (ja) | 1997-03-31 | 2005-04-13 | 株式会社ルネサステクノロジ | 半導体集積回路装置およびその製造方法 |
JP3682151B2 (ja) * | 1997-06-27 | 2005-08-10 | 株式会社東芝 | 配線評価方法および配線評価装置 |
ATE254803T1 (de) * | 1997-09-19 | 2003-12-15 | Fraunhofer Ges Forschung | Verdrahtungsverfahren für halbleiter-bauelemente zur verhinderung von produktpiraterie und produktmanipulation, durch das verfahren hergestelltes halbleiter-bauelement und verwendung des halbleiter-bauelements in einer chipkarte |
US6014052A (en) * | 1997-09-29 | 2000-01-11 | Lsi Logic Corporation | Implementation of serial fusible links |
US6137318A (en) * | 1997-12-09 | 2000-10-24 | Oki Electric Industry Co., Ltd. | Logic circuit having dummy MOS transistor |
DE19810730A1 (de) * | 1998-03-12 | 1999-09-16 | Philips Patentverwaltung | Microcontrollerschaltung |
RU2151422C1 (ru) | 1998-06-15 | 2000-06-20 | Саратовский государственный университет им. Н.Г. Чернышевского | Микроэлектронное устройство |
ATE376255T1 (de) * | 1998-08-18 | 2007-11-15 | Infineon Technologies Ag | Halbleiterchip mit oberflächenabdeckung |
JP2000076140A (ja) | 1998-09-02 | 2000-03-14 | Nippon Telegr & Teleph Corp <Ntt> | 半導体集積回路 |
WO2000019490A2 (en) * | 1998-09-29 | 2000-04-06 | Conexant Systems, Inc. | Dummy fill cell for reducing layer-to-layer interaction |
KR100710936B1 (ko) | 1998-11-05 | 2007-04-24 | 인피니언 테크놀로지스 아게 | 집적 회로용 보호 회로 |
CN1188911C (zh) | 1999-05-03 | 2005-02-09 | 因芬尼昂技术股份公司 | 保护多维结构的芯片堆的方法和装置 |
JP2001196372A (ja) * | 2000-01-13 | 2001-07-19 | Mitsubishi Electric Corp | 半導体装置 |
JP2001284357A (ja) | 2000-03-30 | 2001-10-12 | Sony Corp | 半導体装置 |
JP2002118235A (ja) * | 2000-10-10 | 2002-04-19 | Mitsubishi Electric Corp | 半導体装置、半導体製造方法、および半導体製造用マスク |
-
2000
- 2000-11-23 DE DE10058078A patent/DE10058078C1/de not_active Expired - Fee Related
-
2001
- 2001-08-11 UA UA2003054669A patent/UA75379C2/uk unknown
- 2001-11-08 MX MXPA03004572A patent/MXPA03004572A/es active IP Right Grant
- 2001-11-08 CN CNB018194265A patent/CN100359684C/zh not_active Expired - Fee Related
- 2001-11-08 WO PCT/DE2001/004198 patent/WO2002043147A1/de active IP Right Grant
- 2001-11-08 KR KR10-2003-7006920A patent/KR100515555B1/ko active IP Right Grant
- 2001-11-08 BR BR0115535-0A patent/BR0115535A/pt not_active IP Right Cessation
- 2001-11-08 JP JP2002544783A patent/JP2004514299A/ja active Pending
- 2001-11-08 RU RU2003118434/28A patent/RU2263372C2/ru not_active IP Right Cessation
- 2001-11-08 EP EP01997847.7A patent/EP1336201B1/de not_active Expired - Lifetime
-
2003
- 2003-05-23 US US10/444,552 patent/US7288786B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1336201A1 (de) | 2003-08-20 |
JP2004514299A (ja) | 2004-05-13 |
KR20040010564A (ko) | 2004-01-31 |
BR0115535A (pt) | 2004-02-03 |
CN100359684C (zh) | 2008-01-02 |
DE10058078C1 (de) | 2002-04-11 |
UA75379C2 (en) | 2006-04-17 |
WO2002043147A1 (de) | 2002-05-30 |
CN1476635A (zh) | 2004-02-18 |
RU2263372C2 (ru) | 2005-10-27 |
KR100515555B1 (ko) | 2005-09-16 |
EP1336201B1 (de) | 2015-02-11 |
US7288786B2 (en) | 2007-10-30 |
US20030205816A1 (en) | 2003-11-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG | Grant or registration |