KR970060510A - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

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Publication number
KR970060510A
KR970060510A KR1019960041881A KR19960041881A KR970060510A KR 970060510 A KR970060510 A KR 970060510A KR 1019960041881 A KR1019960041881 A KR 1019960041881A KR 19960041881 A KR19960041881 A KR 19960041881A KR 970060510 A KR970060510 A KR 970060510A
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South Korea
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layer
gate electrode
soi
channel region
insulating film
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KR1019960041881A
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KR100255575B1 (ko
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쇼이찌 미야모또
다까시 이뽀시
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기따오까 다까시
미쯔비시 덴끼 가부시끼가이샤
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Publication of KR970060510A publication Critical patent/KR970060510A/ko
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78636Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with supplementary region or layer for improving the flatness of the device

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)

Abstract

종래의 기술에서는 메사 분리된 SOI층의 측단면에 절연 물질로 이루어진 측벽을 형성할 때, SOI층 상면에 에칭 손상을 받는다는 문제가 있고, 또한 SOI층상단부와 게이트 전극과의 거리가 짧았기 때문에 절연성에 문제가 있었다.
SOI층상에 게이트 절연막, 게이트 전극의 일부로서 작용하는 도전층을 순차 적층한 후, SOI층의 측단면 뿐만 아니라 게이트 절연막 및 도전층의 측단면에도 측벽을 형성하여 도전층상에 게이트 전극을 형성함으로써 SOI층 상면에 에칭 손상을 주지 않고 게이트 전극과 SOI층의 상단부와의 거리를 일정 이상의 크기로 하는 구조의 반도체 장치를 형성한다.

Description

반도체 장치 및 그 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예에 따른 반도체 장치의 단면도.

Claims (3)

  1. 절연막상에 형성된 메사 분리형 실리콘층 〔이하, SOI(Silicon On Insulator)층이라 함〕; 내부에 채널 영역 및 소오스/드레인 영역이 형성된 상기 SOI층의 상면에 게이트 절연막을 사이에 두고 형성된 도전층; 상기 채널영역의 단부이고, 상기 SOI층, 게이트 절연막, 도전층의 측잔면인 면에 부착하여 형성된 절연 물질로 이루어진측벽; 및 상기 도전층상에 형성된 게이트 전극을 구비하는 것을 특징으로 하는 반도체 장치.
  2. 절연막상에 형성되고, 내부에 채널 영역 및 소오스/드레인 영역이 형성된 SOI층; 상기 채널 영역상에 게이트 절연막을 사이에 두고 형성된 게이트 전극; 및 상기 SOI층, 게이트 절연막 및 게이트 전극의 측단면의 일부에 부착하열 형성된 절연 물질로 이루어진 측벽을 구비하는 것을 특징으로 하는 반도체 장치.
  3. 제2항에 있어서, 상기 채널 영역상에 형성되는 게이트 전극은 채널 영역 이외의 영역에 형성되는 게이트전극보다도 두껍게 형성되는 것을 특징으로 하는 반도체 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960041881A 1996-01-17 1996-09-24 반도체 장치 및 그 제조 방법 KR100255575B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP96-005712 1996-01-17
JP00571296A JP3472401B2 (ja) 1996-01-17 1996-01-17 半導体装置の製造方法

Publications (2)

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KR970060510A true KR970060510A (ko) 1997-08-12
KR100255575B1 KR100255575B1 (ko) 2000-05-01

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US (2) US6064090A (ko)
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JPH09199730A (ja) 1997-07-31
JP3472401B2 (ja) 2003-12-02
US6271065B1 (en) 2001-08-07
KR100255575B1 (ko) 2000-05-01
US6064090A (en) 2000-05-16

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