KR970024069A - 반도체장치 및 그 제조방법(semiconductor device and method of manufacturing semiconductor device) - Google Patents

반도체장치 및 그 제조방법(semiconductor device and method of manufacturing semiconductor device) Download PDF

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Publication number
KR970024069A
KR970024069A KR1019960014648A KR19960014648A KR970024069A KR 970024069 A KR970024069 A KR 970024069A KR 1019960014648 A KR1019960014648 A KR 1019960014648A KR 19960014648 A KR19960014648 A KR 19960014648A KR 970024069 A KR970024069 A KR 970024069A
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South Korea
Prior art keywords
substrate
semiconductor device
semiconductor chip
hole
external electrodes
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KR1019960014648A
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English (en)
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KR100228595B1 (ko
Inventor
아끼요시 사와이
기사미쯔 오노
히데유끼 이찌야마
가쯔노리 아사이
Original Assignee
기따오까 다까시
미쯔비시덴끼 가부시기가이샤
가와즈 사또루
료덴세미컨덕터시스템엔지니어링 가부시끼가이샤
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Publication of KR970024069A publication Critical patent/KR970024069A/ko
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Publication of KR100228595B1 publication Critical patent/KR100228595B1/ko

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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
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Abstract

캐비티다운형BGA(Ball Grid Array)패키지의 반도체장치 및 그 제조방법에 관한 것으로서, 종래의 OMPAC형 BGA패키지보다 다핀화, 협피치화, 전기특성의 향상, 방열특성의 향상 및 실장성의 향상을 실현할 수 있는 BGA패키지를 갖는 반도체장치를 갖기 위해, 중앙부에 오목부를 갖는 기판, 오목부에 탑재된 반도체칩, 기판상에 마련되고 외부에 접속되는 여러개의 외부전극, 오목부를 덮는 덮개 및 반도체 칩과 기판 사이에 마련되고 반도체칩에서 발생하는 열을 기판으로 방열시키는 방열수단을 구비하는 구성으로 하였다.
이러한 구성으로 하는 것에 의해, 여러개의 외부전극의 각각에 대해서 일대일로 인접시키고 관통구멍을 마련하도록 했기 때문에, 반도체칩상의 패드에서 외부전극까지의 배선길이가 짧게 되고 반도체장치의 사용에 있어서 전기신호의 전달이 빠르고 전기특성을 향상시킬 수 있는 효과가 있다.

Description

반도체장치 및 그 제조방법(SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE)
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 1실시예에 따른 반도체장치의 단면도,
제2도A는 제1도에 도시된 반도체장치의 써멀비어를 도시한 단면도,
제2도B는 제2도A의 써멀비어를 위한 제조단계를 도시한 단면도,
제2도C는 제2도A의 써멀비어를 위한 제조단계를 도시한 단면도,
제2도D는 제2도A의 써멀비어를 위한 제조단계를 도시한 단면도,
제2도E는 제2도A의 써멀비어를 위한 제조단계를 도시한 단면도,
제2도F는 제2도A의 써멀비어를 위한 제조단계를 도시한 단면도,
제3도는 이 실시예에 있어서 상부와이어본드핑거(3a)가 정방향 본드되고, 하부와이어본드핑거(3b)가 역방향 본드된 예를 도시한 도면,
제4도는 이 실시예에 있어서 외부 전극형성전에 랜드(5)를 나타낸 단면도,
제5도는 외부전극이 고온상태에 있을 때의 전단강도변화를 나타낸 그래프.

Claims (11)

  1. 중앙부에 오목부를 갖는 기판, 상기 오목부에 탑재된 반도체칩, 상기 기판상에 마련되고 외부에 접속되는 여러개의 외부전극, 상기 오목부를 덮는 덮개 및 상기 반도체 칩과 상기 기판 사이에 마련되고 상기 반도체칩에서 발생하는 열을 상기 기판으로 방열시키는 방열수단을 구비하는 것을 특징으로 하는 반도체장치.
  2. 제1항에 있어서, 상기 방열수단은 베이스재료, 상기 베이스재료내에 마련된 관통구멍 및 상기 관통구멍의 내벽에 마련된 구리도금막을 갖는 써멀비어를 포함하는 것을 특징으로 하는 반도체장치.
  3. 제2항에 있어서, 상기 써멀비어는 상기 관통구멍 내를 충전된 수지를 또 포함하는 것을 특징으로 하는 반도체장치.
  4. 제1항에 있어서, 상기 오목부는 그 안에 마련된 적어도 2단과 상기 각단에 마련된 와이어본드핑거를 포함하고, 역방향 본드와 정방향 본드가 상기 와이어본드핑거와 상기 반도체칩 사이의 접속을 위해 상기 각 단마다 교대로 실행되는 것을 특징으로 하는 반도체장치.
  5. 제1항에 있어서, 상기 덮개의 면적이 300mm2이상일 때 상기 덮개가 세라믹으로 구성되는 것을 특징으로 하는 반도체장치.
  6. 제1항에 있어서, 상기 기판과 상기 외부전극 사이에 마련된 랜드를 또 포함하고, 상기 랜드는 상기 기판상에 마련되고 1㎛이상의 두께를 갖는 니켈층을 구비한 제1전해도금층과 상기 제1전해도금층상에 마련되고 0.5㎛미만의 두께를 갖는 금층을 구비한 제2전해도금층을 포함하는 것을 특징으로 하는 반도체장치.
  7. 제1항에 있어서, 상기 외부전극의 각각에 대해서 마련되고 상기 기판을 관통해서 연장되어 있는 기판측 관통구멍과 상기 기판측 관통구멍의 내벽에 마련된 도금층을 또 포함하고, 상기 기판측 관통구멍의 내벽의 표면의 오목볼록위치의 최대높이차가 20㎛이하이고, 상기 내벽상의 상기 도금층이 20㎛이상의 두께를 갖고 있는 것을 특징으로 하는 반도체장치.
  8. 제7항에 있어서, 상기 기판측 관통구멍내에 충전된 수지를 또 포함하는 것을 특징으로 하는 반도체장치.
  9. 제7항에 있어서, 상기 기판측 관통구멍내에 충전된 금속을 또 포함하는 것을 특징으로 하는 반도체장치.
  10. 제7항에 있어서, 상기 기판측 관통구멍의 내벽에 마련된 도금층의 적어도 상기 기판의 표면에서 외부로 노출되어 있는 끝면을 덮는 땜납레지스트를 또 포함하는 것을 특징으로 하는 반도체장치.
  11. 그안에 마련된 오목부를 갖는 기판, 상기 오목부내에 탑재된 반도체 칩, 상기 기판상에 마련되고 실장시에 외부에 접속되는 여러개의 외부전극, 상기 오목부를 덮는 덮개, 상기 반도체칩와 상기 기판 사이에 마련되고 상기 반도체 칩에서 발생하는 열을 상기 기판으로 방열시키는 방열수단 및 상기 오목부에 마련된 각단에 마련된 와이어본드핑거를 구비한 반도체장치의 제조방법으로서, 상기 반도체칩상에 어긋난 배치로 배열한 패드를 마련하는 공정, 상기 오목부의 단 1개에 마련된 상기 와이어본드핑거에서 상기 패드의 1열을 향해서 역방향 본드로 본딩을 실행하는 공정 및 상기 역방향 본드로 본딩을 실행하는 공정에 이어서 다른 열의 상기 패드에서 상기단의 다른 단에 마련된 상기 와이어본드핑거를 향해서 정방향 본드로 본딩을 실행하는 공정을 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960014648A 1995-10-04 1996-05-06 반도체장치 및 그 제조방법 KR100228595B1 (ko)

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