KR920022685A - 디지탈 vco - Google Patents
디지탈 vco Download PDFInfo
- Publication number
- KR920022685A KR920022685A KR1019920009106A KR920009106A KR920022685A KR 920022685 A KR920022685 A KR 920022685A KR 1019920009106 A KR1019920009106 A KR 1019920009106A KR 920009106 A KR920009106 A KR 920009106A KR 920022685 A KR920022685 A KR 920022685A
- Authority
- KR
- South Korea
- Prior art keywords
- output
- digital vco
- control means
- switching control
- decoder
- Prior art date
Links
- 230000010355 oscillation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0315—Ring oscillators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
- H03L7/0996—Selecting a signal among the plurality of phase-shifted signals produced by the ring oscillator
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 디지탈 VCO의 제1실시예를 도시하는 구성도,
제2도는 제1실시예의 요부 구성도,
제3도는 제1실시예의 회로의 동작을 도시하는 파형도.
Claims (4)
- 지연량을 제어할 수가 있는 인버터를 직렬로 복수개 접속해서 형성되는 링 오실레이터와, 상기한 링 오실레이터의 발진 주파수를 기준 주파수와 일치시키도록 제어하는 주파수 제어 회로와, 상기한 복수의 인버터의 각각에 설치되어 있는 각 출력 탭중에서 소정의 출력 탭을 선택하여 출력을 끌어내기 위한 선택 스위치와, 상기한 선택 스위치를 개재해서 출력이 끌어내어지는 출력 탭을 반복해서 절환되도록 제어하는 스위칭 제어 수단을 구비하는 것을 특징으로 하는 디지탈 VCO.
- 제1항에 있어서, 상기한 스위칭 제어 수단을 레이트 멀티플라이어와 분주기 U/D카운터, 및 디코더를 사용해서 구성한 것을 특징으로 하는 디지탈 VCO.
- 제1항에 있어서, 상기한 스위칭 제어 수단을 아더와 랫치 회로, 및 디코더를 사용해서 구성한 것을 특징으로 하는 디지탈 VCO.
- 제1항에 있어서, 상기한 링 오실레이터의 출력에 동기해서 디코더 출력을 랫치하는 랫치 회로를 설치해, 출력 신호중에 불필요한 펄스가 생성되는 것을 방지하도록 한 것을 특징으로 하는 디지탈 VCO.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP91-153897 | 1991-05-28 | ||
JP3153897A JPH04351008A (ja) | 1991-05-28 | 1991-05-28 | ディジタルvco |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920022685A true KR920022685A (ko) | 1992-12-19 |
KR100214783B1 KR100214783B1 (ko) | 1999-08-02 |
Family
ID=15572502
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920009106A KR100214783B1 (ko) | 1991-05-28 | 1992-05-28 | 디지탈 브이 씨 오 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5233316A (ko) |
EP (1) | EP0516379B1 (ko) |
JP (1) | JPH04351008A (ko) |
KR (1) | KR100214783B1 (ko) |
DE (1) | DE69203159T2 (ko) |
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KR970003810B1 (ko) * | 1993-04-14 | 1997-03-22 | 삼성전자 주식회사 | 어드레스 천이 검출회로를 내장하는 불휘발성 반도체 집적회로 |
JP3443896B2 (ja) * | 1993-10-08 | 2003-09-08 | 株式会社デンソー | デジタル制御発振装置 |
JP2900772B2 (ja) * | 1993-12-24 | 1999-06-02 | 株式会社デンソー | パルス位相差符号化回路とパルス発生回路との複合装置及びデジタル制御pll装置 |
US5394116A (en) * | 1993-12-29 | 1995-02-28 | At&T Corp. | Fractional phase shift ring oscillator arrangement |
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JP2669347B2 (ja) * | 1994-06-15 | 1997-10-27 | 日本電気株式会社 | クロック信号抽出回路 |
US5675392A (en) * | 1995-06-21 | 1997-10-07 | Sony Corporation | Mixer with common-mode noise rejection |
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JP3695819B2 (ja) | 1996-01-16 | 2005-09-14 | 株式会社東芝 | 信号処理回路及びこれを用いた再生装置 |
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US6115769A (en) * | 1996-06-28 | 2000-09-05 | Lsi Logic Corporation | Method and apparatus for providing precise circuit delays |
JP4319259B2 (ja) | 1996-07-02 | 2009-08-26 | 株式会社東芝 | アクティブ・ワイドレンジpll装置、位相ロックループ方法及びディスク再生装置 |
JPH1070441A (ja) * | 1996-08-27 | 1998-03-10 | Mitsubishi Electric Corp | 半導体装置 |
US5731743A (en) * | 1996-10-07 | 1998-03-24 | David Sarnoff Research Center, Inc. | Frequency synthesizer having phase error feedback for waveform selection |
US5889436A (en) * | 1996-11-01 | 1999-03-30 | National Semiconductor Corporation | Phase locked loop fractional pulse swallowing frequency synthesizer |
US5872488A (en) * | 1996-11-15 | 1999-02-16 | Hewlett-Packard Company | Dual input voltage controlled oscillator with compensated bang/bang frequency |
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GB2325803B (en) * | 1997-05-30 | 1999-09-29 | Lsi Logic Corp | Digital frequency generation method and apparatus |
JP3768665B2 (ja) | 1997-12-12 | 2006-04-19 | キヤノン株式会社 | 周波信号生成回路及び振動型アクチュエータの駆動装置 |
US6114915A (en) * | 1998-11-05 | 2000-09-05 | Altera Corporation | Programmable wide-range frequency synthesizer |
DE19852428C1 (de) * | 1998-11-13 | 2000-05-25 | Siemens Ag | Schaltung zur Erzeugung von digitalen periodischen Signalen |
US6557066B1 (en) | 1999-05-25 | 2003-04-29 | Lsi Logic Corporation | Method and apparatus for data dependent, dual level output driver |
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KR101970516B1 (ko) | 2012-12-24 | 2019-08-13 | 에스케이하이닉스 주식회사 | 클럭 생성 회로 |
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-
1991
- 1991-05-28 JP JP3153897A patent/JPH04351008A/ja active Pending
-
1992
- 1992-05-26 US US07/888,177 patent/US5233316A/en not_active Expired - Lifetime
- 1992-05-27 EP EP92304771A patent/EP0516379B1/en not_active Expired - Lifetime
- 1992-05-27 DE DE69203159T patent/DE69203159T2/de not_active Expired - Lifetime
- 1992-05-28 KR KR1019920009106A patent/KR100214783B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE69203159T2 (de) | 1995-11-23 |
JPH04351008A (ja) | 1992-12-04 |
EP0516379A2 (en) | 1992-12-02 |
KR100214783B1 (ko) | 1999-08-02 |
US5233316A (en) | 1993-08-03 |
DE69203159D1 (de) | 1995-08-03 |
EP0516379B1 (en) | 1995-06-28 |
EP0516379A3 (en) | 1993-06-09 |
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