KR920003629A - 바이어스 전압발생회로 및 연산증폭기 - Google Patents
바이어스 전압발생회로 및 연산증폭기 Download PDFInfo
- Publication number
- KR920003629A KR920003629A KR1019910011593A KR910011593A KR920003629A KR 920003629 A KR920003629 A KR 920003629A KR 1019910011593 A KR1019910011593 A KR 1019910011593A KR 910011593 A KR910011593 A KR 910011593A KR 920003629 A KR920003629 A KR 920003629A
- Authority
- KR
- South Korea
- Prior art keywords
- transistors
- operational amplifier
- bias voltage
- semiconductor substrate
- diode
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 2
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/34—DC amplifiers in which all stages are DC-coupled
- H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
- H03F3/347—DC amplifiers in which all stages are DC-coupled with semiconductor devices only in integrated circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/30—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
- H03F3/3001—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor with field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
- H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45508—Indexing scheme relating to differential amplifiers the CSC comprising a voltage generating circuit as bias circuit for the CSC
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Nonlinear Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Amplifiers (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본원 발명의 바이어스전압발생회로의 기본구성을 도시한 회로도,
제2도는 본원 발명의 연산증폭기의 일실시예를 도시한 회로도.
Claims (2)
- 다이오드접속된 제1도전형의 제1의 트랜지스터, 상기 제1도전형의 제2 및 제3의 트랜지스터로 이루어지는 커렌트미러회로와, 각각이 다이오드접속되는 동시에 각각의 입력전극이 상기 커랜트미러회로의 제2 및 제3의 트랜지스터의 출력전극에 접속된 상기 제1도전형과는 다른 제2도전형의 바이어스전압발생용의 제4 및 제5의 트랜지스터를 가지고, 상기 커렌트미러회로의 제1 내지 제3의 트랜지스터 및 상기 바이어스전압발생용의 제4 및 제5의 트랜지스터를 1칩 반도체기판상에 형성하는 동시에, 상기 커렌트미러회로의 제1의 트랜지스터의 입력전극에 접속되고, 소정의 바이어스전류를 공급하는 저항기를 상기 반도체기판의 외부에 설치한 것을 특징으로 하는 바이어스전압발생회로.
- 각각의 정전류원용 트랜지스터를 가지는 복수채널의 연산증폭기를 상기 1칩 반도체기판상에 형성하는 도시에, 청구항 제1항의 바이어스전압발생회로의 제4 및 제5의 트랜지스터의 강하전압에 의해 상기 복수채널의 연산증폭기의 정전류원용 트랜지스터를 각각 바이어스하도록 한 것을 특징으로 하는 연산증폭기.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2181654A JPH0470204A (ja) | 1990-07-11 | 1990-07-11 | バイアス電圧発生回路及び演算増幅器 |
JP90-181654 | 1990-07-11 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920003629A true KR920003629A (ko) | 1992-02-29 |
KR0154544B1 KR0154544B1 (ko) | 1998-12-15 |
Family
ID=16104528
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910011593A KR0154544B1 (ko) | 1990-07-11 | 1991-07-09 | 바이어스전압발생회로 및 연산증폭기 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5164614A (ko) |
JP (1) | JPH0470204A (ko) |
KR (1) | KR0154544B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100523649B1 (ko) * | 1997-07-15 | 2006-01-27 | 마쯔시다덴기산교 가부시키가이샤 | 차동증폭장치 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5583464A (en) * | 1994-05-13 | 1996-12-10 | Thinking Machines Corporation | Resistor circuit for integrated circuit chip using insulated field effect transistors |
JP2000269426A (ja) * | 1999-03-17 | 2000-09-29 | Toshiba Corp | ミラー回路 |
AU2001270290A1 (en) * | 2000-07-03 | 2002-01-14 | Broadcom Corporation | Bis circuit for establishing a plurality of bias voltages |
US6404252B1 (en) | 2000-07-31 | 2002-06-11 | National Semiconductor Corporation | No standby current consuming start up circuit |
US20060164128A1 (en) * | 2005-01-21 | 2006-07-27 | Miller Ira G | Low current power supply monitor circuit |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3136780A1 (de) * | 1981-09-16 | 1983-03-31 | Siemens AG, 1000 Berlin und 8000 München | Integrierte halbleiterschaltung |
US4477737A (en) * | 1982-07-14 | 1984-10-16 | Motorola, Inc. | Voltage generator circuit having compensation for process and temperature variation |
US4792705A (en) * | 1986-03-14 | 1988-12-20 | Western Digital Corporation | Fast switching charge pump |
JPH0727424B2 (ja) * | 1988-12-09 | 1995-03-29 | 富士通株式会社 | 定電流源回路 |
JPH02215154A (ja) * | 1989-02-16 | 1990-08-28 | Toshiba Corp | 電圧制御回路 |
US4978868A (en) * | 1989-08-07 | 1990-12-18 | Harris Corporation | Simplified transistor base current compensation circuitry |
-
1990
- 1990-07-11 JP JP2181654A patent/JPH0470204A/ja active Pending
-
1991
- 1991-07-09 KR KR1019910011593A patent/KR0154544B1/ko not_active IP Right Cessation
- 1991-07-10 US US07/727,930 patent/US5164614A/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100523649B1 (ko) * | 1997-07-15 | 2006-01-27 | 마쯔시다덴기산교 가부시키가이샤 | 차동증폭장치 |
Also Published As
Publication number | Publication date |
---|---|
JPH0470204A (ja) | 1992-03-05 |
US5164614A (en) | 1992-11-17 |
KR0154544B1 (ko) | 1998-12-15 |
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