KR910014937A - 반도체 기억장치 - Google Patents

반도체 기억장치 Download PDF

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Publication number
KR910014937A
KR910014937A KR1019900018940A KR900018940A KR910014937A KR 910014937 A KR910014937 A KR 910014937A KR 1019900018940 A KR1019900018940 A KR 1019900018940A KR 900018940 A KR900018940 A KR 900018940A KR 910014937 A KR910014937 A KR 910014937A
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KR
South Korea
Prior art keywords
memory cell
register means
cell arrays
semiconductor memory
memory
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Application number
KR1019900018940A
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English (en)
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KR940006362B1 (ko
Inventor
도시유끼 오가와
Original Assignee
시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
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Application filed by 시기 모리야, 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 시기 모리야
Publication of KR910014937A publication Critical patent/KR910014937A/ko
Application granted granted Critical
Publication of KR940006362B1 publication Critical patent/KR940006362B1/ko

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/109Control signal input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106Data output latches
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1087Data input latches
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093Input synchronization
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/107Serial-parallel conversion of data or prefetch

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)

Abstract

내용 없음

Description

반도체 기억장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 한 실시예인 반도체 기억장치의 전체의 구성을 개략적으로 표시하는 도면이다. 제2도는 제1도에 표시하는 반도체 기억장치의 주요부의 구성을 표시하는 도면이다. 제6도는 이 발명의 다른 실시예인 반도체 기억장치의 전체의 구성을 개략적으로 표시하는 도면이다.

Claims (1)

  1. 각각의 복수의 행 및 열로 이루어진 매트릭상으로 배열된 복수의 메모리 셀을 가진 복수의 메모리 셀 어레이를 포함하는 반도체 기억장치에 있어서, 상기 복수의 메모리 셀 어레이의 각각에 대하여 설치되고, 상기 메모리셀 매트릭스의 1행의 메모리 셀과 데이타의 수수가 가능한 기억용량을 구비하는 복수의 레지스터 수단, 및 상기 복수의 레지스터 수단의 각각에 대응하여 상기 설치되어, 대응의 레지스터 수단을 적어도 2개의 메로리 셀 어레이에 결합하는 수단을 구비하여, 상기 결합수단은, 전송선 지시 신호에 응답하여, 대응의 레지스터 수단을 상기 적어도 2개의 메모리셀 어레이중의 1개에 선택적으로 결합하여, 결합된 메모리 셀 어레이와 레지스터 수단과의 사이에서의 데이타 전송을 가능하게 하는 수단을 포함하는, 반도체 기억장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900018940A 1990-01-19 1990-11-22 반도체 기억장치와 그 동작방법 KR940006362B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011496A JP2880547B2 (ja) 1990-01-19 1990-01-19 半導体記憶装置
JP2-11496 1990-01-19

Publications (2)

Publication Number Publication Date
KR910014937A true KR910014937A (ko) 1991-08-31
KR940006362B1 KR940006362B1 (ko) 1994-07-18

Family

ID=11779640

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900018940A KR940006362B1 (ko) 1990-01-19 1990-11-22 반도체 기억장치와 그 동작방법

Country Status (4)

Country Link
US (1) US5566371A (ko)
JP (1) JP2880547B2 (ko)
KR (1) KR940006362B1 (ko)
DE (1) DE4022149A1 (ko)

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JPH05225774A (ja) * 1992-02-13 1993-09-03 Mitsubishi Electric Corp マルチポート半導体記憶装置
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JPH08315567A (ja) * 1995-05-22 1996-11-29 Mitsubishi Electric Corp 半導体記憶装置
JPH09134590A (ja) * 1995-09-04 1997-05-20 Mitsubishi Electric Corp 半導体記憶回路装置及びその設計装置
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Also Published As

Publication number Publication date
DE4022149C2 (ko) 1993-07-29
JPH03216888A (ja) 1991-09-24
US5566371A (en) 1996-10-15
KR940006362B1 (ko) 1994-07-18
DE4022149A1 (de) 1991-07-25
JP2880547B2 (ja) 1999-04-12

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