KR20020076694A - Multi-layer printed circuit board - Google Patents
Multi-layer printed circuit board Download PDFInfo
- Publication number
- KR20020076694A KR20020076694A KR1020010016760A KR20010016760A KR20020076694A KR 20020076694 A KR20020076694 A KR 20020076694A KR 1020010016760 A KR1020010016760 A KR 1020010016760A KR 20010016760 A KR20010016760 A KR 20010016760A KR 20020076694 A KR20020076694 A KR 20020076694A
- Authority
- KR
- South Korea
- Prior art keywords
- printed circuit
- circuit board
- capacitor
- layer
- copper foil
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
본 발명은 다층 인쇄회로기판에 관한 것으로, 더욱 상세하게는 적층된 동박적층판의 각각의 층에 패턴화된 커패시터패턴을 형성하고 비어홀을 통하여 서로 연결되게 하여 인쇄회로기판상에서 자체적인 커패시터용량을 구현할 수 있도록 하는 다층 인쇄회로기판에 관한 것이다.The present invention relates to a multilayer printed circuit board, and more particularly, to form a patterned capacitor pattern on each layer of the laminated copper-clad laminate and to be connected to each other through a via hole to realize its own capacitor capacity on the printed circuit board. The present invention relates to a multilayer printed circuit board.
일반적으로 인쇄회로기판은 종이에폭시 또는 유리에폭시계의 장방형의 기판 위에 동박을 입혀서 필요한 회로를 인쇄하고 그 이외의 부분은 제거한 후 다수개의 코일 및 콘덴서, 그리고 칩 등의 부품소자를 부착하여 소정의 전기적 신호를 출력 및 입력하여 처리하는 기능을 수행한다.In general, a printed circuit board is printed on a rectangular sheet of paper epoxy or glass epoxy and printed with a copper foil, and other parts are removed, and then a plurality of coils, capacitors, and chip components are attached to a predetermined electrical circuit. Output and input signals are processed.
상기 인쇄회로기판은 통상적으로 단층 인쇄회로기판, 양면 인쇄회로기판 및 다층 인쇄회로기판으로 분류되고 있으며, 전자산업의 발달로 보다 고다층화, 고밀도화 되고 있다.The printed circuit boards are generally classified into single-layer printed circuit boards, double-sided printed circuit boards, and multilayer printed circuit boards, and are becoming more multi-layered and higher-density due to the development of the electronic industry.
상기 다층 인쇄회로기판은 4층 이상의 기판으로서, 제조시 많은 공정과 정밀한 기술들이 요구되고 있는데, 종래의 다층 인쇄회로기판은 각각의 표면상에 정해진 회로패턴을 형성하고 적층되게 하여 결합회로를 구성한다.The multilayer printed circuit board is a substrate having four or more layers, and many processes and precise techniques are required in manufacturing. Conventional multilayer printed circuit boards form a combined circuit pattern on each surface and form a combined circuit. .
그런데, 상기와 같은 종래의 다층 인쇄회로기판은 고주파회로에 사용되는 경우 인쇄회로기판의 표면에 코일 및 콘덴서 등의 부품소자를 실장해야 하기 때문에 생산공수가 증가하여 제조시간이 과다해지고 다층 인쇄회로기판의 부피가 커져 제품의 소형화에 어려움이 있었다.However, when the conventional multilayer printed circuit board as described above is used in high frequency circuits, component elements such as coils and capacitors must be mounted on the surface of the printed circuit board, thereby increasing production time and increasing manufacturing time, and increasing the multilayer printed circuit board. Due to the large volume of the product, it was difficult to miniaturize the product.
본 발명은 상기와 같은 문제점을 해결하기 위하여 제안된 것으로서, 그 목적으로 하는 바는 적층된 동박적층판의 각 층별로 커패시터패턴을 좌측 또는 우측에 교대로 형성되게 하고, 상기 커패시터패턴이 서로 연결되도록 동박적층판의 좌·우에 비어홀(via hole)을 형성하여 인쇄회로기판상에서 자체적인 커패시터용량을 구현할 수 있게 함으로써 별도로 실장되는 부품소자의 수를 최소화하여 생산공수 및 제조시간을 단축하고 공간 효율화를 통한 제품의 소형화를 실현시키는데 있다.The present invention has been proposed to solve the above problems, and its object is to have a capacitor pattern alternately formed on the left or the right of each layer of the laminated copper foil laminated plate, and the copper foil is connected to each other. By forming via holes in the left and right sides of the laminated board to realize its own capacitor capacity on the printed circuit board, it minimizes the number of separately mounted component elements, shortening production man-hours and manufacturing time, and improving product efficiency through space efficiency. It is to realize miniaturization.
도 1은 본 발명에 따른 다층 인쇄회로기판을 나타내는 단면도이다.1 is a cross-sectional view showing a multilayer printed circuit board according to the present invention.
* 도면의 주요 부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings
100: 다층 인쇄회로기판 110: 동박적층판100: multilayer printed circuit board 110: copper laminated board
120: 커패시터패턴 130: 비어홀120: capacitor pattern 130: via hole
상기와 같은 목적을 달성하기 위한 본 발명은 적층된 동박적층판의 각 층별로 패턴화된 커패시터패턴을 형성하되 상기 동박적층판의 각각의 층에 좌·우측으로 교대로 위치되게 하여 상·하간에 커패시터가 구현될 수 있게 하며, 상기 동박적층판의 각 층별로 형성된 커패시터패턴이 서로 연결되도록 상기 동박적층판의 좌·우에 비어홀을 형성시킨 것을 그 기술적 구성상의 기본 특징으로 한다.The present invention for achieving the above object is to form a capacitor pattern patterned for each layer of the laminated copper-clad laminate, while the capacitors are positioned up and down alternately to the left and right of each layer of the copper-clad laminate. The via hole may be formed at the left and right sides of the copper-clad laminate so that the capacitor patterns formed for each layer of the copper-clad laminate are connected to each other.
위와 같이 구성된 본 발명의 바람직한 실시예를 도면을 참조하면서 상세히 설명하면 다음과 같다.Referring to the preferred embodiment of the present invention configured as described above in detail with reference to the drawings as follows.
도 1은 본 발명에 따른 다층 인쇄회로기판을 나타내는 단면도이다.1 is a cross-sectional view showing a multilayer printed circuit board according to the present invention.
도 1에 나타낸 바와 같이, 본 발명에 따른 다층 인쇄회로기판(100)은 적층된다수의 동박적층판(110)과, 상기 동박적층판(110)의 각 층별로 패턴화된 커패시터패턴(120)과, 상기 동박적층판(110)의 좌·우에 형성되어 커패시터패턴(120)을 서로 연결시키는 비어홀(130)로 구성된다.As shown in FIG. 1, the multilayered printed circuit board 100 according to the present invention is laminated with a number of copper foil laminated boards 110, capacitor patterns 120 patterned for each layer of the copper foil laminated boards 110, and It is formed on the left and right of the copper-clad laminate 110 is composed of a via hole 130 connecting the capacitor pattern 120 to each other.
상기 커패시터패턴(120)은 동박적층판(110)의 각각의 층에 좌·우측으로 교대로 위치되게 한다.The capacitor pattern 120 is alternately positioned left and right on each layer of the copper clad laminate 110.
상기 비어홀(130)의 내부는 동박으로 도금하여 동박적층판(110)의 각 층별로 형성된 커패시터패턴(120)이 서로 연결되게 한다.The inside of the via hole 130 is plated with copper foil so that the capacitor patterns 120 formed for each layer of the copper-clad laminate 110 are connected to each other.
따라서, 상기와 같은 구성으로 이루어진 다층 인쇄회로기판(100)은 적층된 동박적층판(110)에 각 층별로 형성된 커패시터패턴(120)이 비어홀(130)을 통하여 서로 연결되므로 커패시터패턴(120) 사이에 커패시터값을 형성하게 되고 커패시터패턴(120)간의 교차층수 및 교차면적 등을 이용하여 커패시터용량을 다층 인쇄회로기판상에서 적절하게 구현하므로 고주파회로에서 1pF 이하의 커패시터용량을 구현할 수 있게 된다.Therefore, the multilayer printed circuit board 100 having the above-described configuration has a capacitor pattern 120 formed in each layer on the laminated copper foil laminate 110, so that the capacitor patterns 120 are connected to each other through the via hole 130. Since the capacitor value is formed and the capacitor capacity is appropriately implemented on the multilayer printed circuit board by using the number of crossing layers and the cross-sectional area between the capacitor patterns 120, the capacitor capacity of 1 pF or less can be realized in the high frequency circuit.
이상에서 살펴본 바와 같이 본 발명에 따른 다층 인쇄회로기판에 의하면, 동박적층판의 각 층별로 커패시터패턴 및 비아홀을 형성하되 서로 연결되게 하여 커패시터패턴 사이에 형성되는 커패시터값을 조절 가능하게 함으로써 별도의 실장부품소자 없이 인쇄회로기판상에서 자체적인 커패시터용량을 구현할 수 있게 되어 생산공수 및 제조시간이 단축되고 제품의 부피를 최소화시킬 수 있는 효과가 있다.As described above, according to the multilayer printed circuit board according to the present invention, a capacitor pattern and a via hole are formed for each layer of the copper-clad laminate, but are connected to each other to control the capacitor values formed between the capacitor patterns. Capable of implementing its own capacitor capacity on a printed circuit board without devices, it is possible to reduce the production time and manufacturing time, and to minimize the volume of the product.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020010016760A KR20020076694A (en) | 2001-03-30 | 2001-03-30 | Multi-layer printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020010016760A KR20020076694A (en) | 2001-03-30 | 2001-03-30 | Multi-layer printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20020076694A true KR20020076694A (en) | 2002-10-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020010016760A KR20020076694A (en) | 2001-03-30 | 2001-03-30 | Multi-layer printed circuit board |
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| Country | Link |
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| KR (1) | KR20020076694A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20150052628A (en) | 2013-11-06 | 2015-05-14 | 삼성전기주식회사 | Variable capacitance device and method using pcb capacitor |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06302966A (en) * | 1993-04-19 | 1994-10-28 | Murata Mfg Co Ltd | Multilayered substrate |
| JPH10112417A (en) * | 1996-10-07 | 1998-04-28 | Murata Mfg Co Ltd | Laminated electronic component and its manufacture |
| KR0130899Y1 (en) * | 1994-11-30 | 1999-04-15 | 김회수 | Printing capacitor structure of use in a via hole |
| JP2000058381A (en) * | 1998-08-13 | 2000-02-25 | Murata Mfg Co Ltd | Multilayer substrate having built-in capacitor |
| JP2000188481A (en) * | 1998-12-24 | 2000-07-04 | Sumitomo Metal Electronics Devices Inc | Ceramic circuit board |
-
2001
- 2001-03-30 KR KR1020010016760A patent/KR20020076694A/en not_active Application Discontinuation
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06302966A (en) * | 1993-04-19 | 1994-10-28 | Murata Mfg Co Ltd | Multilayered substrate |
| KR0130899Y1 (en) * | 1994-11-30 | 1999-04-15 | 김회수 | Printing capacitor structure of use in a via hole |
| JPH10112417A (en) * | 1996-10-07 | 1998-04-28 | Murata Mfg Co Ltd | Laminated electronic component and its manufacture |
| JP2000058381A (en) * | 1998-08-13 | 2000-02-25 | Murata Mfg Co Ltd | Multilayer substrate having built-in capacitor |
| JP2000188481A (en) * | 1998-12-24 | 2000-07-04 | Sumitomo Metal Electronics Devices Inc | Ceramic circuit board |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20150052628A (en) | 2013-11-06 | 2015-05-14 | 삼성전기주식회사 | Variable capacitance device and method using pcb capacitor |
| US9877392B2 (en) | 2013-11-06 | 2018-01-23 | Samsung Electro-Mechanics Co., Ltd. | PCB capacitor variable device and method |
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