CN220307461U - Circuit board and combined circuit board - Google Patents

Abstract

The application discloses circuit board and combination circuit board, wherein, the circuit board includes: the substrate comprises nonmetallic media and at least one conductive pattern layer which are alternately laminated, wherein one conductive pattern layer extends out of the substrate to form a side pin; the copper layer is arranged on the top surface and the bottom surface of the substrate and is used for presetting the substrate. Through the mode, the utility model can reduce the volume of the product and increase the functions and the performances of the product.

Description

Circuit board and combined circuit board

Technical Field

The application relates to the technical field of side pin PCBs, in particular to a circuit board and a combined circuit board.

Background

PCB (Printed Circuit Board), also called a printed wiring board or a printed circuit board, is a main carrier for electronic devices, and is an important component of present-day electronic equipment, and is a carrier for electrically interconnecting electronic components.

At present, most products are designed into a two-dimensional surface mounting mode of double-sided mounting and welding of an element surface and a welding surface. However, in the prior art, in order to achieve miniaturization of the product volume, the PCB is usually manufactured into a rigid-flex structure, but the rigid-flex structure is difficult to manufacture, and the manufacturing cost is difficult to reduce.

Disclosure of Invention

The application provides a realization mode of a side pin PCB (printed Circuit Board) so as to reduce the volume of a product and reduce the manufacturing cost.

In order to solve the above technical problem, the present application provides a circuit board, including: the substrate comprises nonmetallic media and at least one conductive pattern layer which are alternately laminated, wherein one conductive pattern layer extends out of the substrate to form a side pin; and the copper layers are arranged on the top surface and the bottom surface of the substrate.

The width of the side pins is the same as the width of the outer edge of the conductive pattern layer.

Wherein the length of the side pins extending out of the substrate is greater than 3 mm.

Wherein, a plurality of through holes penetrating through the substrate are arranged on the substrate, and the walls of the through holes are plated with metal layers; at least one conductive pattern layer is in communication with the via.

Wherein, part of metal of the outer hole wall of the via hole extends outwards to form an electric conduction layer.

And the hole openings at two sides of the via hole are covered with a metal layer to form a pin bonding pad.

Wherein the substrate comprises at least two laminated sub-boards; the sub-boards comprise nonmetallic media and conductive patterns which are mutually overlapped, wherein one conductive pattern of one sub-board extends out of the substrate to form side pins.

The nonmetallic medium arranged in an alternating lamination mode comprises a first nonmetallic medium arranged between the copper layer and the conductive pattern layer and a second nonmetallic medium arranged between the conductive pattern layers.

In order to solve the technical problems, the application also provides a combined circuit board, which comprises a first circuit board and a second circuit board, wherein the first circuit board and the second circuit board are the circuit boards of any one of the embodiments;

the side pins of the first circuit board are connected with the corresponding side pins of the second circuit board.

The side pins of the first circuit board are perpendicular to the side pins of the second circuit board and are connected with each other.

The beneficial effects of the utility model are as follows: in the condition of being different from prior art, this application is realized three-dimensional welding interconnection through setting up the side pin that is formed by the extension of conductive pattern layer in the base plate, can realize through the normal technology of PCB board, and the preparation degree of difficulty is low, can improve the wiring density of component face and welding face simultaneously. According to the utility model, the side pins are arranged, the plurality of circuit boards can be vertically welded through the side pins to form a three-dimensional structure, the structural space is reduced, meanwhile, different PCB boards can be interconnected through the pins to form different functional modules, so that the product volume is reduced, and meanwhile, the product functions and performances can be increased.

Drawings

FIG. 1 is a schematic diagram of an embodiment of a circuit board of the present utility model;

FIG. 2 is a schematic diagram of a connection method of a first nonmetallic medium and a copper layer according to an embodiment of the present utility model;

FIG. 3 is a schematic diagram of an embodiment of a conductive pattern layer structure according to the present utility model;

FIG. 4 is a schematic view of an embodiment of a sub-panel connection structure according to the present utility model;

fig. 5 is a schematic structural diagram of an embodiment of a connection mode between a via hole and a substrate according to the present utility model.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

It should be noted that, in the embodiment of the present application, directional indications (such as up, down, left, right, front, and rear … …) are referred to, and the directional indications are merely used to explain the relative positional relationship, movement conditions, and the like between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are correspondingly changed.

In addition, if there is a description of "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be regarded as not exist and not within the protection scope of the present application.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a circuit board provided in the present application.

The utility model provides a circuit board, as shown in fig. 1, the circuit board of the embodiment comprises a substrate 80 and a copper layer 20, wherein the copper layer 20 is arranged on the top surface and the bottom surface of the substrate 80 to form a double-copper layer plate. The substrate 80 includes an alternating stack of nonmetallic dielectric 801 and at least one conductive pattern 802. In the embodiment of the present utility model, the nonmetallic medium 801 may specifically include one or more of epoxy resins, polyimides, bismaleimide triazines (Bismaleimide Triazine, BT) and ceramic bases, which are not limited herein. The conductive pattern layer 802 is a metal layer and may be formed by coating, exposing, developing, etching, stripping, and the like.

In order to solve the problem that the size of the device is difficult to reduce due to the influence of the size of the device, wiring and the like, the design density of the element surface and the welding surface is increased, and the size of the device is reduced. In this embodiment, the conductive pattern 802 extends out of the substrate 80 to form the side pins 30 for performing side soldering interconnection between different circuit boards to form a three-dimensional structure. In an alternative embodiment, the side pins 30 and the conductive pattern 802 are made of the same metal, and in other embodiments, the side pins 30 may be made of a conductive metal with better ductility, such as copper, aluminum, etc., and the shape of the side pins 30 may be rectangular, square, or other shapes that are convenient for connection, such as hexagonal, irregular shapes that match the requirements, etc., which are not limited herein.

Specifically, in an alternative embodiment, the side pins may be formed by: firstly, the redundant part of the nonmetal medium 801 around the conductive pattern layer 802 is removed, so that the conductive pattern layer 802 can be exposed after the redundant nonmetal medium 801 is removed, which is equivalent to that a part of the side pins extend out of the whole structure of the circuit board after the nonmetal medium 801 is removed, and at this time, the exposed part of the conductive pattern layer 802 forms the side pins 30. In the subsequent soldering or assembly between the circuit boards, the interconnection can be vertically soldered via the side pins 30 described above, without the need for additional connection devices to form a three-dimensional soldered interconnection on the sides of the circuit boards.

In this way, the side pins 30 extending from the conductive layer 802 can be soldered and interconnected between different circuit boards to form a three-dimensional structure, so as to achieve the function of reducing the volume of the device.

In other embodiments, as shown in fig. 2, the top surface and the bottom surface of the first non-metal medium 8011 are both provided with a copper layer 20, and as shown in fig. 3, the conductive pattern layer 802 may be formed after the processes of coating, exposing, developing, etching, stripping, etc. the specific process for manufacturing the conductive pattern layer 802 is not limited herein. In order to secure the conductive performance of the circuit board, in the present embodiment, the conductive pattern layer 802 may be provided with two or more layers.

In any of the above embodiments, in order to ensure the conductive performance of the circuit board, the lateral pins 30 have the same width as the outer edge of the conductive pattern layer 802, so that the conductive pattern layer 802 can be prevented from leaking.

In any of the above embodiments, the length of the side leads 30 extending out of the substrate 80 is generally set to be greater than 3 mm, thereby ensuring stability during soldering of the side leads 30. For example, the side pins 30 may be set to 3 mm, 3.5 mm, 3.6 mm, 4 mm. If the circuit boards are multi-layer circuit boards, the layers are thicker, and the circuit boards can be arranged in a matching way according to the thickness of the circuit boards to be connected, such as 5 mm, 10 mm and the like. In this way, on the one hand, the side pins 30 can be prevented from being broken due to overlong arrangement, and on the other hand, connection can be more conveniently performed.

In any of the above embodiments, the substrate 80 is provided with a plurality of via holes 40 penetrating through the substrate 80, wherein the via holes 40 may be buried holes or blind holes, which is not limited herein. The via hole 40 can be used for internal interconnection or used as an element positioning hole, and the hole wall of the via hole 40 is plated with a metal layer; the copper layer 20 on the top and bottom surfaces of the substrate 80 may be electrically connected by a metallization layer, and at least one conductive pattern layer 802 may be in communication with the via 40.

In the above embodiment, the metal hole wall of the via hole 40 is connected to the conductive pattern layer 802. In an alternative embodiment, to simplify the manufacturing process, the conductive pattern layer 802 may also be formed by extending part of the metal of the outer wall of the via hole 40 to the outside of the hole, which may extend to form one or more conductive pattern layers 802, which is not limited herein.

According to the circuit board provided by the embodiment of the utility model, the via holes 40 are internally filled with the hole plugging medium 50, and the hole plugging medium 50 can prevent tin from penetrating through the element surface from the via holes 40 when the PCB passes wave soldering, thereby ensuring the reliability of the circuit board, and the holes at two sides of the via holes 40 are covered with the metal layers to form the pin pads, and the pin pads can be used for welding components and external equipment.

In a specific embodiment, as shown in fig. 4, the substrate 80 includes at least two stacked sub-boards 803; the sub-boards 803 include a non-metal dielectric 801 and a conductive pattern 802 stacked on each other, as shown in fig. 4, two sub-boards 803 are stacked on a second non-metal dielectric 8012, and are pressed together to form the substrate 80, where one conductive pattern 802 of one sub-board 803 extends out of the substrate 80 to form the side pins 30, and the sub-board 803 may extend out from one side or may extend out from multiple sides to form the side pins 30. The alternating stack of nonmetallic media 801 includes a first nonmetallic medium 8011 disposed between the copper layer 20 and the conductive pattern layer 802 and a second nonmetallic medium 8012 disposed between the conductive pattern layer 802. The first non-metal medium 8011 is specifically a copper-clad plate medium, and the second non-metal medium 8012 is specifically an interlayer lamination medium.

By the mode, the side pins 30 and the outer edges of the conductive pattern layers 802 are the same in width by arranging the mode that the conductive pattern layers 802 in the substrate 80 extend to form the side pins, so that electric leakage of the conductive pattern layers 802 can be prevented, the lengths of the side pins 30 can be matched according to the thickness of a circuit board to be connected, the side pins can be realized through a normal process of a PCB, the manufacturing difficulty is low, and the stability of the side pins 30 in the welding process can be ensured; the conductive pattern layer 802 is communicated with the via hole 40 by plating a metal layer on the wall of the via hole 40, and part of metal on the outer wall of the via hole 40 extends outwards to form one or more conductive pattern layers 802, so that the preparation process can be simplified, and the preparation efficiency of the conductive pattern layers 802 can be improved; by filling the via hole 40 with the hole plugging medium 50, short circuit caused by tin penetrating through the element surface from the via hole 40 when the PCB passes wave soldering can be prevented, so that the reliability of the circuit board is ensured; by laminating the two sub-boards 803 to form the substrate 80, the substrate can be manufactured by using a simple process for manufacturing a PCB, and the manufacturing difficulty is reduced.

The utility model also provides a combined circuit board, which comprises a first circuit board and a second circuit board, wherein the first circuit board and the second circuit board are the circuit boards;

the side pins 30 of the first circuit board are connected with the corresponding side pins 30 of the second circuit board.

Specifically, in the present embodiment, the side pins 30 may be disposed on a side of the first circuit board, and the first circuit board is soldered to the side pins 30 on the side of the second circuit board, and the first circuit board is electrically connected to the second circuit. Different functional modules can be interconnected through pins between different circuit boards while reducing the structural space, so that the volume of the product is reduced, and the functions and performances of the product are increased.

The first circuit board may be a circuit board for audio amplification, the second circuit board may be a circuit board with a filtering function, the first circuit board and the second circuit board are electrically connected through the side pins 30, when audio is transmitted, the audio may be filtered through the second circuit board, and then amplified through the first circuit board, and the second circuit board may also be a circuit board with other functions, which is not limited herein.

In another embodiment, the side pins 30 may be disposed on multiple sides of the first circuit, and the first circuit board may be soldered and interconnected with the side pins 30 on the sides of the multiple circuit boards, where the connection between the circuit boards is consistent with the above process, and will not be repeated herein.

According to the circuit board provided by the embodiment of the utility model, the side pins 30 of the first circuit board and the side pins 30 of the second circuit board are vertically arranged and connected with each other, and the first circuit board and the second circuit board are welded to form a three-dimensional structure, so that the structural space is reduced.

In this way, the utility model connects the plurality of circuit boards to form the combined circuit board by the way of connecting the side pins 30, so that on one hand, the wiring density of the element surface and the welding surface can be improved, and on the other hand, the product volume can be reduced, and the function and performance of the product can be improved.

In any of the above embodiments, the manufacturing process of the circuit board may be as follows:

as shown in fig. 2, the top surface and the bottom surface of the first non-metal dielectric 8011 are both provided with a copper layer 20, so as to form a sub-board 803, where the copper layer 20 has the same width and length as the first non-metal dielectric 8011, and the thickness of the first non-metal dielectric 8011 may be greater than the thickness of the copper layer 20, and the thickness of the first non-metal dielectric 8011 may also be the same as the copper layer 20, which is not specifically limited herein.

As shown in fig. 3, the conductive pattern 802 in the substrate 80 may be obtained by etching away the copper layer 20 on one side of the first non-metal dielectric 8011, and the etching process may be acid etching or alkaline etching, which is not limited herein.

As shown in fig. 4, two opposite sub-boards 803 are stacked with a second non-metal medium 8012, and the substrate 80 is formed by pressing, so that the conductive pattern layers 802 of the two sub-boards 803 are embedded in the second non-metal medium 8012.

As shown in fig. 5, after the substrate 80 is formed by the above-mentioned lamination, the via hole 40 is obtained by drilling on the surface of the substrate 80, and the via hole 40 is communicated with the inner layer image in the substrate 80 by copper plating on the outer side wall of the via hole 40, further, the via hole medium 50 can be placed in the via hole 40, and then the surface copper layer 20 is etched to make a circuit, and the surface solder resist 10 of the substrate 80 is made.

As shown in fig. 1, after the circuit board passes through the above-mentioned process, the redundant part in the nonmetal medium 801 around the conductive pattern layer 802 can be removed, so that the conductive pattern layer 802 is exposed after the redundant nonmetal medium 801 is removed, which is equivalent to that a part of side pins extend out of the whole structure of the circuit board after the nonmetal medium 801 is removed, at this time, the exposed part of the conductive pattern layer 802 forms the side pins 30, so that the first circuit board and the second circuit board can be electrically connected through the side pins 30 to perform different functional module interconnection.

The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application or other related technical fields are included in the scope of the patent application.

Claims (10)

1. A circuit board, the circuit board comprising:

the substrate comprises nonmetallic media and at least one conductive pattern layer which are alternately laminated, wherein one conductive pattern layer extends out of the substrate to form a side pin;

and the copper layers are arranged on the top surface and the bottom surface of the substrate.

2. The circuit board of claim 1, wherein the side pins are the same width as the outer edges of the conductive pattern.

3. The circuit board of claim 1, wherein the side pins extend beyond the substrate by a length greater than 3 millimeters.

4. The circuit board of claim 1, wherein a plurality of through holes penetrating through the substrate are formed in the substrate, and walls of the through holes are plated with a metal layer; the at least one conductive pattern layer is in communication with the via.

5. The circuit board of claim 4, wherein a portion of the metal of the outer wall of the via extends out of the hole to form the conductive pattern.

6. The circuit board of claim 4, wherein the via is filled with a via fill medium, and openings on both sides of the via are covered with a metal layer to form a pin pad.

7. The circuit board of claim 1, wherein the substrate comprises at least two stacked sub-boards; the sub-boards comprise nonmetallic media and conductive pattern layers which are mutually overlapped, wherein one layer of the conductive pattern layer of one sub-board extends out of the substrate to form the side pin.

8. The circuit board of claim 1, wherein the alternating stack of non-metallic media comprises a first non-metallic media disposed between the copper layer and the conductive pattern layer and a second non-metallic media disposed between the conductive pattern layers.

9. A combined circuit board, characterized in that the combined circuit board comprises a first circuit board and a second circuit board, wherein the first circuit board and the second circuit board are the circuit boards of any one of claims 1 to 8;

the side pins of the first circuit board are connected with the corresponding side pins of the second circuit board.

10. The combination circuit board of claim 9, wherein the side pins of the first circuit board are disposed perpendicular to and interconnect with the side pins of the second circuit board.