KR20010062445A - 반도체 장치 및 본드 패드 형성 프로세스 - Google Patents
반도체 장치 및 본드 패드 형성 프로세스 Download PDFInfo
- Publication number
- KR20010062445A KR20010062445A KR1020000076794A KR20000076794A KR20010062445A KR 20010062445 A KR20010062445 A KR 20010062445A KR 1020000076794 A KR1020000076794 A KR 1020000076794A KR 20000076794 A KR20000076794 A KR 20000076794A KR 20010062445 A KR20010062445 A KR 20010062445A
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- South Korea
- Prior art keywords
- bond pad
- film
- barrier layer
- dielectric film
- region
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 58
- 230000008569 process Effects 0.000 title claims description 15
- 230000009977 dual effect Effects 0.000 title description 8
- 229910052751 metal Inorganic materials 0.000 claims abstract description 48
- 239000002184 metal Substances 0.000 claims abstract description 48
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 239000004065 semiconductor Substances 0.000 claims abstract description 13
- 230000004888 barrier function Effects 0.000 claims description 63
- 238000000151 deposition Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 9
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 7
- 238000001020 plasma etching Methods 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052721 tungsten Inorganic materials 0.000 claims description 5
- 229910000838 Al alloy Inorganic materials 0.000 claims description 4
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 229910052715 tantalum Inorganic materials 0.000 claims description 4
- -1 TaSi Inorganic materials 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 3
- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 claims 2
- 229910008484 TiSi Inorganic materials 0.000 claims 2
- 229910008812 WSi Inorganic materials 0.000 claims 2
- 229910008807 WSiN Inorganic materials 0.000 claims 2
- FGUUSXIOTUKUDN-IBGZPJMESA-N C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 Chemical compound C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 FGUUSXIOTUKUDN-IBGZPJMESA-N 0.000 claims 1
- 229910004166 TaN Inorganic materials 0.000 claims 1
- 239000012528 membrane Substances 0.000 abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 abstract description 2
- 239000010703 silicon Substances 0.000 abstract description 2
- 230000000873 masking effect Effects 0.000 description 15
- 238000007796 conventional method Methods 0.000 description 9
- 238000000059 patterning Methods 0.000 description 7
- 238000005229 chemical vapour deposition Methods 0.000 description 6
- 230000010354 integration Effects 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 3
- 239000010937 tungsten Substances 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- UGACIEPFGXRWCH-UHFFFAOYSA-N [Si].[Ti] Chemical compound [Si].[Ti] UGACIEPFGXRWCH-UHFFFAOYSA-N 0.000 description 1
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000000872 buffer Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 238000011112 process operation Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- WNUPENMBHHEARK-UHFFFAOYSA-N silicon tungsten Chemical compound [Si].[W] WNUPENMBHHEARK-UHFFFAOYSA-N 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
Classifications
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- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H01L21/7681—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving one or more buried masks
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Abstract
Description
Claims (22)
- 반도체 장치에 있어서,능동 소자가 위에 형성되어 있는 기판 영역 위에 형성된 본드 패드를 포함하되, 상기 본드 패드는 장벽층으로 형성된 저면을 갖는 개구 내, 및 상기 저면을 그리고 상기 장벽층 밑에 배치된 유전체층을 관통하여 형성된 적어도 하나의 비아 내에 형성된 본드 패드 금속을 포함하는 반도체 장치.
- 제 1 항에 있어서,상기 기판 영역과 상기 유전체층 간에 배치된 도전층을 더 포함하는 반도체 장치.
- 제 2 항에 있어서,상기 본드 패드는 상기 적어도 하나의 비아를 통해 상기 도전층에 결합되어 있는 반도체 장치.
- 제 2 항에 있어서,상기 도전층은 상기 능동 소자중 적어도 하나의 능동 소자에 결합되어 있는 반도체 장치.
- 제 2 항에 있어서,상기 도전층은 패턴화된 막을 포함하는 반도체 장치.
- 제 1 항에 있어서,상기 장벽층은 TiN을 포함하는 반도체 장치.
- 제 1 항에 있어서,상기 장벽층은 Ta, Ti, TaN, WSi, WSiN, TaSi 및 TiSi로 구성된 그룹중에서 선택된 재료로 형성되는 반도체 장치.
- 제 1 항에 있어서,상기 본드 패드의 최상면에 결합된 도전 배선을 더 포함하는 반도체 장치.
- 제 1 항에 있어서,상기 본드 패드 개구 내의 상기 본드 패드 금속의 적어도 일부 위에 형성된 부수적인 장벽층을 더 포함하는 반도체 장치.
- 제 1 항에 있어서,상기 본드 패드 금속은 W, Al, Cu, 알루미늄 합금 및 동 합금중의 하나를 포함하는 반도체 장치.
- 제 2 항에 있어서,상기 도전층은 W, Al, Cu, 알루미늄 합금 및 동 합금중의 하나를 포함하는 반도체 장치.
- 반도체 장치 내에 본드 패드를 형성하는 프로세스에 있어서,a) 복수의 능동 소자가 위에 형성되어 있는 반도체 기판을 제공하는 단계와,b) 상기 기판 위에 하부 유전체막을 형성하는 단계와,c) 적어도 하나의 본드 패드 영역 - 상기 본드 패드 영역은 상기 복수의 능동 소자중의 적어도 하나를 포함함- 내의 상기 하부 유전체막 위에 장벽층을 형성하는 단계와,d) 상기 장벽층과 상기 하부 유전체막 위에 상부 유전체막을 형성하는 단계와,e) 상기 본드 패드 영역으로부터 상기 상부 유전체막을 제거하여, 상기 장벽층을 노출시키고 본드 패드 개구를 형성하는 단계와,f) 상기 본드 패드 영역 내에 적어도 하나의 비아 - 상기 각각의 비아는 상기 장벽층 및 상기 하부 유전체막에 걸쳐 연장함 - 를 형성하는 단계와,g) 상기 적어도 하나의 비아 및 상기 본드 패드 개구를 금속막으로 실질적으로 충진하는 단계를 포함하는본드 패드 형성 프로세스.
- 제 12 항에 있어서,상기 단계 g)는 상기 적어도 하나의 비아 내 및 상기 본드 패드 개구 내에 동 및 알루미늄중의 적어도 하나를 포함하는 금속막을 증착하는 것을 포함하는 본드 패드 형성 프로세스.
- 제 12 항에 있어서,상기 단계 f)는 반응성 이온 에칭을 포함하는 본드 패드 형성 프로세스.
- 제 12 항에 있어서,상기 단계 e)는 상기 상부 유전체막을 선택적으로 에칭하는 것을 포함하는 본드 패드 형성 프로세스.
- 제 12 항에 있어서,상기 단계 c)는 상기 하부 유전체막에 TiN 막을 증착하는 것을 포함하는 본드 패드 형성 프로세스.
- 제 12 항에 있어서,상기 단계 g)는 상기 적어도 하나의 비아 및 상기 본드 패드 개구 내에 그리고 상기 상부 유전체막의 최상면 위에 금속막을 증착한 다음, 상기 최상면 위로부터 상기 증착된 금속막의 일부를 제거하는 것을 포함하는 본드 패드 형성 프로세스.
- 제 17 항에 있어서,상기 증착된 금속막의 부분은 화학 기계적 세정에 의해 상기 최상면 위로부터 제거되는 본드 패드 형성 프로세스.
- 제 18 항에 있어서,상기 금속막은 본드 패드 금속막 위에 형성된 부수적인 장벽층을 포함하는 합성 막인 본드 패드 형성 프로세스.
- 제 12 항에 있어서,a1) 상기 본드 패드 영역 내의 상기 반도체 기판 위에 도전막을 형성하는 단계를 더 포함하고, 상기 단계 b)는 상기 도전막 위에 상기 하부 유전체막을 형성하는 것을 포함하는 본드 패드 형성 프로세스.
- 제 12 항에 있어서,a1) 적어도 상기 본드 패드 영역 내의 상기 반도체 기판 위에 패턴화된 도전막을 형성하는 단계를 더 포함하고, 상기 단계 b)는 상기 패턴화된 도전막 위에 상기 하부 유전체막을 형성하는 것을 포함하고, 상기 본드 패드 영역 내의 적어도 하나의 비아는 상기 패턴화된 도전막의 영역을 노출시키는 본드 패드 형성 프로세스.
- 제 12 항에 있어서,상기 단계 c)는 Ta, Ti, TaN, TiN, TaSi, TiSi, WSi 및 WSiN으로 구성된 그룹중에서 선택된 재료로 형성되는 막을 증착하는 것을 포함하는 본드 패드 형성 프로세스.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
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US09/465,075 | 1999-12-16 | ||
US09/465,075 US6417087B1 (en) | 1999-12-16 | 1999-12-16 | Process for forming a dual damascene bond pad structure over active circuitry |
US09/465,089 US6838769B1 (en) | 1999-12-16 | 1999-12-16 | Dual damascene bond pad structure for lowering stress and allowing circuitry under pads |
US09/465,089 | 1999-12-16 |
Publications (2)
Publication Number | Publication Date |
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KR20010062445A true KR20010062445A (ko) | 2001-07-07 |
KR100691051B1 KR100691051B1 (ko) | 2007-03-09 |
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KR1020000076794A KR100691051B1 (ko) | 1999-12-16 | 2000-12-15 | 반도체 디바이스 및 본드 패드 형성 프로세스 |
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JP (1) | JP4138232B2 (ko) |
KR (1) | KR100691051B1 (ko) |
GB (1) | GB2364170B (ko) |
TW (1) | TW477000B (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10186541B2 (en) | 2015-08-07 | 2019-01-22 | Samsung Electronics Co., Ltd. | Semiconductor devices |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2003068878A (ja) * | 2001-08-23 | 2003-03-07 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
DE10200932A1 (de) * | 2002-01-12 | 2003-07-24 | Philips Intellectual Property | Diskretes Halbleiterbauelement |
US7096581B2 (en) | 2002-03-06 | 2006-08-29 | Stmicroelectronics, Inc. | Method for providing a redistribution metal layer in an integrated circuit |
US6614091B1 (en) | 2002-03-13 | 2003-09-02 | Motorola, Inc. | Semiconductor device having a wire bond pad and method therefor |
US7692315B2 (en) | 2002-08-30 | 2010-04-06 | Fujitsu Microelectronics Limited | Semiconductor device and method for manufacturing the same |
JP2004095916A (ja) * | 2002-08-30 | 2004-03-25 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JP4528035B2 (ja) * | 2004-06-18 | 2010-08-18 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4674522B2 (ja) * | 2004-11-11 | 2011-04-20 | 株式会社デンソー | 半導体装置 |
WO2008015500A1 (en) * | 2006-08-01 | 2008-02-07 | Freescale Semiconductor, Inc. | Method and apparatus for improvements in chip manufacture and design |
FR2959868A1 (fr) * | 2010-05-06 | 2011-11-11 | St Microelectronics Crolles 2 | Dispositif semi-conducteur a plots de connexion munis d'inserts |
JP2013235127A (ja) * | 2012-05-09 | 2013-11-21 | Seiko Epson Corp | 電気光学装置、電気光学装置の製造方法、及び電子機器 |
US10833119B2 (en) * | 2015-10-26 | 2020-11-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Pad structure for front side illuminated image sensor |
CN107845622B (zh) * | 2017-12-04 | 2022-04-08 | 长鑫存储技术有限公司 | 具有硅穿孔的芯片堆叠体及其制造方法 |
Family Cites Families (12)
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US4789648A (en) * | 1985-10-28 | 1988-12-06 | International Business Machines Corporation | Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias |
JPH04212426A (ja) * | 1990-06-21 | 1992-08-04 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JPH08293523A (ja) * | 1995-02-21 | 1996-11-05 | Seiko Epson Corp | 半導体装置およびその製造方法 |
JPH1041298A (ja) * | 1996-07-23 | 1998-02-13 | Toshiba Corp | 半導体装置及びその製造方法 |
JPH10261624A (ja) * | 1997-03-19 | 1998-09-29 | Nec Corp | エッチング方法及び多層配線構造 |
JP3647631B2 (ja) * | 1997-07-31 | 2005-05-18 | 松下電器産業株式会社 | 半導体装置及びその製造方法 |
JPH11135506A (ja) * | 1997-10-31 | 1999-05-21 | Nec Corp | 半導体装置の製造方法 |
JP3544464B2 (ja) * | 1997-11-26 | 2004-07-21 | 松下電器産業株式会社 | 半導体装置およびその製造方法 |
US6033984A (en) * | 1997-12-23 | 2000-03-07 | Siemens Aktiengesellschaft | Dual damascene with bond pads |
JP3382549B2 (ja) * | 1998-11-02 | 2003-03-04 | キヤノン株式会社 | 半導体装置及びアクティブマトリクス基板 |
JP2000299350A (ja) * | 1999-04-12 | 2000-10-24 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2001196413A (ja) * | 2000-01-12 | 2001-07-19 | Mitsubishi Electric Corp | 半導体装置、該半導体装置の製造方法、cmp装置、及びcmp方法 |
-
2000
- 2000-12-12 GB GB0030319A patent/GB2364170B/en not_active Expired - Fee Related
- 2000-12-15 JP JP2000381501A patent/JP4138232B2/ja not_active Expired - Lifetime
- 2000-12-15 KR KR1020000076794A patent/KR100691051B1/ko active IP Right Grant
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10186541B2 (en) | 2015-08-07 | 2019-01-22 | Samsung Electronics Co., Ltd. | Semiconductor devices |
Also Published As
Publication number | Publication date |
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GB2364170A (en) | 2002-01-16 |
JP4138232B2 (ja) | 2008-08-27 |
KR100691051B1 (ko) | 2007-03-09 |
GB2364170B (en) | 2002-06-12 |
TW477000B (en) | 2002-02-21 |
JP2001298029A (ja) | 2001-10-26 |
GB0030319D0 (en) | 2001-01-24 |
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