JPS63205930A - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法

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Publication number
JPS63205930A
JPS63205930A JP62038500A JP3850087A JPS63205930A JP S63205930 A JPS63205930 A JP S63205930A JP 62038500 A JP62038500 A JP 62038500A JP 3850087 A JP3850087 A JP 3850087A JP S63205930 A JPS63205930 A JP S63205930A
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JP
Japan
Prior art keywords
film
integrated circuit
semiconductor integrated
aluminum
implanted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62038500A
Other languages
English (en)
Inventor
Masami Nishikawa
西川　正身
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP62038500A priority Critical patent/JPS63205930A/ja
Priority to US07/158,763 priority patent/US4857484A/en
Publication of JPS63205930A publication Critical patent/JPS63205930A/ja
Pending legal-status Critical Current

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 （技術分野） 本発明はＩＣやＬＳＩなどの半導体集積回路装置を製造
する方法に関し、特に耐湿性を向上させた半導体集積回
路装置の製造方法に関するものである。
（従来技術） アルミニウム配線をもつ半導体集積回路装置の故障の要
因の１つにアルミニウム配線の腐蝕がある。アルミニウ
ム配線の腐蝕は空気中の水分によって起こる。
そこで半導体集積回路装置の耐湿性を向上させるために
次のような方法がとられている。
（１）パッシベーション膜としてプラズマ窒化膜を用い
る。しかし、プラズマ窒化膜は膜厚の均一性が悪く、ま
た、トランジスタに悪影響を与え、ＭｏＳトランジスタ
のしきい値電圧が変化したり、バイポーラトランジスタ
の増幅率が変化したりする問題がある。
（２）パッケージとしてＤＩＰ　（シュアル・イン・ラ
イン・パッケージ）を用いる。しかし、半導体集積回路
装置が大きくなるとＤＩＰを用いることができず、フラ
ットパッケージを用いなければならなくなる。フラット
パッケージはＤＩＰに比べて耐湿性が悪い。
（３）配線のアルミニウムにシリコンを添加する。
しかし、シリコンを添加すると配線抵抗が増大する。
（目的） 本発明はアルミニウム配線自体に耐湿性をもたせるとと
もに、配線抵抗を増加させない方法を提供することを目
的とするものである。
（構成） 本発明ではアルミニウムのボンディング・バットにシリ
コンのイオン注入を施すことによって。
配線抵抗を上げないで耐湿性を増大させる。
以下、実施例について具体的に説明する。
第１図は一実施例を工程順に示したものである。
（１）同図（Ａ）は半導体集積回路装置の製造プロセス
において、アルミニウム配線工程まで完了した状態であ
る。２はシリコン基板であり、トランジスタその他の素
子が形成されている。シリコン基板２上には層間絶ａ膜
としてＳｉｎ：膜４が形成されており、Ｓｉｎ：膜４に
は配線と接続するためのコンタクト孔が設けられている
。ＳｉＯ２膜４上にはアルミニウム膜が形成され、パタ
ーン化され配線とボンディング・パッド６が形成されて
いる。配線はＳｉＯり膜４のコンタクト孔を経てシリコ
ン基板２のトランジスタなどの素子と接続されている。
（２）同図（Ｂ）に示されるように、配線及びボンディ
ング・パッド６の上方からパッシベーション膜８を形成
する。
（３）同図（Ｃ）に示されるように、ボンディング・パ
ッド６上のパッシベーション膜８をエツチングによって
除去し、ボンディング・パッド６を露出させる。
（４）同図（Ｄ）に示されるように、シリコンのイオン
注入を行なう。イオン注入条件は５０ＫｅＶで５Ｘ１０
”／ｃｍ３程度である。これにより、アルミニウムのボ
ンディング・パッド６の表面にシリコンが注入され、ア
ルミニウムの配線部分にはシリコンは注入されない。
配線やボンディング・パッド６のアルミニウム膜の厚さ
は通常１μｍ程度であり、それに対してイオン注入によ
ってシリコンが注入される深さは５００人程程度ある。
そのため、ボンディング・パッド６の表面だけがシリコ
ン注入された状態となる。
第２図はボンディング・パッド６にワイヤボンディング
を施した状態を表わしている。同図（Ａ）は正面断面図
、同図（Ｂ）は平面図である６１０は金ワイヤであり、
ボンディング・パッド６のうち同図（Ｂ）で斜線を施し
た部分が露出する。ボンディング・パッド６にシリコン
を注入していない場合、何らかの原因で半導体集積回路
装置チップ上に水分が浸透した場合、アルミニウムと水
が反応してＡｌ２（ＯＨ）３が形成される。このＡＱ（
ＯＨ）３は特に高温処理した場合に形成されやすい。ア
ルミニウムがＡＱ（ＯＨ）３に変化すると抵抗が上昇し
、最終的には半導体集積回路装置が不良となる。
アルミニウムのボンディング・パッドにシリコンをイオ
ン注入すると、ボンディング・パッドの表面ではアルミ
ニウムの比率が下がるためＡＱ（ＯＨ）３の生成反応が
生じにくくなる。
（効果） 本発明ではパッシベーション膜にエツチングを施してア
ルミニウムのボンディング・パッドを露出させた後、ボ
ンディング・パッドにシリコンのイオン注入を施すので
、ボンディング・パッドの表面にだけシリコンが注入さ
れる。これによって。
半導体集積回路装置の耐湿性が向上し、かつ、アルミニ
ウムの配線部にはシリコンが注入されず、ボンディング
・パッドでも内部にはシリコンが注入されないので配線
抵抗が増大することもない。
しかも、製造工程としてはイオン注入工程が１工程追加
されるだけである。
【図面の簡単な説明】
第１図（Ａ）ないし同図（Ｄ）は一実施例を工程順に示
す装置の断面図、第２図（Ａ）はボンディング・パッド
にワイヤボンディングを施した状態を示す正面断面図、
同図（Ｂ）は平面図である。 ２・・・・・・シリコン基板、 ４・・・・・・層間絶縁膜。 ６・・・・・・ボンディング・パッド、８・・・・・・
パッシベーション膜。

Claims (1)

    【特許請求の範囲】
  1. （１）金属層の上からパッシベーション膜を形成し、前
    記パッシベーション膜にエッチングを施してボンディン
    グ・パッドを露出させた後、前記ボンディング・パッド
    にシリコンのイオン注入を施す半導体集積回路装置の製
    造方法。
JP62038500A 1987-02-21 1987-02-21 半導体集積回路装置の製造方法 Pending JPS63205930A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62038500A JPS63205930A (ja) 1987-02-21 1987-02-21 半導体集積回路装置の製造方法
US07/158,763 US4857484A (en) 1987-02-21 1988-02-22 Method of making an ion-implanted bonding connection of a semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62038500A JPS63205930A (ja) 1987-02-21 1987-02-21 半導体集積回路装置の製造方法

Publications (1)

Publication Number Publication Date
JPS63205930A true JPS63205930A (ja) 1988-08-25

Family

ID=12526982

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62038500A Pending JPS63205930A (ja) 1987-02-21 1987-02-21 半導体集積回路装置の製造方法

Country Status (2)

Country Link
US (1) US4857484A (ja)
JP (1) JPS63205930A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5455198A (en) * 1992-12-31 1995-10-03 Hyundai Electronics Industries Co., Ltd. Method for fabricating tungsten contact plug

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5541131A (en) * 1991-02-01 1996-07-30 Taiwan Semiconductor Manufacturing Co. Peeling free metal silicide films using ion implantation
JP3603296B2 (ja) * 1997-11-11 2004-12-22 ソニー株式会社 半導体装置の製造方法
DE102022108561A1 (de) 2021-04-13 2022-10-13 Semiconductor Components Industries, Llc Oxidations- und korrosionsschutz in halbleitervorrichtungen und halbleitervorrichtungsanordnungen

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Publication number Priority date Publication date Assignee Title
US3328210A (en) * 1964-10-26 1967-06-27 North American Aviation Inc Method of treating semiconductor device by ionic bombardment
US3562022A (en) * 1967-12-26 1971-02-09 Hughes Aircraft Co Method of doping semiconductor bodies by indirection implantation
US3765970A (en) * 1971-06-24 1973-10-16 Rca Corp Method of making beam leads for semiconductor devices
US3912546A (en) * 1974-12-06 1975-10-14 Hughes Aircraft Co Enhancement mode, Schottky-barrier gate gallium arsenide field effect transistor
JPS561533A (en) * 1979-06-18 1981-01-09 Hitachi Ltd Method of photoetching
US4534105A (en) * 1983-08-10 1985-08-13 Rca Corporation Method for grounding a pellet support pad in an integrated circuit device
JPS6063926A (ja) * 1983-08-31 1985-04-12 Fujitsu Ltd 半導体装置の製造方法
JPS60183739A (ja) * 1984-03-01 1985-09-19 Ricoh Co Ltd 多層配線形成法
US4622576A (en) * 1984-10-22 1986-11-11 National Semiconductor Corporation Conductive non-metallic self-passivating non-corrodable IC bonding pads
JPS61256626A (ja) * 1985-05-08 1986-11-14 Fujitsu Ltd 絶縁膜表面での薄膜選択成長方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5455198A (en) * 1992-12-31 1995-10-03 Hyundai Electronics Industries Co., Ltd. Method for fabricating tungsten contact plug

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