JPS62145844A - 半導体装置の実装構造とその製造方法 - Google Patents

半導体装置の実装構造とその製造方法

Info

Publication number
JPS62145844A
JPS62145844A JP60287412A JP28741285A JPS62145844A JP S62145844 A JPS62145844 A JP S62145844A JP 60287412 A JP60287412 A JP 60287412A JP 28741285 A JP28741285 A JP 28741285A JP S62145844 A JPS62145844 A JP S62145844A
Authority
JP
Japan
Prior art keywords
aluminum
semiconductor device
mounting structure
bonding
aluminum oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60287412A
Other languages
English (en)
Inventor
Hajime Kurihara
一 栗原
Tetsuyoshi Takeshita
竹下　哲義
Satoshi Takenaka
敏 竹中
Hideaki Oka
秀明 岡
Kazumasa Hasegawa
和正 長谷川
Shuichi Matsuo
修一 松尾
Masabumi Kunii
正文 国井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP60287412A priority Critical patent/JPS62145844A/ja
Publication of JPS62145844A publication Critical patent/JPS62145844A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/0569—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554—Coating
    • H01L2224/45565—Single coating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554—Coating
    • H01L2224/45599—Material
    • H01L2224/45686—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の実装構造とその製造方法に関する
。
〔発明の概要〕
本発明は半導体装置のボンディング用アルばニウム線（
以下Ａｊ線と略す、）表面をアルきニウム酸化物で被覆
する実装構造と、該アルミニウム酸化物を、ＡＪ線を水
蒸気雰囲気中又はω℃以上の水Ｑ中で酸化せしめる製造
方法から成り、その目的は低コストで信頼性の高＾半導
体装置の実装構造とその製造方法を提供するものである
。
〔従来の技術〕
従来、主にボンディング線の保護の目的のため、透水性
の小さめエポキシ系樹脂でボンディング線を覆う構造を
採用してｉる、特に、ムｊ線を用いる場合、耐食しやす
いため、透水性の小さいエポキシ系樹脂で覆うことは必
須の条件であった。
しかし、般近、熱転写プリンター用のサーマルヘッドや
密着型イメージセンサなどの用途で半導体菓子を長尺、
大型の興装基板上にワイヤーボンディングで電気的に接
続する半導体装置にお＾で、エポキシ系樹脂でボンディ
ング線を直接覆うｌｌｌ造を用＾ると、半導体素子と実
装基板の熱膨張係数の違＾のため、ボンディング線の断
線が起りやす＜、１２図に示す様に、ボンディング線る
をやわらかいシリコン樹脂冴で覆ｉ１次に、密着性向と
のためにフェノール樹脂５で覆い、最後に耐湿性向上の
ためにエポキシ樹脂で覆う三層の実装置１＃造を有して
Ｌｎｆｃ、２１は実装基板、２２はＩＣ（半導体集積口
ｗ５）等の半導体素子である。
〔発明が解決しようとする間執点及び目的〕このため、
構造が複雑化することや、耐湿性を向上させるため、透
水性の小さｉ固＾エポキシ樹脂を用＾るため、熱収縮（
熱応力）が大きくかかる。すなわち、実装基板と半導体
素子の熱膨張係数の大きく違うもの同志の選択は難しか
った。
〔間一点を解決するための手段〕
本発明はかかる欠点を除去したもので、ボンディング用
人、＃線表面にアルミニウム酸化物を被覆することによ
って、ＡＡ線の耐湿性を向上せしめることによって、エ
ポキシ樹脂の保護モールドを不用とし、さらにｋＡＪＩ
ｉ１１ｉ！表面を水蒸気雰囲気中や０℃以上の水の中に
入れるだけで、耐湿性の高ｉアルミニウム酸化物を安価
で容易に製造方法を提供するものである。
〔実施例１〕 ＷＸ１図に本実施例の半導体装置の実装構造の拡大図を
示す、　１１は実装・、基板、　１２は半導体集積回路
等の半導体素子、　１３はム！線、１４はＡｊ線の表面
被覆膜で、ボンディング後、水蒸気槽中（雰囲気温度８
０〜１５０℃）で５〜３０分半導装置を放置するだけで
、ムｊ線の表面のアルミニウムが酸化し。
０．５〜２μｍ程度の緻密なアルミニウム酸化物層が形
成される。　１５け半導体素子のポンディングパッド、
ｌｌｊ柔かめシリコン樹脂で％実装基板と半導体素子の
熱収縮を十分緩和するため、人！線の断線は皆無である
。　１７は実装基板上の電気配線である。
〔実施例２〕 半導体素子と実装基板をボンディング後、　１０分間以
上（イ）℃以上の水槽の中に浸すことによって、Ａノ線
の表面に緻密なアルミニウム酸化物を同様に形成するこ
とができる。特に、９０’ＣＩｌ上の沸とう水中で効果
が著しかった。また、このとき、水は十分精製したもの
を用＾ることか肝要である。
〔発明の効果〕
本発明を用＾れば安価に信頼性が高＾半導体装置の実装
構造を得ることができる。特に、透水性の小さめ樹脂を
用いることがむずかしく％実装基板と半導体素子の間の
熱収縮による応力がボンディング部にかかる半導体装置
には効果が著しｉ。
又、半導体素子のポンディングパッドにアルきニウムを
主成分とする材料を用いる場合も同時にパッド表面に緻
密子アルミニウム酸化物が形成され。
信頼性がさらに向上する。又半導体素子内部のアルミニ
ウムを主成分とする配線上の保ＭＩ層にビンボールやク
ラックが生じてｉる場合も、アルミニウム配線表面がビ
ンボールやクラックの部分のみ酸化され、アルミニウム
配線の断線を防止するなど副次的効果も有し、信頼性向
上に著しい効果を有してｉる。
【図面の簡単な説明】
第１図は本発明の半導体装置の実装構造の拡大図である
。 第２図は従来の実装構造図である。 １１・・・実装基板 １２−・９半導体素子 １３　、２３・・・ム！ボンディング線１４・・・アル
ミニウム酸化物被覆膜 風・上 出願人　セイコーエッソ〜ン株式会社 ＋尊添装置４嘔ｊ韓遺ＡＪム天目 第１　区 従長ｒ手導体装置に実装本嘴遣匠 第２図

Claims (3)

    【特許請求の範囲】
  1. （１）アルミニウム線のボンデイグを有する半導体装置
    において、該アルミニウム線表面をアルミニウム酸化物
    で被覆したことを特徴とする半導体装置の実装構造。
  2. （２）水蒸気雰囲気中で、前記アルミニウム線表面にア
    ルミニウム酸化物を形成する工程を有することを特徴と
    する半導体装置の実装構造の製造方法。
  3. （３）６０℃以上の水の中で、前記アルミニウム線表面
    にアルミニウム酸化物を形成する工程を有することを特
    徴とする特許請求の範囲第２項記載の半導体装置の実装
    構造の製造方法。
JP60287412A 1985-12-20 1985-12-20 半導体装置の実装構造とその製造方法 Pending JPS62145844A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60287412A JPS62145844A (ja) 1985-12-20 1985-12-20 半導体装置の実装構造とその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60287412A JPS62145844A (ja) 1985-12-20 1985-12-20 半導体装置の実装構造とその製造方法

Publications (1)

Publication Number Publication Date
JPS62145844A true JPS62145844A (ja) 1987-06-29

Family

ID=17716992

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60287412A Pending JPS62145844A (ja) 1985-12-20 1985-12-20 半導体装置の実装構造とその製造方法

Country Status (1)

Country Link
JP (1) JPS62145844A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6630727B1 (en) * 1998-03-03 2003-10-07 Infineon Technologies Ag Modularly expandable multi-layered semiconductor component

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6630727B1 (en) * 1998-03-03 2003-10-07 Infineon Technologies Ag Modularly expandable multi-layered semiconductor component

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