JPS62134255U - - Google Patents

Info

Publication number
JPS62134255U
JPS62134255U JP1986021361U JP2136186U JPS62134255U JP S62134255 U JPS62134255 U JP S62134255U JP 1986021361 U JP1986021361 U JP 1986021361U JP 2136186 U JP2136186 U JP 2136186U JP S62134255 U JPS62134255 U JP S62134255U
Authority
JP
Japan
Prior art keywords
semiconductor circuit
terminals
power supply
lead
mounting member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986021361U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986021361U priority Critical patent/JPS62134255U/ja
Priority to EP86901518A priority patent/EP0214307B1/en
Priority to DE8686901518T priority patent/DE3680265D1/en
Priority to KR1019860700725A priority patent/KR940006585B1/en
Priority to PCT/JP1986/000106 priority patent/WO1986005322A1/en
Publication of JPS62134255U publication Critical patent/JPS62134255U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図及び第２図は本考案による半導体回路装
置の一実施例を示す平面図、第３図は本考案の一
実施例に係る半導体回路素子の略線断面図、第４
図は従来の半導体回路装置の構成例を示す平面図
である。 ２ｇ，２ｘは接地端子、２ｓ，２ｙは電源端子
、３は載置部材、１１は半導体回路素子、１４，
１５は屈曲細条、１６ｇ，１６ｘは接地用リード
、１６ｓは電源用リードである。 1 and 2 are plan views showing one embodiment of a semiconductor circuit device according to the present invention, FIG. 3 is a schematic cross-sectional view of a semiconductor circuit element according to an embodiment of the present invention, and FIG.
The figure is a plan view showing an example of the configuration of a conventional semiconductor circuit device. 2g and 2x are ground terminals, 2s and 2y are power supply terminals, 3 is a mounting member, 11 is a semiconductor circuit element, 14,
15 is a bent strip, 16g and 16x are grounding leads, and 16s is a power supply lead.

Claims (1)

【実用新案登録請求の範囲】 複数の端子を有する半導体回路素子と、導電性
薄板材で形成され上記半導体回路素子が載置され
る載置部材と、上記載置部材の周囲に配設され上
記複数の端子とそれぞれ導電性細線によつて接続
される複数のリード部材とが容器内に収容されて
成る半導体回路装置において、 上記半導体回路素子上に複数の電源端子及び複
数の接地端子を設け、 上記複数のリード部材のうちそれぞれ相隣れる
２本のリード部材を上記容器内でそれぞれ連接さ
せて電源用リード及び接地用リードとなし、 上記複数の電源端子及び上記電源用リード並び
に上記複数の接地端子及び上記接地用リードをそ
れぞれ上記導電性細線により接続して成る半導体
回路装置。[Claims for Utility Model Registration] A semiconductor circuit element having a plurality of terminals, a mounting member formed of a conductive thin plate material on which the semiconductor circuit element is mounted, and a mounting member disposed around the mounting member and described above. A semiconductor circuit device in which a plurality of terminals and a plurality of lead members each connected by a conductive thin wire are housed in a container, wherein a plurality of power supply terminals and a plurality of ground terminals are provided on the semiconductor circuit element, Two adjacent lead members of the plurality of lead members are respectively connected in the container to form a power supply lead and a grounding lead, and the plurality of power supply terminals, the power supply leads and the plurality of grounding A semiconductor circuit device comprising a terminal and the grounding lead connected to each other by the conductive thin wire.
JP1986021361U 1985-02-28 1986-02-17 Pending JPS62134255U (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP1986021361U JPS62134255U (en) 1986-02-17 1986-02-17
EP86901518A EP0214307B1 (en) 1985-02-28 1986-02-28 Semiconducteur circuit device
DE8686901518T DE3680265D1 (en) 1985-02-28 1986-02-28 SEMICONDUCTOR CIRCUIT ARRANGEMENT.
KR1019860700725A KR940006585B1 (en) 1985-02-28 1986-02-28 Semicondocteur circuit device
PCT/JP1986/000106 WO1986005322A1 (en) 1985-02-28 1986-02-28 Semiconducteur circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986021361U JPS62134255U (en) 1986-02-17 1986-02-17

Publications (1)

Publication Number Publication Date
JPS62134255U true JPS62134255U (en) 1987-08-24

Family

ID=30817735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986021361U Pending JPS62134255U (en) 1985-02-28 1986-02-17

Country Status (1)

Country Link
JP (1) JPS62134255U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01295429A (en) * 1988-05-24 1989-11-29 Toshiba Corp Semiconductor integrated circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5571030A (en) * 1978-11-24 1980-05-28 Hitachi Ltd Mounting system for semiconductor device
JPS6018944A (en) * 1983-07-12 1985-01-31 Nec Ic Microcomput Syst Ltd Lead frame for semiconductor integrated circuit device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5571030A (en) * 1978-11-24 1980-05-28 Hitachi Ltd Mounting system for semiconductor device
JPS6018944A (en) * 1983-07-12 1985-01-31 Nec Ic Microcomput Syst Ltd Lead frame for semiconductor integrated circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01295429A (en) * 1988-05-24 1989-11-29 Toshiba Corp Semiconductor integrated circuit

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