JPS6187429A - Generating circuit of repetitive voltage - Google Patents
Generating circuit of repetitive voltageInfo
- Publication number
- JPS6187429A JPS6187429A JP59208791A JP20879184A JPS6187429A JP S6187429 A JPS6187429 A JP S6187429A JP 59208791 A JP59208791 A JP 59208791A JP 20879184 A JP20879184 A JP 20879184A JP S6187429 A JPS6187429 A JP S6187429A
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- JP
- Japan
- Prior art keywords
- voltage
- frequency
- output
- signal
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は基準周波数に同期した繰返し電圧を発生する回
路であり、カーブ・トレーサの如き半導体特性測定装置
において、外部電源周波数（基準周波数）と同相の繰返
し電圧である可変コレクタ電圧を発生する回路に利用で
きる。[Detailed Description of the Invention] [Industrial Application Field] The present invention is a circuit that generates a repetitive voltage synchronized with a reference frequency, and is used in a semiconductor characteristic measuring device such as a curve tracer to generate a repetitive voltage that is synchronized with an external power supply frequency (reference frequency). It can be used in a circuit that generates a variable collector voltage that is a repeating voltage of the same mode.
半導体特性測定装置、特にカーブ・トレーサは、トラン
ジスタやダイオード等の基本的な半導体素子を測定する
のに有効な装置である。従来のカーブ・トレーサは第３
図に示す如き構成となっている。即ち、コレクタ電圧供
給回路１０かもの正弦波電圧を変圧器１２の１次巻線に
供給する。この変圧器１２の２次巻線は複数のタップを
有し、選択整流回路１４が測定レンジに応じてこれらタ
ップの１つを選択し、選択されたタップからの正弦波電
圧を整流する。選択整流回路１４からの整流された電圧
は、リミッタ用抵抗器１６を介して被測定トランジスタ
１８のコレクタに供給する。なお、抵抗器１６の値は測
定レンジに応じて切替える。変圧器１２の２次巻線の下
端は、電流検出用抵抗器２０を介して被測定トランジス
タ１８のエミッタに接続すると共に接地する。まだ、ト
ランジスタ１８のベースには、ステップ状に変化するバ
イアス信号を一バイアス供給回路２２から蒜給する。な
お、第３図では被測定トランジスタ１８がエミッタ接地
形式でカーブ・トレーサに接続されているが、ベース接
地形式又はコレクタ接地形式でもよい。電圧検出回路２
４は被測定、トランジスタ１８のコレクタ及びエミッタ
間の電圧Ｖ。、を検出し、適当に分圧しだ後、増幅器２
６を介して表示器である陰極線管（ＣＲＴ）２８の水平
偏向板に夕電流■。を検出し、増幅器３２を介してＣＲ
Ｔ２８の垂直偏向板に供給する。よって、ＣＲＴ２８に
トランジスタ１８のＶ。Ｅ ＩＣ特性を表示すること
ができる。Semiconductor characteristic measuring devices, particularly curve tracers, are effective devices for measuring basic semiconductor devices such as transistors and diodes. Conventional curve tracer is the third
The configuration is as shown in the figure. That is, the collector voltage supply circuit 10 supplies a sinusoidal voltage to the primary winding of the transformer 12. The secondary winding of this transformer 12 has a plurality of taps, and a selective rectifier circuit 14 selects one of these taps depending on the measurement range and rectifies the sinusoidal voltage from the selected tap. The rectified voltage from the selective rectifier circuit 14 is supplied to the collector of the transistor under test 18 via a limiter resistor 16. Note that the value of the resistor 16 is changed depending on the measurement range. The lower end of the secondary winding of the transformer 12 is connected to the emitter of the transistor to be measured 18 via a current detection resistor 20 and grounded. The base of the transistor 18 is further supplied with a stepwise changing bias signal from a bias supply circuit 22. In FIG. 3, the transistor to be measured 18 is connected to the curve tracer in an emitter-grounded manner, but it may be in a base-grounded type or a collector-grounded type. Voltage detection circuit 2
4 is the voltage V between the collector and emitter of the transistor 18 to be measured. , and after starting to divide the voltage appropriately, amplifier 2
6, evening current ■ is applied to the horizontal deflection plate of a cathode ray tube (CRT) 28, which is a display. is detected and the CR
Supplied to the T28 vertical deflection plate. Therefore, the V of the transistor 18 is applied to the CRT 28. E IC characteristics can be displayed.
ところで、繰返し電圧を発生するコレクタ電圧供給回路
１０は、第４図に示すように従来は構成されていた。即
ち、外部電源である商用電源からの正弦波電圧はスイッ
チ３４を介して電源回路３６及び可変変圧器３８に供給
する。電源回路３６は、種々の安定化された直流電圧を
各回路に供給するだめのものである。また、可変変圧＊
３８は電源電圧を可変して、第３図の変圧器１２の１次
巻線に供給する。よって、変圧器１２の２次巻線からは
外部電源周波数と同相で、振幅が可変変圧器３８で制御
された繰返し正弦波電圧が得られる。By the way, the collector voltage supply circuit 10 that generates a repetitive voltage has conventionally been configured as shown in FIG. That is, a sine wave voltage from a commercial power source, which is an external power source, is supplied to the power supply circuit 36 and the variable transformer 38 via the switch 34. The power supply circuit 36 is for supplying various stabilized DC voltages to each circuit. In addition, variable transformer *
38 varies the power supply voltage and supplies it to the primary winding of the transformer 12 in FIG. Therefore, a repetitive sine wave voltage whose amplitude is controlled by the variable transformer 38 is obtained from the secondary winding of the transformer 12 in phase with the external power supply frequency.
ところで、第４図に示した従来の繰返し電圧発生回路に
は種々の問題点がある。まず、商用電源の波形は完全な
正弦波ではなく、種々の歪を含んでいる。よって、カー
ブ・トレーサにおいて、被測定トランジスタに供給され
る繰返し電圧波形も完全な正弦波でないため、ＣＲＴ２
８に表示される特性曲線の行き（整流された正弦波電圧
の上昇期間）のトレースと戻＃）（整流された正弦波電
圧の下降期間）のトレースとが異なり、正確に被測定ト
ランジスタの特性が測定できない。この現象を便宜的に
表示歪と呼ぶ。また、商用電源電圧の振幅は正確ではな
く、ある一定の幅で変化するだめ、被測定トランジスタ
に供給される繰返し電圧の振幅も商用電源に応じて変化
し、正確な特性測定が困難になる。更に、第３図のカー
ブ・トレーサにデジタル・ストレージ回路を適用した場
合、即ち、電源検出回路２４及び増幅器２６の間、並び
に電源検出回路３０及び増幅器３２の間にＡ／Ｄ変換器
、デジタル・メモリ及びＤ／Ａ変換器の組合せを接続し
た場合、Ａ／Ｄ変換器のクロック周波数が商用電源周波
数と独立なので、Ａ／Ｄ変換器の出力に電源のリップル
の影響が現われ、測定精度が低下する。By the way, the conventional repetitive voltage generating circuit shown in FIG. 4 has various problems. First, the waveform of commercial power is not a perfect sine wave, but contains various distortions. Therefore, in the curve tracer, the repetitive voltage waveform supplied to the transistor under test is also not a perfect sine wave, so the CRT2
The forward (rise period of the rectified sine wave voltage) trace of the characteristic curve shown in 8 is different from the return trace (the fall period of the rectified sine wave voltage), which shows the characteristics of the transistor under test accurately. cannot be measured. This phenomenon is conveniently called display distortion. Further, since the amplitude of the commercial power supply voltage is not accurate and varies within a certain range, the amplitude of the repetitive voltage supplied to the transistor under test also changes depending on the commercial power supply, making accurate characteristic measurement difficult. Furthermore, when a digital storage circuit is applied to the curve tracer of FIG. When a combination of memory and D/A converter is connected, the clock frequency of the A/D converter is independent of the commercial power supply frequency, so the effect of power supply ripple appears on the A/D converter output, reducing measurement accuracy. do.
仮え、Ａ／Ｄ変換器のクロック周波数を商用電源周波数
に同期させるには、専用の位相制御回路が必要となり、
カーブ・トレーサが高価となる。Hypothetically, in order to synchronize the clock frequency of the A/D converter with the commercial power supply frequency, a dedicated phase control circuit is required.
Curve tracers are expensive.
本発明は可変周波数信号発生器５０と、この可変周波数
信号発生器の出力信号を分周して複数の分周出力信号を
発生する分周器５２と、この分周器の所定の分周出力信
号の位相と電源周波数信号である基準周波数信号の位相
とを比較して、可変周波数信号発生器の発振周波数を制
御する位相比較器４８と、分周器の分周出力信号に応じ
て入力電圧を正弦波等の所望波形に変換するため、ゲー
ト回路５４〜６０．アナログ・マルチプレクサ６２及び
１０６、複数の抵抗器６４〜７８及び積分器８０〜８２
で構成された変換手段と、この変換手段の出力電圧に応
じた電圧と基準電圧ＶＲＥＦとを比較して変換手段の入
力電圧を発生する電圧比較器とを具えている。The present invention includes a variable frequency signal generator 50, a frequency divider 52 that divides the output signal of the variable frequency signal generator to generate a plurality of divided output signals, and a predetermined divided output signal of the frequency divider. A phase comparator 48 controls the oscillation frequency of the variable frequency signal generator by comparing the phase of the signal with the phase of a reference frequency signal which is a power supply frequency signal, and a phase comparator 48 controls the oscillation frequency of the variable frequency signal generator. In order to convert the signal into a desired waveform such as a sine wave, gate circuits 54 to 60 . Analog multiplexers 62 and 106, multiple resistors 64-78 and integrators 80-82
and a voltage comparator that compares a voltage corresponding to the output voltage of the converting means with a reference voltage VREF to generate an input voltage of the converting means.
本発明によれば、可変周波数信号発生器、分周器及び位
相比較器により位相ロック・ループを形成しており、分
周器の複数の分周出力信号は電源周波数に同期している
。これら分周出力信号に応じて変換手段により正弦波等
の所望波形の電圧を発生シティるので、被測定トランジ
スタに供給すれる正弦波電圧の歪は非常に少なく上述の
表示歪の問題が生じない。壕だ電源電圧及び周波数の変
動にかかわらず、電圧比較器により変換手段が発生する
正弦波繰返し電圧の振幅を基準電圧に応じた一定電圧に
保っているので、被測定トランジスタの特性を正確に測
定できる。更に可変周波数信号発生器及び分周器の出力
信号は電源周波数に同期しており、正弦波繰返し電圧を
発生する変換手段以外に、他の種々の回路、例えばＡ／
Ｄ変換器のクロック信号にも兼用できる。According to the present invention, a variable frequency signal generator, a frequency divider, and a phase comparator form a phase-locked loop, and the plurality of divided output signals of the frequency divider are synchronized with the power supply frequency. Since a voltage with a desired waveform such as a sine wave is generated by the conversion means according to these frequency-divided output signals, the distortion of the sine wave voltage supplied to the transistor under test is extremely small, and the above-mentioned display distortion problem does not occur. . Regardless of fluctuations in power supply voltage and frequency, the voltage comparator keeps the amplitude of the sine wave repetitive voltage generated by the conversion means at a constant voltage according to the reference voltage, allowing accurate measurement of the characteristics of the transistor under test. can. Furthermore, the output signals of the variable frequency signal generator and frequency divider are synchronized with the power supply frequency, and in addition to the conversion means for generating the sinusoidal repetitive voltage, various other circuits such as A/
It can also be used as a clock signal for the D converter.
以下、添付図を参照して本発明の好適な実施例を説明す
る。なお、この実施例では所望波形が正弦波である。第
１図は本発明の繰返し電圧発生回路を含んだカーブ・ト
レーサの一部を示すブロック図である。外部の商用電源
からの交流電圧は電源スィッチ３４を介して電源回路３
６内の変圧器４０の１次巻線に供給する。変圧器４０の
複数の２次巻線を電源回路３６内の直流電圧安定化回路
（図示せず）に接続して、各回路用の直流電圧を発生さ
せる。変圧器４０の最下端の２次巻線における接地に対
する交流電圧を抵抗器４２及び４４により分圧する。電
圧比較器４６はこの分圧された交流電圧と接地電圧とを
比較し、電源電圧が接地電圧と交差する毎にそのレベル
が反転するパルス信号ｆ、を発生する。このパルス信号
ｆＬは電源電圧と周波数及び位相が等しい基準信号であ
ることに注意されたい。Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. Note that in this embodiment, the desired waveform is a sine wave. FIG. 1 is a block diagram showing a portion of a curve tracer including a repetitive voltage generating circuit according to the present invention. AC voltage from an external commercial power supply is supplied to the power supply circuit 3 via the power switch 34.
6 to the primary winding of transformer 40. The plurality of secondary windings of transformer 40 are connected to a DC voltage stabilization circuit (not shown) in power supply circuit 36 to generate DC voltage for each circuit. The alternating current voltage with respect to ground in the lowermost secondary winding of transformer 40 is divided by resistors 42 and 44 . The voltage comparator 46 compares this divided AC voltage with the ground voltage, and generates a pulse signal f whose level is inverted every time the power supply voltage crosses the ground voltage. It should be noted that this pulse signal fL is a reference signal having the same frequency and phase as the power supply voltage.
可変周波数信号発生器（ＶＣＯ）５０の発振周波数は・
２ルス信号ｆＬの２” （ｒｒ ：正の整数）であり、
例えば４０９６倍であシ、その出力信号、ｃ ４０９６
ｆ、）を分周器５２であるカウンタのクロック端子に
供給する。分周器５２はＶＣＯ５０の出力信号を分周し
、周波数がパルス信号ｆＬの１６倍の信号１６Ｆ、８倍
の信号「、４倍の信号賃、２倍の信号汀及び等しい信号
ｆを発生する。なお、１６ｆ、 ８ｆ。The oscillation frequency of the variable frequency signal generator (VCO) 50 is
2'' (rr: positive integer) of the 2 pulse signal fL,
For example, if it is 4096 times the output signal, c 4096
f, ) is supplied to the clock terminal of a counter, which is a frequency divider 52. The frequency divider 52 divides the output signal of the VCO 50 and generates a signal 16F whose frequency is 16 times that of the pulse signal fL, a signal 16F whose frequency is 8 times that of the pulse signal fL, a signal frequency which is 4 times the frequency, a signal level which is twice the frequency, and a signal f that is equal to the pulse signal fL. .In addition, 16f and 8f.
４ｆ及び２ｆの横線は入力信号に対し、位相反転された
ものであることを示す。位相比較器４８はパルス信号ｆ
Ｌと分周器５２からの出力パルス信号ｆとの位相を比較
し、パルス信号ｆＬとｆとの位相が等しくなるように、
ＶＣＯ５０の発振周波数を制御する。よって、位相比較
器４８、ＶＣＯ５０及び分周器５２は位相ロック・ルー
プを形成Ｌ、分周器５２の各出力パルスは交流電源に同
期する。The horizontal lines 4f and 2f indicate that the phase of the input signal is inverted. The phase comparator 48 receives the pulse signal f
The phases of L and the output pulse signal f from the frequency divider 52 are compared, and so that the phases of the pulse signals fL and f are equal,
Controls the oscillation frequency of the VCO 50. Thus, phase comparator 48, VCO 50, and frequency divider 52 form a phase-locked loop L, and each output pulse of frequency divider 52 is synchronized to the AC power source.
分周器５２の出力パルスをコード化する符号化回路は４
個の排他的オア・ゲート（ＸＯＲ）５４〜６゜を含んで
おり、Ｘ０Ｒ５４はパルス信号１６ｆ及びｎを受け、Ｘ
０Ｒ５６はパルス信号ｌ１及び７了を受け、Ｘ０Ｒ５８
はパルス信号４ｆ及び２ｆを受け、Ｘ０Ｒ６０はパルス
信号２ｆ及びｆを受ける。よって、Ｘ０Ｒ６０の出力パ
ルス信号Ｓはパルス信号ｆ即ちｆ、よりも位相が９０度
遅れ、Ｘ０Ｒ５４〜５８の出力パルス信号Ａ−Ｃはパル
ス信号Ｓの９０度（４分の１周期）毎にｒｏ ００Ｊ〜
ｒｌｌｌＪにまたｒｌ １１Ｊ〜ｒｏ ００Ｊに変化す
る３ピツトのデジタル信号となる。これら信号の位相関
係を第２図に示す。There are four encoding circuits that encode the output pulses of the frequency divider 52.
Exclusive OR gates (XOR) 54-6° are included, with X0R54 receiving pulse signals 16f and n;
0R56 receives pulse signals l1 and 7, and X0R58
receives pulse signals 4f and 2f, and X0R60 receives pulse signals 2f and f. Therefore, the output pulse signal S of X0R60 is delayed by 90 degrees in phase than the pulse signal f, that is, f, and the output pulse signals A-C of 00J～
It becomes a 3-pit digital signal that changes to rlllJ and rl 11J to ro 00J. The phase relationship of these signals is shown in FIG.
第１選択手段であるアナログ・マルチプレクサ６２はＸ
０Ｒ５４〜５８からのデジタル信号Ａ−Ｃにより、入力
端子■を出力端子０〜７の１つに選択的に接続する。即
ち、選択端子Ａ−Ｃの信号がｒｏｏｏＪのとき出力端子
Ｏを選択し、「００１」のとき出力端子１を選択し、ｒ
ｏ ｌ ＯＪのとき出力端子２を選択し、以下同様にｒ
ｏｌｌＪ、 ｒｌｏｏＪ、 ｒｌｏｌＪ。The analog multiplexer 62, which is the first selection means,
Digital signals A-C from 0R54-58 selectively connect input terminal (2) to one of output terminals 0-7. That is, when the signal at selection terminals A-C is roooJ, output terminal O is selected, when it is "001", output terminal 1 is selected, and r
o l Select output terminal 2 when OJ, and then select r
ollJ, rlooJ, rlolJ.
ｒｌ １０Ｊ及びｒｌ １１Ｊのとき夫々出力端子３，
４゜５．６及び７を選択する。マルチプレクサ６２の出
力端子Ｏ〜７を夫々抵抗器６４〜７８の一端に接続し、
これら抵抗器の他端を積分器の入力端に接続する。この
積分器は、非反転入力端が接地された演算増幅器８０、
並びにこの演算増幅器の反転入力端及び出力端間に接続
されたコンデンサ８２により構成する。よって、選択さ
れた抵抗器６４〜７８の１つが入力抵抗器であるミラー
積分器となる。なお、これら抵抗器６４〜７８の値は例
えば、夫々１５．ＯＫΩ、１６．９にΩ、１９．ＩＫΩ
、２３．７にΩ。When rl 10J and rl 11J, output terminal 3,
4° Select 5.6 and 7. The output terminals O to 7 of the multiplexer 62 are connected to one ends of the resistors 64 to 78, respectively,
The other ends of these resistors are connected to the input end of the integrator. This integrator includes an operational amplifier 80 whose non-inverting input terminal is grounded;
It also includes a capacitor 82 connected between the inverting input terminal and the output terminal of this operational amplifier. Therefore, one of the selected resistors 64-78 becomes a Miller integrator as the input resistor. Note that the values of these resistors 64 to 78 are, for example, 15. OKΩ, 16.9Ω, 19. IKΩ
, 23.7Ω.
３１．６にΩ、５１．ＩＫΩ及び１５４にΩであり、コ
ンデンサ８２の値は例えば０．１μＦである。Ω at 31.6, 51. IKΩ and 154Ω, and the value of the capacitor 82 is, for example, 0.1 μF.
積分器の出力信号Ｑをピーク値検出器を介して電圧比較
器に供給する。このピーク検出器はダイオード８６、コ
ンデンサ８８、抵抗器９０及び９２により構成する。電
圧比較器８４は、積分器の出力信号Ｑのピーク値と基準
電圧ｖＲ１，とを比較し、それらの差である出力電圧は
抵抗器９４及び９６により分圧されて、反転増幅器９８
及び非反転増幅器１００に供給される。なお、反転増幅
８３９８の入力抵抗器１０２及び帰還抵抗器１０４の値
は等（−い。増幅器９８及び１００の出力電圧は第２選
択手段である電子スイッチ１０６を介してマルチプレク
サ６２０入力端子■に供給する。まだ、電子スイ、・チ
１０６をパルス信号Ｓによシ制御する。これら回路素子
５４〜８２及び１０６は変換手段を構成する。The output signal Q of the integrator is fed to a voltage comparator via a peak value detector. This peak detector consists of a diode 86, a capacitor 88, and resistors 90 and 92. The voltage comparator 84 compares the peak value of the output signal Q of the integrator with the reference voltage vR1, and the output voltage that is the difference between them is divided by the resistors 94 and 96, and then sent to the inverting amplifier 98.
and is supplied to the non-inverting amplifier 100. Note that the values of the input resistor 102 and the feedback resistor 104 of the inverting amplifier 8398 are equal (-).The output voltages of the amplifiers 98 and 100 are supplied to the input terminal 2 of the multiplexer 620 via the electronic switch 106, which is the second selection means. Still, the electronic switch 106 is controlled by the pulse signal S. These circuit elements 54 to 82 and 106 constitute conversion means.
よって、第２図に示す如く、時点Ｔｏ” Ｔ＋の４分の
１周期は、スイッチ１０６により非反転増幅器ｌＯＯの
出力信号がマルチプレクサ６２０入力端子Ｉに供給され
る。まだ、パルス信号Ａ−Ｃにより、この４分の１周期
を８等分して抵抗器６４〜７８を順次選択するので、積
分器の出力信号Ｑは正弦波の４分の１周期となる。次に
時点Ｔ１〜Ｔ２の期間は、反転増幅器９８の出力電圧が
マルチプレクサ６２の入力端子■に供給され、またこの
期間を８等分して抵抗器７８〜６４を順次選択する。Therefore, as shown in FIG. 2, during a quarter period of the time To''T+, the output signal of the non-inverting amplifier lOO is supplied to the input terminal I of the multiplexer 620 by the switch 106. , this 1/4 period is divided into 8 equal parts and the resistors 64 to 78 are sequentially selected, so the output signal Q of the integrator becomes 1/4 period of the sine wave.Next, the period from time T1 to T2 The output voltage of the inverting amplifier 98 is supplied to the input terminal (2) of the multiplexer 62, and this period is divided into eight equal parts to sequentially select the resistors 78-64.
以下、同様な動作により積分器の出力信号Ｑは電源周波
数と同相な繰返し正弦波電圧になる。なお、ピーク検出
器８６〜９２と電圧比較器８４とにより、積分器の入力
電圧を制御してこの正弦波電圧Ｑの振幅を一定に保持し
ているので、外部商用電源の周波数及び振幅の変動に正
弦波電圧Ｑの振幅は影響されない。Thereafter, by similar operation, the output signal Q of the integrator becomes a repetitive sine wave voltage in phase with the power supply frequency. Note that since the input voltage of the integrator is controlled by the peak detectors 86 to 92 and the voltage comparator 84 to keep the amplitude of this sine wave voltage Q constant, fluctuations in the frequency and amplitude of the external commercial power supply are avoided. The amplitude of the sinusoidal voltage Q is not affected.
積分器の出力電圧Ｑは、電子スイッチ１０８及び可変増
幅器（高調波歪を除去するローパス・フィルタを含んで
いる）１１０を介して変圧器１２の１次巻線に供給する
。この変圧器１２の２次巻線の後段の回路は第３図の回
路と同じでもよい。The integrator output voltage Q is applied to the primary winding of the transformer 12 via an electronic switch 108 and a variable amplifier 110 (including a low-pass filter to remove harmonic distortion). The circuit after the secondary winding of this transformer 12 may be the same as the circuit shown in FIG.
なお、第１図の回路では、位相比較器４８の出力電圧を
抵抗器１１６〜１２０により分圧した基準電圧と比較器
１１２及び１１４により比較している。即ち、比較器１
１２は位相比較器４８の出力電圧が所定上限電圧よりも
低いか否かを判断し、比較器１１４は位相比較器４８の
出力電圧が所定下限電圧よりも高いか否かを判断してい
る。そして、位相比較器４８の出力電圧が所定下限値以
上でかつ所定上限値以下の場合にスイッチ１０８が増幅
器８０を選択し、それ以外の場合にスイッチ１０８が接
地を選択する。よって、変換手段の発生する正弦波電圧
Ｑの位相が、外部電源の位相と所定値以上界なった場合
、この正弦波電圧Ｑを後段に供給するのを阻止して、精
度の下った測定を行なわないようにする。In the circuit shown in FIG. 1, comparators 112 and 114 compare the output voltage of phase comparator 48 with a reference voltage divided by resistors 116 to 120. That is, comparator 1
12 determines whether the output voltage of the phase comparator 48 is lower than a predetermined upper limit voltage, and the comparator 114 determines whether the output voltage of the phase comparator 48 is higher than a predetermined lower limit voltage. Then, when the output voltage of the phase comparator 48 is greater than or equal to a predetermined lower limit value and less than or equal to a predetermined upper limit value, the switch 108 selects the amplifier 80, and in other cases, the switch 108 selects grounding. Therefore, if the phase of the sine wave voltage Q generated by the conversion means differs from the phase of the external power supply by more than a predetermined value, this sine wave voltage Q is prevented from being supplied to the subsequent stage, resulting in a measurement with reduced accuracy. Try not to do it.
上述は本発明の好適な実施例について説明したが、本発
明の要旨を逸脱することなく種々の変更及び変形が可能
である。例えば、電圧比較器８４の前段にはピーク値検
出器以外に平均値検出器、実効値検出器等も利用できる
。また、電圧比較器８４０反転出力信号及び非反転出力
信号を直接スイッチ１０６に供給してもよい。更に、変
換手段の抵抗器の数を更に増やすと共に、符号化回路５
４〜６０及びマルチプレクサ６２を変更して、正弦波電
圧Ｑを発生するときの傾きを一層細分化してもよい。ま
た、抵抗器６４〜７８の値及び数を変更さすることによ
り三角波等の種々の波形も発生できる。Although the preferred embodiments of the present invention have been described above, various changes and modifications can be made without departing from the spirit of the invention. For example, in addition to the peak value detector, an average value detector, an effective value detector, etc. can also be used before the voltage comparator 84. Alternatively, the voltage comparator 840 inverted and non-inverted output signals may be provided directly to the switch 106. Furthermore, the number of resistors in the conversion means is further increased, and the encoding circuit 5
4 to 60 and the multiplexer 62 may be changed to further divide the slope when generating the sinusoidal voltage Q. Further, by changing the values and numbers of the resistors 64 to 78, various waveforms such as triangular waves can be generated.
上述の如く本発明によれば、外部電源の波形に影響され
ない歪の少ない繰返し正弦波電圧を所定振幅でかつ外部
電源と同相で発生できる。よって、カーブ・トレーサに
利用した場合、表示歪がなく、電源リップルに影響され
ず、正確な測定が可能となる。As described above, according to the present invention, it is possible to generate a repetitive sine wave voltage with a predetermined amplitude and in phase with the external power source, which is not affected by the waveform of the external power source and has little distortion. Therefore, when used as a curve tracer, there is no display distortion, it is not affected by power supply ripple, and accurate measurements can be made.
第１図は本発明の好適な一実施例のブロック図、第２図
は第１図の動作を説明する波形図、第３図は繰返し電圧
発生回路を含むカーブ・トレーサのブロック図、第４図
は従来の繰返し電圧発生回路のブロック図である。
図において、４８は位相比較器、５０は可変周波数信号
発生器、５２は分周器、５４〜８ｏ及び１０６は変換手
段、８４は電圧比較器である。FIG. 1 is a block diagram of a preferred embodiment of the present invention, FIG. 2 is a waveform diagram explaining the operation of FIG. 1, FIG. 3 is a block diagram of a curve tracer including a repetitive voltage generation circuit, and FIG. The figure is a block diagram of a conventional repetitive voltage generation circuit. In the figure, 48 is a phase comparator, 50 is a variable frequency signal generator, 52 is a frequency divider, 54 to 8o and 106 are conversion means, and 84 is a voltage comparator.
Claims (1)
力信号を分周して複数の分周出力信号を発生する分周器
と、該分周器の所定の分周出力信号の位相と基準周波数
信号の位相とを比較して、上記可変周波数信号発生器の
発振周波数を制御する位相比較器と、上記分周器の分周
出力信号に応じて入力電圧を所望波形に変換する変換手
段と、該変換出段の出力電圧に応じた電圧と基準電圧と
を比較して、上記変換手段の入力電圧を発生する電圧比
較器とを具え、上記変換手段から上記基準周波数信号に
同期した繰返し電圧を得ることを特徴とする繰返し電圧
発生回路。a variable frequency signal generator; a frequency divider that divides the output signal of the variable frequency signal generator to generate a plurality of divided output signals; and a phase and reference of a predetermined divided output signal of the frequency divider. a phase comparator for controlling the oscillation frequency of the variable frequency signal generator by comparing the phase of the frequency signal; and a conversion means for converting the input voltage into a desired waveform in accordance with the frequency-divided output signal of the frequency divider. , a voltage comparator that compares a voltage corresponding to the output voltage of the converting stage with a reference voltage to generate an input voltage of the converting means, and a repetitive voltage synchronized with the reference frequency signal from the converting means. A repetitive voltage generating circuit characterized in that:
Priority Applications (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59208791A JPS6187429A (en) | 1984-10-04 | 1984-10-04 | Generating circuit of repetitive voltage |
| NL8502385A NL8502385A (en) | 1984-10-04 | 1985-08-30 | DEVICE FOR MEASURING THE CHARACTERISTICS OF ELECTRONIC DEVICES. |
| GB08522462A GB2165363B (en) | 1984-10-04 | 1985-09-11 | Waveform generator and apparatus for measuring characteristics of electronic devices |
| DE19853533636 DE3533636C2 (en) | 1984-10-04 | 1985-09-20 | Device for measuring the characteristic data of electronic components |
| US06/780,957 US4727318A (en) | 1984-10-04 | 1985-09-27 | Apparatus for measuring characteristics of electronic devices |
| CA000491897A CA1242813A (en) | 1984-10-04 | 1985-09-30 | Apparatus for measuring characteristics of electronic devices |
| FR8514776A FR2571501B1 (en) | 1984-10-04 | 1985-10-04 | APPARATUS FOR MEASURING THE CHARACTERISTICS OF ELECTRONIC DEVICES |
| US07/074,910 US4782290A (en) | 1984-10-04 | 1987-07-17 | Apparatus for measuring characteristics or electronic devices |
| CA000547089A CA1248600A (en) | 1984-10-04 | 1987-09-16 | Sine-wave generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59208791A JPS6187429A (en) | 1984-10-04 | 1984-10-04 | Generating circuit of repetitive voltage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6187429A true JPS6187429A (en) | 1986-05-02 |
| JPH0349215B2 JPH0349215B2 (en) | 1991-07-26 |
Family
ID=16562170
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59208791A Granted JPS6187429A (en) | 1984-10-04 | 1984-10-04 | Generating circuit of repetitive voltage |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6187429A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2619633A1 (en) * | 1987-08-18 | 1989-02-24 | Sony Tektronix Corp | APPARATUS FOR MEASURING THE CHARACTERISTICS OF ELECTRONIC DEVICES |
-
1984
- 1984-10-04 JP JP59208791A patent/JPS6187429A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2619633A1 (en) * | 1987-08-18 | 1989-02-24 | Sony Tektronix Corp | APPARATUS FOR MEASURING THE CHARACTERISTICS OF ELECTRONIC DEVICES |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0349215B2 (en) | 1991-07-26 |
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