JPS6151947A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6151947A JPS6151947A JP17608184A JP17608184A JPS6151947A JP S6151947 A JPS6151947 A JP S6151947A JP 17608184 A JP17608184 A JP 17608184A JP 17608184 A JP17608184 A JP 17608184A JP S6151947 A JPS6151947 A JP S6151947A
- Authority
- JP
- Japan
- Prior art keywords
- insulator
- projection
- heat dissipating
- insulating substrate
- dielectric strength
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この分明は、半導体素子および放熱フィン等が装着さハ
る絶縁基板を有する半導体装置において、前記絶縁基板
の絶縁体の形状を改良することにより絶縁耐力の向上と
組立作業の面木化を図った半導体装置に関するものであ
る。Detailed Description of the Invention [Technical Field of the Invention] The present invention provides that, in a semiconductor device having an insulating substrate on which a semiconductor element, a heat dissipation fin, etc. are attached, insulation can be improved by improving the shape of the insulator of the insulating substrate. This invention relates to a semiconductor device that has improved durability and simplified assembly work.
第1図(a)、 (b)は従来の半導体装置の絶縁基
板を示す平面図および断面図である。第1図において、
1は絶縁体、2m、24)は前記絶縁体10両面に半導
体素子や放熱フィン等tはんだ等のろう材でろう付けで
きるようメッキを施したメタライズパターンである。こ
れにより絶縁基板が形成される。FIGS. 1(a) and 1(b) are a plan view and a sectional view showing an insulating substrate of a conventional semiconductor device. In Figure 1,
1 is an insulator, 2m and 24) are metallized patterns plated on both sides of the insulator 10 so that semiconductor elements, heat dissipation fins, etc. can be brazed with a brazing material such as T-solder. This forms an insulating substrate.
上記絶縁基板は一般に平板状構造をなしており、その形
状はろう付けされる半導体素子や放熱フィン等に合わせ
種々の形状がある。これらの絶縁基板の絶縁耐力はメタ
ライズパターン2&、2b間の沿面距*(A−B)によ
り決まることが一般的であるC(C−D)の絶縁耐力>
(A−B)の絶縁耐力の場合〕。The above-mentioned insulating substrate generally has a flat plate-like structure, and there are various shapes depending on semiconductor elements to be brazed, heat dissipation fins, etc. The dielectric strength of these insulating substrates is generally determined by the creepage distance * (A-B) between the metallized patterns 2 & 2b.Dielectric strength of C (C-D)>
In the case of dielectric strength of (A-B)].
絶縁耐力を高めるためには沿面距離を長くすれば効果が
あるか、半導体素子や放熱フィン等の特性、形状に種々
の制約かあり、沿面距離を長(できない場合が多い。ま
た、放熱フィンへろう付けする場合、絶縁基板が平板状
構造であるため、そのままでは位置決めが困離であり、
位置決め治具等を必要としていた。Is it effective to increase the creepage distance in order to increase the dielectric strength? There are various restrictions on the characteristics and shapes of semiconductor elements and heat radiation fins, etc., and it is often impossible to increase the creepage distance. When brazing, the insulating board has a flat structure, so it is difficult to position it as it is.
A positioning jig, etc. was required.
この発明は、これらの欠点’!1’解決するためKなさ
れたもので、絶縁体周縁部に凸部を設けて絶縁耐カン向
上せしめたものである。以下この発明の実施例について
説明する。This invention overcomes these drawbacks! In order to solve the problem of 1', a convex portion is provided on the peripheral edge of the insulator to improve the insulation resistance. Examples of the present invention will be described below.
第2図(a)、(b)はこの発明の一実施例を示す絶縁
基板の平面図および断面図であり、1および2m、2b
は第1図と同じものである。3は前記絶縁体10両面の
周縁部に設けた凸部である。FIGS. 2(a) and 2(b) are a plan view and a cross-sectional view of an insulating substrate showing an embodiment of the present invention, and 1 and 2m, 2b
is the same as in Figure 1. 3 is a convex portion provided on the peripheral edge portions of both sides of the insulator 10.
このように凸部3を形成した形状にすることによりメタ
ライズパターン2a、2b間の沿面距離(A’−B’)
は従来の絶縁基板に比し長(なることは明らかであり、
また、凸部3が上、下方向に形成されているため、外形
寸法を太き(せずK、従来以上の絶縁耐力を有すること
ができろ。By forming the convex portion 3 in this way, the creepage distance (A'-B') between the metallized patterns 2a and 2b can be increased.
is longer than conventional insulating substrates (it is clear that
In addition, since the convex portions 3 are formed upwardly and downwardly, the external dimensions are thicker and the dielectric strength is higher than that of the conventional structure.
さらに、この絶M&基板を放熱フィンへろう付げする場
合、第3図に示すようVC放熱フィン4にあらかじめ突
部3,3間I/c欧合する大きさの凸部5を設げておけ
ば、絶縁基板の位置決めyf:簡単に精度よく行うこと
かできる。Furthermore, when brazing this M& board to the radiation fin, as shown in FIG. If you do this, you can easily and accurately position the insulating substrate.
第4図(a)〜(c)は絶縁体1に形成する凸部の形状
例を示す断面図で、第4図(a)は絶縁体1の一方の面
の端部周縁に凸部3を形成した例であり、第4図Cb)
は同じく両面の端部周縁に凸部3ft形成した例であり
、さらに第4図(C)は第2図℃説明した凸部3を絶縁
体1の一方の面に形成してそれぞれ絶縁基板を形成した
例である。FIGS. 4(a) to 4(c) are cross-sectional views showing examples of shapes of convex portions formed on the insulator 1, and FIG. This is an example of forming a
4(C) is an example in which a 3-ft convex portion is formed on the edge of both sides, and in addition, FIG. 4(C) shows an example in which the convex portion 3 described in FIG. This is an example of the formation.
なお、上記の絶縁基板の使用に際しては、半導体素子、
放熱フィン等の加工、9性、形状あるいは組立作業上の
制約がある場合に上記形状の適宜なものを選択すればよ
い。In addition, when using the above insulating substrate, semiconductor elements,
If there are restrictions on the processing, nature, shape, or assembly work of the radiation fins, an appropriate one of the above shapes may be selected.
以上説明したよう和、この分明は、絶縁体の少なくとも
一方の面の周縁部分に絶縁体の両面のメタライズパター
ン間の沿面距離を長(するための凸部を形成して絶縁基
板を形成したので、従来の絶縁基板とほぼ同じ外形寸法
でありなから、従来以上の絶縁耐力tもだせることかで
きるはかりでなく、この凸部を位置決めに使用すること
により半導体装置の組立作業を簡素化できろ利点が得ら
れるものである。As explained above, this understanding is that an insulating substrate is formed by forming a protrusion on the peripheral edge of at least one side of the insulator to increase the creepage distance between the metallized patterns on both sides of the insulator. Since it has almost the same external dimensions as a conventional insulating substrate, it is possible to obtain a dielectric strength t higher than that of the conventional scale, and by using this protrusion for positioning, it is possible to simplify the assembly work of semiconductor devices. There are advantages to be gained.
第1図(a)、 (b)は従来の絶縁基板の平面図お
よび171線の断面図、第2図(a)、 (b)はこ
の発明の一実施例を示す絶縁基板の平面図および江−■
線の断面図、第3図はこの分明の使用態様を示すもので
、絶縁基体を放熱フィンへろう付けした断面図、第4図
<&)〜<c>はこの発明による絶縁基板の形状例をそ
れぞれ示す断面図である。
図中、1は絶縁体、2m、2bはメタライズパターン、
3は凸部である。
なお、図中の同一符号は同一または相当部分l示す。
代理人 大巻 増雄 (外2名)
第1図FIGS. 1(a) and (b) are a plan view and a sectional view taken along line 171 of a conventional insulating substrate, and FIGS. 2(a) and (b) are a plan view and a sectional view of an insulating substrate showing an embodiment of the present invention. Jiang-■
A cross-sectional view of the line, FIG. 3, shows how this understanding is used. A cross-sectional view of the insulating substrate being brazed to the radiation fin, and FIG. 4 <&) to <c> show examples of the shape of the insulating substrate according to the invention FIG. In the figure, 1 is an insulator, 2m, 2b is a metallized pattern,
3 is a convex portion. Note that the same reference numerals in the figures indicate the same or corresponding parts. Agent Masuo Ohmaki (2 others) Figure 1
Claims (1)
付けされるメタライズパターンが施された絶縁基板を有
する半導体装置において、前記絶縁体の少なくとも一方
の面の周縁部に前記絶縁体の両面のメタライズパターン
間の沿面距離を長くするための凸部を設けたことを特徴
とする半導体装置。In a semiconductor device having an insulating substrate having a metallized pattern on both sides of an insulator to which a semiconductor element, a heat dissipation fin, etc. are brazed, the metallized pattern on both sides of the insulator is provided on a peripheral edge of at least one side of the insulator. A semiconductor device characterized in that a convex portion is provided for increasing the creepage distance between the two.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17608184A JPS6151947A (en) | 1984-08-22 | 1984-08-22 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17608184A JPS6151947A (en) | 1984-08-22 | 1984-08-22 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6151947A true JPS6151947A (en) | 1986-03-14 |
Family
ID=16007384
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17608184A Pending JPS6151947A (en) | 1984-08-22 | 1984-08-22 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6151947A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5576578A (en) * | 1991-11-15 | 1996-11-19 | Siemens Aktiengesellschaft | High voltage insulating disk |
EP1895584A1 (en) * | 2000-06-01 | 2008-03-05 | Matsushita Electric Industrial Co., Ltd. | Thermally conductive substrate with leadframe and heat radiation plate and manufacturing method thereof |
WO2018211751A1 (en) * | 2017-05-18 | 2018-11-22 | 三菱電機株式会社 | Semiconductor module and power conversion device |
-
1984
- 1984-08-22 JP JP17608184A patent/JPS6151947A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5576578A (en) * | 1991-11-15 | 1996-11-19 | Siemens Aktiengesellschaft | High voltage insulating disk |
EP1895584A1 (en) * | 2000-06-01 | 2008-03-05 | Matsushita Electric Industrial Co., Ltd. | Thermally conductive substrate with leadframe and heat radiation plate and manufacturing method thereof |
WO2018211751A1 (en) * | 2017-05-18 | 2018-11-22 | 三菱電機株式会社 | Semiconductor module and power conversion device |
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