JPS6125056Y2 - - Google Patents
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- Publication number
- JPS6125056Y2 JPS6125056Y2 JP11459377U JP11459377U JPS6125056Y2 JP S6125056 Y2 JPS6125056 Y2 JP S6125056Y2 JP 11459377 U JP11459377 U JP 11459377U JP 11459377 U JP11459377 U JP 11459377U JP S6125056 Y2 JPS6125056 Y2 JP S6125056Y2
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- circuit
- capacitor
- output
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 26
- 101710170231 Antimicrobial peptide 2 Proteins 0.000 claims description 24
- 238000001514 detection method Methods 0.000 claims description 20
- 230000008929 regeneration Effects 0.000 claims 1
- 238000011069 regeneration method Methods 0.000 claims 1
- 101710170230 Antimicrobial peptide 1 Proteins 0.000 description 8
- 230000007257 malfunction Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- HODRFAVLXIFVTR-RKDXNWHRSA-N tevenel Chemical compound NS(=O)(=O)C1=CC=C([C@@H](O)[C@@H](CO)NC(=O)C(Cl)Cl)C=C1 HODRFAVLXIFVTR-RKDXNWHRSA-N 0.000 description 4
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
Landscapes
- Manipulation Of Pulses (AREA)
- Digital Magnetic Recording (AREA)
Description
【考案の詳細な説明】
本考案は、磁気カードリーダー等に使用される
磁気再生回路に関するものである。[Detailed Description of the Invention] The present invention relates to a magnetic reproducing circuit used in magnetic card readers and the like.
一般に磁気記録を再生する時、記録密度の高低
によりその再生出力波形の性質が異なるので磁気
再生回路を低記録密度用に作るか高記録密度用に
作るかにより、それぞれ逆の場合には誤動作を起
し易くなる。即ち第５図のＡに示す様に記録密度
が高い記録媒体の情報を読み取つた場合の出力波
形は磁気記録を読み取る磁気ヘツドの周波数特性
により論理“０”の２倍の周波数である論理
“１”の再生出力レベルがロの様に低下する場合
がある。そこで磁気再生回路としては再生波形の
ピーク値ごとに該再生回路の出力を反転させるピ
ーク検出方式が好ましい。又第６図のＤに示す様
に記録密度が低い場合にはビツトインターバルＴ
が長くなり再生波形に平担な部分ができ、そこに
イの様なノイズが乗ると前述したピーク検出方式
ではこの部分のピーク値で出力が反転して誤動作
を起す。そこで磁気再生回路としては再生波形が
一定基準値に達するごと該再生回路の出力を反転
させるレベル検出方式が好ましい。 Generally, when reproducing magnetic recording, the characteristics of the reproduced output waveform differ depending on the recording density, so depending on whether the magnetic reproducing circuit is made for low or high recording density, malfunctions may occur in the opposite case. It becomes easier to wake up. That is, as shown in A in Figure 5, when information is read from a recording medium with a high recording density, the output waveform is a logic "1", which is twice the frequency of a logic "0", due to the frequency characteristics of the magnetic head that reads the magnetic recording. ” playback output level may drop as shown in (b). Therefore, it is preferable for the magnetic reproducing circuit to use a peak detection method in which the output of the reproducing circuit is inverted for each peak value of the reproduced waveform. Also, as shown in D in Figure 6, when the recording density is low, the bit interval T
becomes longer, creating a flat part in the reproduced waveform, and if noise like A is added to that part, the peak detection method described above will invert the output at the peak value of this part, causing malfunction. Therefore, it is preferable for the magnetic reproducing circuit to use a level detection method in which the output of the reproducing circuit is inverted every time the reproduced waveform reaches a certain reference value.
従来、磁気カードリーダーの磁気再生回路とし
ては前述したピーク検出方式又はレベル検出方式
のどちらかを単独に使用しているので、磁気記録
密度の異なる記録媒体の情報を読み取る場合には
記録密度の高低どちらかの領域で誤動作を起すと
いう欠点を有していた。 Conventionally, the magnetic reproducing circuit of a magnetic card reader uses either the peak detection method or the level detection method described above, so when reading information from recording media with different magnetic recording densities, it is necessary to read information from recording media with different magnetic recording densities. This has the disadvantage of causing malfunctions in either area.
本考案はこの様な欠点を除去し、記録媒体の記
録密度が高くても低くてもいつも安定に再生でき
るよう高記録密度のものを再生する場合はピーク
検出方式、低記録密度のものを再生する場合はレ
ベル検出方式という様に簡易な方法で切り換えら
れる磁気再生回路を提供するものである。 The present invention eliminates these drawbacks and enables stable reproduction regardless of whether the recording density of the recording medium is high or low.The present invention uses a peak detection method when reproducing high recording density media, and a peak detection method when reproducing low recording density media. In this case, we provide a magnetic reproducing circuit that can be switched using a simple method such as a level detection method.
次に本考案の一実施例を図面に基いて説明す
る。第１図において、磁気記録媒体から情報を読
み取る磁気ヘツドHDの両端を抵抗R1，R2を介し
て増幅器AMP１の入力端にそれぞれ接続し、増
幅器AMP１の出力端と反転入力端とを抵抗R4を
介して接続し、増幅器AMP１の非反転入力端を
抵抗R3を介して接地し、抵抗R1，R2，R3，R4と
増幅器AMP１により差動増幅器１を形成する。
増幅器AMP１の出力端をコンデンサC1と抵抗R1
との直列回路を介して増幅器AMP２の反転入力
端に接続し、増幅器AMP２の非反転入力端を抵
抗R1を介して接地し、２個のダイオードD1，D2
を同方向に直列に接続したものと、他の２個のダ
イオードD3，D4を同方向に直列に接続したもの
とを逆方向に並列に接続してこれらを増幅器
AMP２の出力端と反転入力端間に接続し、増幅
器AMP２の反転入力端にピーク検出・レベル検
出切換えスイツチSWの一端を接続し、該スイツ
チSWの他端をコンデンサC3を介して増幅器AMP
２の出力端に接続すると共にコンデンサC2、抵
抗R6の直列回路を介して増幅器AMP１の出力端
に接続する。増幅器AMP２の出力端を増幅器
AMP３の反転入力端に接続し、増幅器AMP３の
出力端と非反転入力端とを抵抗R10を介して接続
すると共に非反転入力端を抵抗R9を介して接地
し、抵抗R9，R10増幅器AMP３によりシユミツト
トリガー回路２が形成される。 Next, one embodiment of the present invention will be described based on the drawings. In FIG. 1, both ends of a magnetic head HD that reads information from a magnetic recording medium are connected to the input ends of an amplifier AMP1 via resistors R 1 and R 2 , respectively, and the output end and the inverting input end of the amplifier AMP1 are connected through a resistor R. The non-inverting input terminal of the amplifier AMP1 is grounded through the resistor R3 , and the resistors R1 , R2 , R3 , R4 and the amplifier AMP1 form a differential amplifier 1 .
Connect the output end of amplifier AMP1 to capacitor C 1 and resistor R 1
The non-inverting input terminal of amplifier AMP2 is grounded via a resistor R1 , and the two diodes D1 , D2 are connected to the inverting input terminal of the amplifier AMP2 through a series circuit with
are connected in series in the same direction, and the other two diodes D 3 and D 4 are connected in series in the same direction, and are connected in parallel in opposite directions to form an amplifier.
Connect between the output terminal of AMP2 and the inverting input terminal, connect one end of the peak detection/level detection changeover switch SW to the inverting input terminal of amplifier AMP2, and connect the other end of the switch SW to the amplifier AMP via capacitor C3 .
It is connected to the output terminal of the amplifier AMP1 through a series circuit of a capacitor C 2 and a resistor R 6 . Connect the output end of amplifier AMP2 to the amplifier
The output terminal of amplifier AMP3 is connected to the inverting input terminal of AMP3, and the non-inverting input terminal is connected via a resistor R 10 , and the non-inverting input terminal is grounded via a resistor R 9 . A Schmitt trigger circuit 2 is formed by the amplifier AMP3.
又ダイオードD1，D2の接続点及びダイオード
D2，D4の接続点を共通にして抵抗R3を介して増
幅器AMP３の非反転入力端に接続しているが、
これは増幅器AMP２の動作を安定にさせるため
のものである。即ち、増巾器AMP２の反転入力
端が無信号状態の時、抵抗R8を介して増巾器
AMP２の反転入力端にバイアス電流を加え、増
巾器AMP２の出力にシユミツトトリガー回路２
のヒステリシスレベルに達するようなノイズの発
生を防ぐようにしてある。これは、ノイズを電流
源としてみた場合、再生信号を電流源としてみた
場合に比較して電流が極めて小さいので、増巾器
AMP２の反転入力端へのバイアス電流が効いて
くるものである。 Also, the connection point of diodes D 1 and D 2 and the diode
The connection point of D 2 and D 4 is made common and connected to the non-inverting input terminal of the amplifier AMP3 via the resistor R 3 .
This is to stabilize the operation of the amplifier AMP2. That is, when the inverting input terminal of the amplifier AMP2 is in a no-signal state, the amplifier is connected via the resistor R8 .
A bias current is applied to the inverting input terminal of AMP2, and a Schmitt trigger circuit 2 is applied to the output of amplifier AMP2.
This is to prevent noise that would reach the hysteresis level. This is because when the noise is viewed as a current source, the current is extremely small compared to when the reproduced signal is viewed as a current source.
The bias current to the inverting input terminal of AMP2 becomes effective.
次に切換スイツチSWを開閉した時の回路構成
について説明すると、切換スイツチSWを開いた
時はコンデンサC2，C3、抵抗R6の直列回路は増
幅器AMP１とAMP２の出力間に接続されている
だけなので事実上無視でき、第１図は第２図に示
す様な回路に書き変えることができる。ここでコ
ンデンサC1、ダイオードD1〜D4、増幅器AMP２
により周知のピーク検出回路３（たとえば本出願
人の出願した特開昭48−130917号明細書参照）が
形成される。尚ダイオードD1〜D4よりなる回路
は正及び負の各一定電圧より小さい電圧に対して
遮断状態となり、その各一定電圧より大きな電圧
に対して導通状態となる回路であればよく、定電
圧ダイオードを逆向きにして直列に接続した回路
でもよい。尚抵抗R5は保護抵抗であり、コンデ
ンサC1は、ピーク検出回路３におけるピーク検
出のための定数に設定されている。また、増幅器
AMP２の非反転入力端は抵抗R1を介して基準電
位を与えられている。次に切換スイツチSWが閉
じた場合は、第１図の回路は第３図に示す様な回
路に書き換えることができる。ここでコンデンサ
C2は低域遮断用のコンデンサであるが、このコ
ンデンサの容量を大きく取れば、増幅器AMP１
の出力電流はそのほとんどがコンデンサC2、抵
抗R5を通つて増幅器AMP２の入力に供給される
ことになる。従つて抵抗R6とコンデンサC3の値
を所望の積分回路となるように定数設定しておけ
ば、抵抗R6、コンデンサC2、増幅器AMP２によ
り、時定数R6，C2を有する周知の速度補償形積
分増幅回路４が形成される。この時ダイオード
D1〜D4は上述の積分動作を安定化するための振
幅圧縮用の素子として働く。 Next, to explain the circuit configuration when the changeover switch SW is opened and closed, when the changeover switch SW is opened, the series circuit of capacitors C 2 and C 3 and resistor R 6 is connected between the outputs of amplifiers AMP1 and AMP2. Therefore, it can be virtually ignored, and the circuit shown in FIG. 1 can be rewritten as shown in FIG. 2. Here, capacitor C 1 , diode D 1 to D 4 , amplifier AMP2
A well-known peak detection circuit 3 (see, for example, Japanese Patent Application Laid-Open No. 130917/1983 filed by the present applicant) is formed by this. Note that the circuit consisting of diodes D1 to D4 may be a circuit that is cut off for voltages smaller than each of the positive and negative constant voltages, and conductive for voltages greater than the respective constant voltages, and is a constant voltage circuit. A circuit in which diodes are connected in series with opposite directions may also be used. Note that the resistor R 5 is a protection resistor, and the capacitor C 1 is set to a constant for peak detection in the peak detection circuit 3. Also, the amplifier
A reference potential is applied to the non-inverting input terminal of AMP2 via a resistor R1 . Next, when the changeover switch SW is closed, the circuit shown in FIG. 1 can be rewritten into a circuit as shown in FIG. 3. capacitor here
C2 is a capacitor for cutting off low frequencies, but if the capacitance of this capacitor is increased, the amplifier AMP1
Most of the output current is supplied to the input of the amplifier AMP2 through the capacitor C 2 and the resistor R 5 . Therefore, if the values of the resistor R 6 and the capacitor C 3 are set as constants to form the desired integrating circuit, the well-known circuit with the time constants R 6 and C 2 can be formed by the resistor R 6 , the capacitor C 2 , and the amplifier AMP2. A speed compensated integral amplifier circuit 4 is formed. At this time the diode
D 1 to D 4 act as amplitude compression elements to stabilize the above-mentioned integral operation.
尚第２，３図における第１図と同符号のものは
同じ素子を表わし、Ａ〜Ｆの符号は後述する波形
のチエツク点である。 In FIGS. 2 and 3, the same symbols as in FIG. 1 represent the same elements, and the symbols A to F are check points of waveforms to be described later.
動作を説明すると、記録密度の高い媒体を読む
時には、スイツチSWを開く。すると第１図の回
路は第２図に示す回路となる。磁気ヘツドHDか
らの出力を差動増幅器１により増幅すると第５図
Ａの様な波形となり、これを、ピーク検出回路３
に入力すると、Ａ波形のピーク値ごとに出力を反
転してＢ波形が得られ、これをさらにシユミツト
トリガー回路２に入力して波形整形するとＣ波形
の様な矩形波が得られる。つまり、Ａ波形のロに
示す様に出力レベルが低いものがあつてもピーク
検出を行なつているので誤動作することなく正確
なタイミングの再生出力が得られる。次に記録密
度の低い媒体を読む時にはスイツチSWを閉じ
る。すると第１図の回路は第３図に示す回路とな
る。磁気ヘツドHDからの出力を差動増幅器１に
より増幅すると第６図Ｄの様な波形となり、これ
を積分増幅回路４に入力するとコンデンサC2の
容量が大きいので、入力信号は、ほとんどがコン
デンサC2を通り、抵抗R6を介して増巾器AMP２
の反転入力端に入力される。従つて、実質的にコ
ンデンサC1と抵抗R5の直列回路は無視すること
ができ、また、増巾器AMP２の出力端と反転入
力端の間にはコンデンサC3が接続されているの
で、この積分増幅回路４は、第２図に示したピー
ク検出回路としては動作せず、ダイオードD1〜
D4によつて振幅圧縮された、抵抗R6とコンデン
サC3によつて時定数の定まる積分回路として動
作することになる。従つて、増巾器AMP２の出
力端、即ち積分増幅回路４からは、時定数R6，
C3に従つてＥの様な積分波形が得られ、これを
シユミツトトリガー回路２により波形整形してＦ
の様な矩形波再生出力が得られる。つまり積分増
幅回路４の積分出力を、シユミツトトリガー回路
２に入力して出力を反転させているものであるか
ら、第６図におけるＤ波形がそのピーク値に対し
て一定割合のレベルに達すると、積分増幅回路４
の積分出力は一定値となり、シユミツトトリガー
回路２の出力を反転させることができる。即ち、
Ｄ波形がピーク値に対する一定割合Vrefに達す
るごとにシユミツトトリガー回路２の出力が反転
するレベル検出方式なので波形のイに示す様なノ
イズピークがあつても誤動作することがない。 To explain the operation, when reading a medium with high recording density, the switch SW is opened. Then, the circuit shown in FIG. 1 becomes the circuit shown in FIG. 2. When the output from the magnetic head HD is amplified by the differential amplifier 1, it becomes a waveform as shown in FIG.
When the output is inverted for each peak value of the A waveform, a B waveform is obtained, which is further input to the Schmitt trigger circuit 2 for waveform shaping, and a rectangular wave like the C waveform is obtained. In other words, even if the output level is low as shown in waveform A, since peak detection is performed, a reproduced output with accurate timing can be obtained without malfunction. Next time when reading a medium with low recording density, close the switch SW. Then, the circuit shown in FIG. 1 becomes the circuit shown in FIG. 3. When the output from the magnetic head HD is amplified by the differential amplifier 1, it becomes a waveform as shown in Fig. 6D. When this is input to the integral amplifier circuit 4, since the capacitance of the capacitor C2 is large, most of the input signal is transmitted to the capacitor C. 2 and the amplifier AMP2 via resistor R 6
is input to the inverting input terminal of . Therefore, the series circuit of the capacitor C 1 and the resistor R 5 can be virtually ignored, and since the capacitor C 3 is connected between the output terminal and the inverting input terminal of the amplifier AMP2, This integral amplifier circuit 4 does not operate as the peak detection circuit shown in FIG .
It operates as an integrating circuit whose amplitude is compressed by D 4 and whose time constant is determined by resistor R 6 and capacitor C 3 . Therefore, from the output terminal of the amplifier AMP2, that is, the integral amplifier circuit 4, the time constant R 6 ,
According to C 3 , an integral waveform like E is obtained, which is waveform-shaped by the Schmitt trigger circuit 2 and converted to F.
A square wave reproduction output like this can be obtained. In other words, since the integral output of the integral amplifier circuit 4 is input to the Schmitt trigger circuit 2 and the output is inverted, when the D waveform in Fig. 6 reaches a level that is a certain percentage of its peak value, , integral amplifier circuit 4
The integrated output becomes a constant value, and the output of the Schmitt trigger circuit 2 can be inverted. That is,
Since the level detection method is used in which the output of the Schmitt trigger circuit 2 is inverted every time the D waveform reaches a certain ratio Vref with respect to the peak value, there will be no malfunction even if there is a noise peak as shown in A of the waveform.
第４図は本考案の他の実施例を示すもので、第
１図と同符号のものは同じ素子を表わすものとす
る。この特徴は、第３図における積分増幅回路４
においてコンデンサC2を大きくして増幅器AMP
１からの出力電流の大部分を抵抗R6を通して増
幅器AMP２に入力していることは即に述べた
が、この際、実際にはコンデンサC1抵抗R5にも
電流が流れるので積分動作が安定しないことがあ
るので、この点を改善したことにある。つまり、
抵抗R11を抵抗R5と増幅器AMP２の入力端との間
に接続し、抵抗R5を抵抗R11との接続点と増幅器
AMP２の出力とをダイオードD1〜D4により接続
したもので、コンデンサC1抵抗R5に流れる電流
をダイオードD1〜D4に流して増幅器AMP２の入
力端に流れ込まないようにして積分動作を安定化
したものである。 FIG. 4 shows another embodiment of the present invention, in which the same reference numerals as in FIG. 1 represent the same elements. This feature is based on the integral amplifier circuit 4 in FIG.
Increase the capacitor C 2 in the amplifier AMP
As mentioned earlier, most of the output current from C1 is input to amplifier AMP2 through resistor R6 , but in this case, current also flows through capacitor C1 and resistor R5 , so the integral operation is stable. We have improved this point because there are times when it does not work. In other words,
Connect the resistor R 11 between the resistor R 5 and the input terminal of the amplifier AMP2, and connect the resistor R 5 between the connection point with the resistor R 11 and the amplifier.
The output of AMP2 is connected to the output of amplifier AMP2 through diodes D1 to D4 , and the current flowing through capacitor C1 and resistor R5 is passed through diodes D1 to D4 to prevent it from flowing into the input terminal of amplifier AMP2, thereby performing an integral operation. It has been stabilized.
上述した様に本考案は、簡易な外部操作により
一つの磁気再生回路をピーク検出方式又はレベル
検出方式に切換える様にしたので、磁気カード等
の記録媒体の記録密度の高低に応じて検出方式を
選択すればいつでも誤動作のない安定な再生出力
が得られるという実用上優れた効果を有してい
る。 As mentioned above, the present invention allows one magnetic reproducing circuit to be switched to the peak detection method or the level detection method by a simple external operation, so the detection method can be changed depending on the recording density of the recording medium such as a magnetic card. If selected, stable playback output without malfunction can be obtained at any time, which is an excellent practical effect.
第１回は本考案の実施例の回路図、第２図は第
１図においてスイツチSWを開いた時の等価回路
図、第３図は第１図においてスイツチSWを閉じ
た時の等価回路図、第４図は本考案の他の実施例
回路図、第５図、第６図は作動波形図である。
C1……コンデンサ、C3……コンデンサ、D1.
D2，D3，D4……ダイオード、R6……抵抗、AMP
２……増幅器、SW……切換スイツチ。
Part 1 is a circuit diagram of an embodiment of the present invention, Figure 2 is an equivalent circuit diagram when the switch SW is open in Figure 1, and Figure 3 is an equivalent circuit diagram when the switch SW is closed in Figure 1. , FIG. 4 is a circuit diagram of another embodiment of the present invention, and FIGS. 5 and 6 are operational waveform diagrams. C 1 ... Capacitor, C 3 ... Capacitor, D 1 .
D 2 , D 3 , D 4 ... Diode, R 6 ... Resistor, AMP
2...Amplifier, SW...changeover switch.
Claims (1)
ドHDと、該磁気ヘツドからの出力を増巾するた
めの第１の増巾器１と、該第１の増巾器の出力端
子に一端を接続された第１のピーク検出用のコン
デンサC1と、一方の入力端子に基準電位が与え
られると共に上記第１のコンデンサの他端に他方
の入力端子が接続された第２の増巾器AMP２
と、該第２の増巾器の他方の入力端子と該第２の
増巾器の出力端子との間に接続された正及び負の
各一定電圧により小さい電圧に対して遮断状態と
なり前記各一定電圧より大きな電圧に対して導通
状態となる回路D1〜D4と、前記第２の増巾器の
他方の入力端子に一端に接続された切換えスイツ
チSWと、該スイツチの他端と前記第２の増巾器
の出力端子との間に接続された第２の積分用のコ
ンデンサC3と、前記スイツチの他端と前記第１
のコンデンサの一端との間に接続された積分用の
抵抗R6とを有する磁気再生回路。 A magnetic head HD for reading information from a magnetic recording medium, a first amplifier 1 for amplifying the output from the magnetic head, and one end connected to the output terminal of the first amplifier. a first peak detection capacitor C1 , and a second amplifier AMP2, one input terminal of which is supplied with a reference potential, and the other input terminal of which is connected to the other end of the first capacitor.
, each of the positive and negative constant voltages connected between the other input terminal of the second amplifier and the output terminal of the second amplifier causes a cut-off state for a small voltage. circuits D 1 to D 4 that become conductive to a voltage greater than a constant voltage; a changeover switch SW connected at one end to the other input terminal of the second amplifier; a second integrating capacitor C3 connected between the output terminal of the second amplifier and the other end of the switch and the first amplifier;
A magnetic regeneration circuit having an integrating resistor R6 connected between one end of the capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11459377U JPS6125056Y2 (en) | 1977-08-29 | 1977-08-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11459377U JPS6125056Y2 (en) | 1977-08-29 | 1977-08-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5441623U JPS5441623U (en) | 1979-03-20 |
| JPS6125056Y2 true JPS6125056Y2 (en) | 1986-07-28 |
Family
ID=29065469
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11459377U Expired JPS6125056Y2 (en) | 1977-08-29 | 1977-08-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6125056Y2 (en) |
-
1977
- 1977-08-29 JP JP11459377U patent/JPS6125056Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5441623U (en) | 1979-03-20 |
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