JPS6112093A - Method of mounting semiconductor device - Google Patents

Method of mounting semiconductor device

Info

Publication number
JPS6112093A
JPS6112093A JP13236284A JP13236284A JPS6112093A JP S6112093 A JPS6112093 A JP S6112093A JP 13236284 A JP13236284 A JP 13236284A JP 13236284 A JP13236284 A JP 13236284A JP S6112093 A JPS6112093 A JP S6112093A
Authority
JP
Japan
Prior art keywords
semiconductor device
printed circuit
circuit board
mounting
mounting semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13236284A
Other languages
Japanese (ja)
Inventor
鶴岡 義文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP13236284A priority Critical patent/JPS6112093A/en
Publication of JPS6112093A publication Critical patent/JPS6112093A/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は半導体装置の実装法にかがり、特にフラットパ
ッケージタイプの半導体装置の実装法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for mounting a semiconductor device, and particularly to a method for mounting a flat package type semiconductor device.

〔発明の技術的背景〕[Technical background of the invention]

半導体集積回路装置においては高密度実装を可能とする
フラットパッケージタイプのものが従来から知られてお
)、このタイプのパッケージでは一般的に使用されてい
るDIPタイプのパッケージに比べ高密度実装が可能な
反面プリント回路基板に実装する際に、接着剤等で仮止
めした後に半田付けを行うなど固定方法に欠点を有して
いた。
For semiconductor integrated circuit devices, flat package types that enable high-density packaging have been known for a long time), and this type of package allows higher-density packaging than the commonly used DIP type packages. On the other hand, when mounting it on a printed circuit board, the fixing method had to be temporarily fixed with an adhesive or the like and then soldered.

〔発明の目的〕[Purpose of the invention]

本発明の目的はフラットタイプパッケージのプリント回
路基板への実装全容易なものとし、かつ同時に実装密度
をさらに向上させる方法を提供するものである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method that makes it easy to mount a flat type package on a printed circuit board, and at the same time further improves the packaging density.

〔発明の構成〕[Structure of the invention]

本発明の構成は、フラットパッケージタイプの半導体装
置をプリント回路基板に対して垂直に固定することを特
徴とした半導体装置の実装方法である。
The structure of the present invention is a semiconductor device mounting method characterized by fixing a flat package type semiconductor device perpendicularly to a printed circuit board.

〔実施例〕〔Example〕

以下本発明全実施例に従って説明する。 All embodiments of the present invention will be explained below.

第1図、第2図に本発明を用いたフラットタイプの半導
体装置1の実装例を示す。ここで半導体装置の一方の辺
にあるリードは、プリント回路基板2の上に開孔された
スルーホール4に挿入され半田付によルプリント回路基
板上の配線と接続されている。また半導体装置の他方の
リードは配線基板を兼ねた固定ガイド3に半田付けによ
シ′固定されている。
FIGS. 1 and 2 show an example of mounting a flat type semiconductor device 1 using the present invention. Here, the leads on one side of the semiconductor device are inserted into through holes 4 formed on the printed circuit board 2 and connected to wiring on the printed circuit board by soldering. The other lead of the semiconductor device is fixed by soldering to a fixed guide 3 which also serves as a wiring board.

〔発明の効果〕〔Effect of the invention〕

この様に本発明を用いることによりフラットタイプパッ
ケージの一方のリードをプリント回路基板のスルーホー
ルに挿入するという通常のDIP形パッケージと同様な
固定法を用いることができ仮止め等の工程が不要となる
。また本発明を用いることにより半導体装置一つ当たシ
のプリント回路基板の占有面積を非常に小さなものとし
、実装密度を大幅に向上させることができる。
As described above, by using the present invention, it is possible to use the same fixing method as for normal DIP type packages, in which one lead of the flat type package is inserted into the through hole of the printed circuit board, and there is no need for processes such as temporary fixing. Become. Further, by using the present invention, the area occupied by a printed circuit board per semiconductor device can be made extremely small, and the packaging density can be greatly improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例の斜視図、第2図は本発明の実
施例の断面図である。 図中。 1・・・・・・フラットタイプ半導体装置、2・・・・
・・プリント回路基板、3・・・・・・配線基板を兼ね
た固定ガイド、4・・・・・・スルーホール。
FIG. 1 is a perspective view of an embodiment of the invention, and FIG. 2 is a sectional view of the embodiment of the invention. In the figure. 1...Flat type semiconductor device, 2...
...Printed circuit board, 3...Fixed guide that also serves as a wiring board, 4...Through hole.

Claims (1)

【特許請求の範囲】[Claims] フラットパッケージタイプの半導体装置をプリント回路
基板に実装する際に、該半導体装置をプリント回路基板
に対して垂直に固定することを特徴とした半導体装置の
実装方法。
1. A method for mounting a semiconductor device, which comprises fixing a flat package type semiconductor device perpendicularly to the printed circuit board when the semiconductor device is mounted on the printed circuit board.
JP13236284A 1984-06-27 1984-06-27 Method of mounting semiconductor device Pending JPS6112093A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13236284A JPS6112093A (en) 1984-06-27 1984-06-27 Method of mounting semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13236284A JPS6112093A (en) 1984-06-27 1984-06-27 Method of mounting semiconductor device

Publications (1)

Publication Number Publication Date
JPS6112093A true JPS6112093A (en) 1986-01-20

Family

ID=15079590

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13236284A Pending JPS6112093A (en) 1984-06-27 1984-06-27 Method of mounting semiconductor device

Country Status (1)

Country Link
JP (1) JPS6112093A (en)

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