JPS59180299U - memory module - Google Patents

memory module

Info

Publication number
JPS59180299U
JPS59180299U JP7583583U JP7583583U JPS59180299U JP S59180299 U JPS59180299 U JP S59180299U JP 7583583 U JP7583583 U JP 7583583U JP 7583583 U JP7583583 U JP 7583583U JP S59180299 U JPS59180299 U JP S59180299U
Authority
JP
Japan
Prior art keywords
memory module
package
substrate
board
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7583583U
Other languages
Japanese (ja)
Inventor
國田 廣司
功 植木
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP7583583U priority Critical patent/JPS59180299U/en
Publication of JPS59180299U publication Critical patent/JPS59180299U/en
Pending legal-status Critical Current

Links

Landscapes

  • Combinations Of Printed Boards (AREA)
  • Semiconductor Memories (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はメモリモジュールの実装構造を示す斜視図、第
2図は本考案に使用するフラットパッケージの例で64
にワード×1ビットのRAMの場合を示す平面図、第3
図は本考案のメモリモジュールの正面図、第4図は側面
図、第5図は上面図である。 4・・・プリント基板、5・・・フラットパッケージ、
8・・・プリント基板。
Figure 1 is a perspective view showing the mounting structure of the memory module, and Figure 2 is an example of the flat package used in the present invention.
Figure 3 is a plan view showing the case of a word x 1 bit RAM.
The figures are a front view, FIG. 4 is a side view, and FIG. 5 is a top view of the memory module of the present invention. 4... Printed circuit board, 5... Flat package,
8...Printed circuit board.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] メモリチップを封入したパッケージと、該パッケージの
複数個を実装した第1の基板とからなり、前記パッケー
ジを第2の基板上に垂直に実装するメモリモジュールに
おいて、前記パッケージをリ −−ド付きのフラットパ
ッケージとし、前記第1の基板にプリント配線基板を用
いたことを特徴とするメモリモジュール。
In a memory module comprising a package enclosing a memory chip and a first substrate on which a plurality of the packages are mounted, the package is vertically mounted on a second substrate, and the package is mounted with a lead. A memory module characterized in that it is a flat package and a printed wiring board is used as the first board.
JP7583583U 1983-05-20 1983-05-20 memory module Pending JPS59180299U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7583583U JPS59180299U (en) 1983-05-20 1983-05-20 memory module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7583583U JPS59180299U (en) 1983-05-20 1983-05-20 memory module

Publications (1)

Publication Number Publication Date
JPS59180299U true JPS59180299U (en) 1984-12-01

Family

ID=30205894

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7583583U Pending JPS59180299U (en) 1983-05-20 1983-05-20 memory module

Country Status (1)

Country Link
JP (1) JPS59180299U (en)

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