JPS61112357A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS61112357A
JPS61112357A JP59234505A JP23450584A JPS61112357A JP S61112357 A JPS61112357 A JP S61112357A JP 59234505 A JP59234505 A JP 59234505A JP 23450584 A JP23450584 A JP 23450584A JP S61112357 A JPS61112357 A JP S61112357A
Authority
JP
Japan
Prior art keywords
semiconductor element
coating
derivative
film
electrodeposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59234505A
Other languages
English (en)
Inventor
Tsunemitsu Koda
國府田　恒充
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP59234505A priority Critical patent/JPS61112357A/ja
Publication of JPS61112357A publication Critical patent/JPS61112357A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、トランジスタや集積回路などの半導体装置に
関する。
〔従来の技術〕
一般に、トランジスタまたは集積回路などの半導体装置
の信頼＃全向上させるために１半導体素子（半導体チッ
プ）の表面を保薩機能ヶ有する被膜で覆う手法が用いら
れている。すなわち、各チップに分割する前のウェーハ
状態において、ＣＶＤ法によって窒化シリコンまたは二
酸化シリコンなどの保護機能を有する膜ｔウェーハ表面
に形成し、しかる後に、この保ｈｇに外部リードとのコ
ンタクト用の窓をわけ、それから各半導体素子（チ。
プ）に分割し、ＷＪ２図（ａ）の断面図に示すように、
半導体素子１を配線基板４に固着し、基板４上の配線３
と半導体素子１のコンタクト窓に無比した半導体素子１
の電極パッドとの間に金属細線２を接続して組立を行う
。しかし、この組立では、コンタクト部分は外界に対し
て全くの無防備であるため、他の部分に比べて容易に腐
食し、断線事故が起る。
そこで、腐食原因となる露出部をなくすだめに、半導体
素子を全体的に樹脂で覆うことが行われる。
すなわち、第２図（ｂｌの断面図に示すように、半導体
素子１を基板４に固着後、金属細線２の接続を行い、そ
れから、半導体素子１の周囲を取囲む樹脂枠７を設け、
制水性・耐候性のめるシリコン樹脂６をボッティングに
より滴下し、あるいは、エポキシ樹脂ヲ流し込んで、半
導体素子１および金楓細＃２に含めて全体的に糧う。し
かしこの作業は、各半導体素子毎に樹脂枠を設けて竹う
ので作業能率が悪い。作業能率を上げるだめに、樹脂枠
を省いて行うこともあるが、この場合は樹脂層の厚ちや
広がりで制御することが難しく、外形的に均一なものが
得られないという問題かめる。
〔発明が解決しようとする問題点〕
上述のように、従来の半導体素子表面保膿対策では、保
護が十分でないとか、また、保蝕機能を商めようとする
と作業能率が悪くコスト高になるという問題点ケ抱えて
おった。
〔問題点を解決するための手段〕
上記問題点に対し、本発明では電着塗装により形成した
破膜で半導体素子を覆い保腹している。
〔実施例〕
つぎに本発明を実施例により説明する。
第１図は本発明の一実施例の断面図である。第１図にお
いて、樹脂基板４に半導体素子１を固着した後、基板４
上の配線３と半導体素子１のｔ極パッドとの間はｉＴｈ
細線２で接続し、つぎに、金属細線２およびその接続部
などの紐出した４１！体面には、電着塗装によシ保腫膜
８を形成している。
保護膜８としては、例えば、アクリル酸誘導体。
メタアクリル酸エポキシ誘導体、あるいはアルキッド誘
導体が用いられる。
〔発明の効果〕
本発明によれば、前述の従来技術の問題点は電着塗装に
よシ形成した保護膜によって解決している。即ち、電着
塗装においては、塗膜厚は通を量にほぼ比例するため、
膜厚の制御が容易である。
加えて、電圧の印加されない部分には塗装がなされない
ために、塗膜の形成領域の制限は絶縁物のマスクを用い
て簡単に行える。更に、電解塗装においては、塗装中、
電気抵抗の小さい箇所、即ち塗膜の薄い部分に優先して
電着が行われるので、塗膜は均一かつピンホールの少い
ものとなる。従って、基板に半導体素子を固着した形式
のもの、または・　リードフＬｙ　−Ａ　ｆ有する半導
体装置にお　　　　、・、いても、電解塗装によって秀
れた保護膜を侍る事ができ、その信籾性で向上する事が
可能となるのでろる。
【図面の簡単な説明】
第１図は本発明の一実施例の断２面図、第２図（ａ）。 ｆｂ）は従来の半導体装置の一例および他の一例の断面
図である。　　　゛ １・・・・・・半導体素子（テッグ）、２・・・・・・
金属細線、３・・・・・・配線、４・・・・・・樹脂基
板、５・・・・・・窒化シリコン膜、６・・・・・・封
入樹脂、７・・・・・・樹脂枠、８・・・・・・電着保
腹膜。 ４　１図

Claims (1)

    【特許請求の範囲】
  1. 電着塗装により被着された保護被膜を有することを特徴
    とする半導体装置。
JP59234505A 1984-11-07 1984-11-07 半導体装置 Pending JPS61112357A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59234505A JPS61112357A (ja) 1984-11-07 1984-11-07 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59234505A JPS61112357A (ja) 1984-11-07 1984-11-07 半導体装置

Publications (1)

Publication Number Publication Date
JPS61112357A true JPS61112357A (ja) 1986-05-30

Family

ID=16972077

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59234505A Pending JPS61112357A (ja) 1984-11-07 1984-11-07 半導体装置

Country Status (1)

Country Link
JP (1) JPS61112357A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0792519A4 (en) * 1994-11-15 1998-06-24 Formfactor Inc COMPOSITE INTERCONNECTION ELEMENTS FOR MICROELECTRONIC COMPONENTS

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0792519A4 (en) * 1994-11-15 1998-06-24 Formfactor Inc COMPOSITE INTERCONNECTION ELEMENTS FOR MICROELECTRONIC COMPONENTS

Similar Documents

Publication Publication Date Title
EP1020903B1 (en) A semiconductor device using a lead frame and its manufacturing method
US8368211B2 (en) Solderable top metalization and passivation for source mounted package
JPS61112357A (ja) 半導体装置
US5262671A (en) Semiconductor device in which a peripheral potential barrier is established
JPS59161852A (ja) 半導体装置
JP2933554B2 (ja) 半導体装置およびその製造方法
JPS61139050A (ja) リ−ドフレ−ム
JP2974840B2 (ja) 半導体素子の実装方法
JPS60150657A (ja) レジンモ−ルド半導体装置
JPH07135203A (ja) 半導体装置
JPS615562A (ja) 半導体装置
JPS6365655A (ja) 樹脂封止型半導体装置
JPS59188947A (ja) 樹脂封止形半導体装置の製造方法
JP3354716B2 (ja) 半導体集積回路装置の製造方法
JPH0290637A (ja) 半導体集積回路装置
JP2743156B2 (ja) 樹脂封止型半導体装置
JPH0414833A (ja) 半導体装置
JPS617638A (ja) 半導体装置
JPS63304653A (ja) 半導体装置
JPS60225482A (ja) 半導体装置
JPH03227539A (ja) 半導体装置
JPS60242643A (ja) 電子部品の配線
JPS63107031A (ja) 半導体装置
JP2536626Y2 (ja) 混成集積回路
JPS60234352A (ja) 半導体装置