JPS6017939A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPS6017939A
JPS6017939A JP58125804A JP12580483A JPS6017939A JP S6017939 A JPS6017939 A JP S6017939A JP 58125804 A JP58125804 A JP 58125804A JP 12580483 A JP12580483 A JP 12580483A JP S6017939 A JPS6017939 A JP S6017939A
Authority
JP
Japan
Prior art keywords
silver
lead
resin
lead frame
portions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58125804A
Other languages
Japanese (ja)
Inventor
Shinichi Miki
神酒 慎一
Shuji Obuchi
大「淵」 修司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58125804A priority Critical patent/JPS6017939A/en
Publication of JPS6017939A publication Critical patent/JPS6017939A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • H01L2224/854Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85439Silver (Ag) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Led Device Packages (AREA)

Abstract

PURPOSE:To obtain a stable workability with low cost by covering a plurality of die bonded regions, a plurality of wire bonded regions and the front and back surfaces of a plurality of the first and second leads with noble metal plating layers. CONSTITUTION:Silver plating layers are formed only on die bonded portions 10, wire bonded portions 14 and tie bar portions 15 and lead wirings 17 of necessary portions as a semiconductor device. When thus partly silver-plated, the silver amount is reduced, thereby supplying an inexpensive lead frame. In resin sealing, since a silver plating layer is not present on the lead frame of the air vent portion of a sealing mold, a suitable air gap of the air vent portion can be readily held, and externally pushing effect for air bubbles in the cavity can be obtained. Since the leads 17 are contacted with the mold, the silver and the resin can be readily separated since the silver and the resin has wrong contacting property. As the silver plating is executed on the entire lead wirings, preferable solderability and corrosion resistance can be obtained even if surface treatment is not performed in the next step, thereby reducing the cost, stabilizing the produciton and improving the quality.

Description

【発明の詳細な説明】 本発明は貴金属めっき層で被覆したリードフレームに関
し、とくに銀めっき量の削減および樹脂封入の作業性を
向上せしめる光半導体装置用+7−ドフレームに関する
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a lead frame coated with a noble metal plating layer, and particularly to a lead frame for an optical semiconductor device that reduces the amount of silver plating and improves the workability of resin encapsulation.

従来の半導体装置用リードフレームは、素材として鉄、
銅ある−・は鉄−ニッケル合金等が一般に用いられる。
Conventional lead frames for semiconductor devices are made of iron,
For copper, iron-nickel alloys and the like are generally used.

例えは、鉄を素材として用(・た場合、従来は表面めっ
き処理として、先ず全面に銅めっきを施工し、その後ダ
イボンド、ワイヤーボンドに必要ン)箇所のみならず、
フレーム全体を貴金属例えば3〜5μm厚の釧めっきで
被覆するいわゆる全面銀めっきが採用されていた。
For example, when iron is used as a material (in the past, copper plating was first applied to the entire surface as a surface plating treatment, and then it was necessary for die bonding and wire bonding).
So-called full-surface silver plating, in which the entire frame is coated with noble metal, for example, 3 to 5 μm thick silver plating, has been adopted.

この場合、銀めっきがリード線上以外にまで同等の調厚
で施工されているため、銀の使用量が多くてコスト高と
ガる。そこで、ダイボンド、ワイヤーボンドおよびタイ
バ一部のみに、タイバーに沿って例えば3〜5μnt厚
の銀めっきを施工したいわゆる部分釧めっきにより銀量
の削減が行なわれた。
In this case, since the silver plating is applied to areas other than the lead wires with the same thickness adjustment, a large amount of silver is used, resulting in high costs. Therefore, the amount of silver was reduced by so-called partial plating, in which silver plating with a thickness of, for example, 3 to 5 .mu.nt was applied along the tie bars only to part of the die bond, wire bond, and tie bars.

だが、この方式の部分銀めっきを施行したリードフレー
ムは、部分鋼めっき境界にて3〜5μmの段差が生じる
。すると、樹脂制止工程において、ランナーを通ってき
た樹脂11がめつき層の段差にぶつかり、との段差に侵
入し、銀めっきが施工されな(・リード線上に樹脂が流
れる。とくに光半導体装V樹脂は、フィラーを含まな〜
・ことが多く、従って3〜57tmの段差であっても容
易に侵入し°Cしまう。リード線表面の銅面は、グイボ
ンディングエ和等の熱程歴にまりが?化して(・るのが
七通であり、その表面に流れた樹脂は銀表面の場合より
密着は堅固で、リード線の夕(装処理どして電解半田め
っきを施工する際の前処理では銅面の樹脂パリ剥離は田
離で、残存したままで幻良好な半l」めっき皮膜を得る
ことはでき索(・。また、銅酸化膜を除去するために、
塩酸等の強酸による酸洗が必要と左り、C沼イオンがリ
ード線と封入樹脂の隙間から侵入して素子へ悪影響を与
える等の欠点がある。この樹脂もれを防ぐには樹脂側止
金型の型締圧力を上ると樹脂もれにある程度緩和される
が、エアーベントの機能が抑制され、キャビティー内部
のエアーが外部に逃げきれずに、成形稜に著しく気泡・
カケ等として残る。樹脂封止条件も狭くカリ不安定で作
業性も悪くなる。これを改善するには、適正な型締め圧
でリード表面に樹脂が流れることがガく、エアー抜きが
十分に行なわれるようなめっき構造が必要である。
However, in a lead frame subjected to this method of partial silver plating, a step of 3 to 5 μm occurs at the boundary of the partial steel plating. Then, in the resin restraining process, the resin 11 that has passed through the runner collides with the step of the plating layer and enters the step, preventing silver plating from being applied. does not contain filler~
・Accordingly, even a step of 3 to 57 tm can easily penetrate and cause temperature drop. Does the copper surface of the lead wire get stuck in the thermal history of Guibondingue, etc.? The resin that has flowed onto the surface has a stronger adhesion than the silver surface, and is used as a pre-treatment when applying electrolytic solder plating to the lead wire. The peeling of the resin on the copper surface is difficult, and it is not possible to obtain a phantom good half-inch plating film while remaining.Also, in order to remove the copper oxide film,
Although pickling with a strong acid such as hydrochloric acid is necessary, there are drawbacks such as C ions entering through the gap between the lead wire and the encapsulating resin and having an adverse effect on the element. To prevent this resin leakage, increasing the mold clamping pressure of the resin side stopper mold will alleviate the resin leakage to some extent, but the function of the air vent will be suppressed and the air inside the cavity will not be able to escape to the outside. , there are significant air bubbles and
It remains as a chip. The resin sealing conditions are also narrow and the potency is unstable, resulting in poor workability. To improve this problem, a plating structure is required that prevents resin from flowing onto the lead surface under appropriate mold clamping pressure and allows sufficient air removal.

以下、問題点をリードフレームの一例につき図面を用(
・て説明する。第1図は従来の鉄素材の全面銀めっきリ
ードフレームを用いて製造された発光ダイオードの一例
(断面)を示す。1は鉄素材であり、リードフレーム全
面に約2〜5.mの銅めっき層2および3〜511mの
全面銀めっき層3が施されて(・る。このリードフレー
ムの平面図および、樹脂封止時のランナ一部、エアーベ
ントsの一例を第2図2に示す。このリードフレームの
アイランド部にダイボンディングおよび対応するリード
先端にワイヤーボンディングを行々った後、樹脂封止を
行なう。樹脂封止はトランスファ一方式により行なうが
、リードフレーム6に対して樹脂はランナー11を通り
、サブランナー12を経由してレンズ部4を形成する。
The problems are explained below using a drawing for an example of a lead frame (
・I will explain. FIG. 1 shows an example (cross section) of a light emitting diode manufactured using a conventional lead frame made of iron and entirely silver plated. 1 is an iron material, and about 2 to 5. A copper plating layer 2 with a thickness of m and a total silver plating layer 3 with a thickness of 3 to 511 m are applied. 2. After die bonding to the island portion of this lead frame and wire bonding to the corresponding lead tips, resin sealing is performed. Resin sealing is performed by one transfer method, but the lead frame 6 is The resin passes through the runner 11 and then via the sub-runner 12 to form the lens portion 4.

この場合、レンズ部の気泡発生防止のためエアーベン)
13を設けて空気を逃がす方法が取られている。ところ
で、リードフレーム6にお(・て発光ダイオードとして
構成される部分は、ダイボンドワイヤーボンドから延長
しfリード部7および7′までであり、それ以外の箇所
は製品としては、使用されず、かかる領域まで銀めっき
を施工するのは、鋏材料費によるコスト高を招くもので
ある。このため部分銀めっき方式によるリードフレーム
のコストダウンが行表われて(・る。第3図はダイボン
ド、ワイヤーボンドおよびタイバ一部のみに銀めっきを
施工したリードフレームの例で、第4図は第3図の八−
A′の断面図を示す。■は鉄素材、全面に銅めっき層2
、クイパ一部5迄銀めっき3を施工する。
In this case, use an air vent to prevent air bubbles from forming in the lens.
13 to allow air to escape. By the way, the part of the lead frame 6 that is configured as a light emitting diode extends from the die bond wire bond to the f lead parts 7 and 7', and the other parts are not used as a product and are Applying silver plating to the entire area incurs high costs due to the cost of scissor materials.For this reason, the cost of lead frames has been reduced by selective silver plating. Figure 4 is an example of a lead frame in which only part of the bond and tie bars are silver plated.
A sectional view of A' is shown. ■Iron material, copper plating layer 2 on the entire surface
, Apply silver plating 3 to part 5 of Kuipa.

この部分銀めっきリードフレームは樹脂封止する際、銀
めっき層の段差8によりリードフレームと封止金型間に
わずかガ間隙が生じ、樹脂もれを起す欠点があった。こ
の場合、樹脂は、リード部表 5− 面のCu層と密着し、次工程の半田めっき処理工程にお
ける樹脂パリ除去を困難にして(・た。
When this partially silver-plated lead frame is resin-sealed, a slight gap is created between the lead frame and the sealing mold due to the step 8 of the silver-plated layer, resulting in resin leakage. In this case, the resin was in close contact with the Cu layer on the front surface of the lead, making it difficult to remove resin flakes in the next solder plating process.

本発明は上述の欠点を補い、低コストで安定した作業性
を刊ることのできるリードフレームを提供しようとする
ものである。
The present invention aims to compensate for the above-mentioned drawbacks and provide a lead frame that can be manufactured at low cost and with stable workability.

以下、本発明を図面にJ:り説明する。The present invention will be explained below with reference to the drawings.

第5図に、本発明を発光ダイオードに適用した場合の一
実施例を示す。本発明では半導体装置(この場合発光ダ
イオード)として必要な部分であるダイボンド部10、
ワイヤーボンド部14、タイバ一部15およびリード線
17にのみ銀めっき層を設けたことを特徴とする。
FIG. 5 shows an embodiment in which the present invention is applied to a light emitting diode. In the present invention, a die bonding section 10, which is a necessary part of a semiconductor device (in this case, a light emitting diode),
It is characterized in that a silver plating layer is provided only on the wire bond part 14, the tie bar part 15, and the lead wire 17.

この方法で部分銀めっきを施した場合、従来の全面銀め
っきから銀量を削減し、安価なリードフレームが供給で
きる。この部分銀めっきは特別に困難なものでなく、一
般的に用いられているスポットめっき方式を応用するだ
けで容易に行なうことができる。
When partial silver plating is performed using this method, the amount of silver can be reduced compared to the conventional full surface silver plating, and an inexpensive lead frame can be provided. This partial silver plating is not particularly difficult and can be easily performed by simply applying a commonly used spot plating method.

また、樹脂制止にお(・て封止金型のエアーペント部分
のリードフレーム上に銀めっき層がないた6− め、エアーベント部の適正な空隙を容易に保つことがで
き、キャビティー内の気泡を活発的に外部に押し出す効
果が得られる。また、リード17上は金型が密着してい
るため、樹脂がパリと々って付着することば々いが、側
面部に樹脂が付着したとしても、釧と樹脂の密着が悪い
ために、容易に剥離させることができる。また、リード
線外装処理として電解半田めっきを行なう場合、第6図
は第5図の13−B’の断面図であるが、発光ダイオー
ドとして必要な部分は釧めっきで被って(・るので、4
)、別に酸化膜剥離をするための酸洗(・は不要である
。つまり、従来の部分什めっきはリード線上に銅が露出
しており、樹脂パリの除去および外装早口]めっき処理
が必要であったが、本発明によってリード線全面に釧め
っきが施されて(・るため次工程で表面処理を行なわ力
くても、良好な半田付性および而」食性を得ることがで
きる。
In addition, since there is no silver plating layer on the lead frame of the air vent part of the sealing mold due to the resin restraint, it is easy to maintain an appropriate gap in the air vent part, and the inside of the cavity can be easily maintained. This has the effect of actively pushing out air bubbles to the outside.Also, since the mold is in close contact with the top of the lead 17, resin often sticks to the top of the lead 17. Also, since the adhesion between the wire and the resin is poor, it can be easily peeled off.Also, when electrolytic solder plating is performed as the lead wire exterior treatment, Figure 6 is a cross-sectional view taken along line 13-B' in Figure 5. However, the parts necessary for the light emitting diode are covered with 采 plating (・ru), so 4
), pickling to remove the oxide film (・) is not necessary. In other words, conventional partial plating exposes copper on the lead wires, and requires removal of resin particles and exterior quick plating. However, according to the present invention, the entire surface of the lead wire is plated, so that good solderability and solderability can be obtained even if surface treatment is performed in the next step.

本来、部分めっき化を推進する場合、リード線には貴金
属めっきは施工しな(・のが普通であるが、この半導体
装置用リードフレームは、リード線全面に銀めっきを施
しても、その銀量よりもはるかに太き(・コス)・低減
と生産の安定化及び品質向上を得ることができる。
Normally, when promoting partial plating, lead wires should not be plated with precious metals. It is possible to achieve much greater cost reduction than quantity, stabilization of production, and improvement of quality.

本発明は光半導体装首、特に発光ダイオードを実施例と
して絡げたが、一般の半導体装置用にも効果があるのは
言うまでもない。
Although the present invention relates to an optical semiconductor device, particularly a light emitting diode, it goes without saying that it is also effective for use in general semiconductor devices.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来の全面銀めっきの断面図を示す。 第2図は、リードフレームの平面図および樹脂制止時の
ランナー、サブランナー、キャビティーエアーベントの
樹脂の流れを示す。第3図は、従来の部分銀めっきの一
実施例で、第4図は、その断面図である。第5図は、本
発明の部分銀めっきの一実施例を示1−1第6図はその
断面図である。 l・・・鉄素材、2・・・銅めっき層、3・・・銀めっ
き層、4・・・モール)”IrJJL 5 、 ] 5
・・・タイバー、17・・・リード線。 (電 K
FIG. 1 shows a cross-sectional view of conventional full surface silver plating. FIG. 2 shows a plan view of the lead frame and the flow of resin in the runner, sub-runner, and cavity air vent when the resin is stopped. FIG. 3 shows an example of conventional partial silver plating, and FIG. 4 is a cross-sectional view thereof. FIG. 5 shows an embodiment of partial silver plating according to the present invention, and FIG. 1-1 is a sectional view thereof. l...Iron material, 2...Copper plating layer, 3...Silver plating layer, 4...Mall)"IrJJL 5, ] 5
... Tie bar, 17... Lead wire. (Electric K

Claims (2)

【特許請求の範囲】[Claims] (1)複数個のダイボンド領域、これと連続してそれぞ
れ延長された複数の第1のリード部、前記複数個のダイ
ボンド領域とそれぞれ対向した位置にある複数個のワイ
ヤーボンディング領域、およびこれと連続してそれぞれ
延長された複数の第2のリード部を有し、貴金属めっき
層が前記複数個のダイボンド領域、前記複数個のワイヤ
ボンド傾城および前記複数の第1および第2のリード部
の表裏面に被覆されたことを特徴とする半導体装置用リ
ードフレーム。
(1) A plurality of die bonding regions, a plurality of first lead portions each extending continuously from the die bonding regions, a plurality of wire bonding regions located at positions facing each of the plurality of die bonding regions, and continuous thereto. and a plurality of second lead portions each extending as a lead portion, and a noble metal plating layer is provided on the front and back surfaces of the plurality of die bond regions, the plurality of wire bond slopes, and the plurality of first and second lead portions. A lead frame for a semiconductor device characterized by being coated with.
(2)前記第1および第2のリード部は直線状に配列さ
れ且つ前記複数個のダイボンド領域の配列方向は前記リ
ード方向と直角に配列されて力ることを特徴とする前記
第(1)項記載のリードフレーム。
(2) The first and second lead parts are arranged in a straight line, and the arrangement direction of the plurality of die bond regions is arranged at right angles to the lead direction. Lead frame as described in section.
JP58125804A 1983-07-11 1983-07-11 Lead frame for semiconductor device Pending JPS6017939A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58125804A JPS6017939A (en) 1983-07-11 1983-07-11 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58125804A JPS6017939A (en) 1983-07-11 1983-07-11 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPS6017939A true JPS6017939A (en) 1985-01-29

Family

ID=14919312

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58125804A Pending JPS6017939A (en) 1983-07-11 1983-07-11 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS6017939A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61269351A (en) * 1985-05-23 1986-11-28 Nec Yamagata Ltd Lead frame for semiconductor device
JPS6289153U (en) * 1985-11-22 1987-06-08
US5050565A (en) * 1989-12-15 1991-09-24 Mazda Motor Corporation Fuel control system for engine
JP2008028154A (en) * 2006-07-21 2008-02-07 Sumitomo Metal Mining Package Materials Co Ltd Lead frame for optical semiconductor device
CN105336839A (en) * 2015-11-16 2016-02-17 格力电器(合肥)有限公司 Pad, light emitting diode (LED) and pad printing template

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61269351A (en) * 1985-05-23 1986-11-28 Nec Yamagata Ltd Lead frame for semiconductor device
JPS6289153U (en) * 1985-11-22 1987-06-08
US5050565A (en) * 1989-12-15 1991-09-24 Mazda Motor Corporation Fuel control system for engine
JP2008028154A (en) * 2006-07-21 2008-02-07 Sumitomo Metal Mining Package Materials Co Ltd Lead frame for optical semiconductor device
CN105336839A (en) * 2015-11-16 2016-02-17 格力电器(合肥)有限公司 Pad, light emitting diode (LED) and pad printing template

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