JP2008028154A - Lead frame for optical semiconductor device - Google Patents

Lead frame for optical semiconductor device Download PDF

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Publication number
JP2008028154A
JP2008028154A JP2006199096A JP2006199096A JP2008028154A JP 2008028154 A JP2008028154 A JP 2008028154A JP 2006199096 A JP2006199096 A JP 2006199096A JP 2006199096 A JP2006199096 A JP 2006199096A JP 2008028154 A JP2008028154 A JP 2008028154A
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Japan
Prior art keywords
lead frame
silver plating
optical semiconductor
plating
region
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Pending
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JP2006199096A
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Japanese (ja)
Inventor
Hideaki Maekawa
英明 前川
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Sumitomo Metal Mining Package Materials Co Ltd
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Sumitomo Metal Mining Package Materials Co Ltd
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Priority to JP2006199096A priority Critical patent/JP2008028154A/en
Publication of JP2008028154A publication Critical patent/JP2008028154A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Led Device Packages (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a low cost lead frame which reduces the amount of expensive silver plating used to the utmost limit. <P>SOLUTION: The lead frame for an optical semiconductor device connects a light-emitting element 7 and a lead frame 1 with a metal wire 8, and seals them by a transparent resin 9. In a wire bonding region 2 formed in the lead frame 1, a silver plating of the thickness 2 μm or more is performed, and in the other region which needs plating, the sliver plating is performed whose thickness is 0.3 μm or more and is thinner than the silver plating formed in the wire bonding region 2. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、ＬＥＤ（Light Emitting Diode）や半導体レーザ等の光半導体装置用リードフレームに関する。   The present invention relates to a lead frame for an optical semiconductor device such as an LED (Light Emitting Diode) or a semiconductor laser.

従来、ＬＥＤや半導体レーザ等の光半導体装置に用いられるリードフレームは、エッチングや打ち抜き加工より所望のリードフレーム形状に加工された銅素材に、半導体素子搭載領域、ワイヤボンディング領域、基板への実装領域などの銀めっきが必要な部分のみならず、フレーム全体をワイヤボンディングに必要な２μｍ〜７μｍ厚の銀めっきで被覆するいわゆる全面めっきが採用されていた。この場合、全面に同じ膜厚の銀めっきが施されていたため、銀の使用量がリードフレームのコスト高の原因となっていた。   Conventionally, lead frames used in optical semiconductor devices such as LEDs and semiconductor lasers are made of a copper material that has been processed into a desired lead frame shape by etching or punching, into a semiconductor element mounting area, a wire bonding area, and a mounting area on a substrate. So-called full-surface plating that covers the entire frame with 2 to 7 μm thick silver plating necessary for wire bonding, as well as the parts that require silver plating, has been employed. In this case, since silver plating having the same film thickness was applied to the entire surface, the amount of silver used was the cause of the high cost of the lead frame.

上記問題を解決するために、従来、例えば特許文献１に記載されているように、銀めっきが必要な部分にのみ銀めっきを施したいわゆる部分めっきにより、銀使用量の低減が図られていた。   In order to solve the above problem, conventionally, as described in, for example, Patent Document 1, the amount of silver used has been reduced by so-called partial plating in which silver plating is performed only on portions where silver plating is necessary. .

しかしながら、めっき材料である銀は高価な金属であるため、依然として銀めっきの使用量はリードフレームのコスト高に対する大きな問題となっていた。
特開昭６０−１７９３９号公報 However, since silver, which is a plating material, is an expensive metal, the amount of silver plating still remains a big problem for the high cost of the lead frame.
Japanese Patent Laid-Open No. 60-17939

本発明は、上記の問題点を解決するためになされたもので、銀めっきの使用量を極限まで減らし、低コストなリードフレームを提供することを目的とする。   The present invention has been made to solve the above-described problems, and an object thereof is to provide a low-cost lead frame by reducing the amount of silver plating used to the limit.

上記目的を達成するため、本発明による光半導体装置用リードフレームは、発光素子とリードフレームを金属ワイヤで接続して、これらが透明樹脂で封止される、光半導体装置用リードフレームにおいて、リードフレームに形成されたワイヤボンディング領域に２μｍ厚以上の銀めっきが形成され、ワイヤボンディング領域以外のめっきが必要な領域に０．３μｍ厚以上で、かつワイヤボンディング領域に形成された銀めっき厚より薄い銀めっきが形成されていることを特徴とする。   In order to achieve the above object, a lead frame for an optical semiconductor device according to the present invention is a lead frame for an optical semiconductor device in which a light emitting element and a lead frame are connected by a metal wire and these are sealed with a transparent resin. Silver plating with a thickness of 2 μm or more is formed in the wire bonding area formed on the frame, and the thickness is 0.3 μm or more in areas where plating is required other than the wire bonding area, and is thinner than the silver plating thickness formed in the wire bonding area A silver plating is formed.

本発明によれば、前記ワイヤボンディング領域以外のめっきが必要な領域が、好ましくは、光半導体素子搭載領域、樹脂封止領域、及びはんだ接合領域であることを特徴とする。   According to the present invention, the regions other than the wire bonding region that require plating are preferably an optical semiconductor element mounting region, a resin sealing region, and a solder joint region.

本発明によれば、銀めっきを施した従来のリードフレームに比べて、所用の銀めっき量を従来の２０％程度に削減することができ、低価格なリードフレームを提供することができる。   According to the present invention, the required amount of silver plating can be reduced to about 20% of the conventional lead frame compared with the conventional lead frame subjected to silver plating, and a low-cost lead frame can be provided.

以下、本発明の実施の形態を図示した実施例に基づき説明する。
図１は本発明に係る光半導体装置用リードフレームの一実施例を示す説明図で、（ａ）はその平面図、（ｂ）は（ａ）のＡ−Ａ’線に沿う断面図である。図１において、１はリードフレーム、２はリードフレーム１のワイヤボンディング用リードの先端部であるワイヤボンディング領域、３はリードフレーム１の半導体発光素子搭載用リードの先端部である光半導体素子搭載領域、４はワイヤボンディング領域２と光半導体素子搭載領域３の基板への半田接合領域、５は第１の銀めっき部、６は第２の銀めっき部である。 Hereinafter, embodiments of the present invention will be described based on illustrated examples.
1A and 1B are explanatory views showing an embodiment of a lead frame for an optical semiconductor device according to the present invention. FIG. 1A is a plan view thereof, and FIG. 1B is a cross-sectional view taken along line AA ′ of FIG. . In FIG. 1, 1 is a lead frame, 2 is a wire bonding region that is a tip of a wire bonding lead of the lead frame 1, and 3 is an optical semiconductor element mounting region that is a tip of a semiconductor light emitting device mounting lead of the lead frame 1. Reference numeral 4 denotes a solder bonding region of the wire bonding region 2 and the optical semiconductor element mounting region 3 to the substrate, 5 denotes a first silver plating portion, and 6 denotes a second silver plating portion.

次に、本発明に係る光半導体装置用リードフレームの製作工程を説明する。まず、銅等の金属板をプレス加工やエッチングにより所望のリードフレーム形状に加工し、次に、めっきが必要な領域に第１の銀めっきを施して第１の銀めっき部５を形成する。この場合、めっきを必要とする領域は、光半導体素子搭載領域３、樹脂封止領域、及び半田接合領域４等である。   Next, the manufacturing process of the lead frame for optical semiconductor devices according to the present invention will be described. First, a metal plate such as copper is processed into a desired lead frame shape by press working or etching, and then the first silver plating portion 5 is formed by applying the first silver plating to the region that needs to be plated. In this case, the areas that require plating are the optical semiconductor element mounting area 3, the resin sealing area, the solder bonding area 4, and the like.

次に、ワイヤボンディング領域２に第２の銀めっきを施して第２の銀めっき部６を形成する。ワイヤボンディング領域２は、第２の銀めっきの際にめっきを施すため、必ずしも第１の銀めっきを施す必要はないが、図１（ｂ）に示すように、めっき工程の都合上第１の銀めっきを施しても良い。   Next, a second silver plating is applied to the wire bonding region 2 to form a second silver plating portion 6. Since the wire bonding region 2 is plated at the time of the second silver plating, it is not always necessary to perform the first silver plating. However, as shown in FIG. Silver plating may be applied.

第１の銀めっき部５の厚みは０．３μｍ以上で、かつワイヤボンディング領域２に形成される銀めっき厚より薄くすることが望ましい。第１の銀めっき部５の厚みが０．３μｍより薄いと、半導体装置を基板にはんだ接合する際に、下地の銅が銀めっきの表面に拡散してきてしまい、はんだ濡れ性を確保できず、基板への接合不良を起こす要因になってしまう。また、第１の銀めっき部５の厚みが、ワイヤボンディング領域２に形成される銀めっき以上の厚みであると、銀めっきの使用量を低減するという効果がなくなってしまう。
はんだ接合は２００℃程度の温度で行われるため、第１の銀めっき部５の厚みは０．５μｍ〜１．０μｍの範囲とすることがさらに望ましい。 It is desirable that the thickness of the first silver plating portion 5 is 0.3 μm or more and is thinner than the silver plating thickness formed in the wire bonding region 2. If the thickness of the first silver-plated portion 5 is thinner than 0.3 μm, when the semiconductor device is soldered to the substrate, the underlying copper diffuses to the surface of the silver plating, and solder wettability cannot be ensured. It becomes a factor which causes poor bonding to the substrate. Moreover, when the thickness of the 1st silver plating part 5 is the thickness more than the silver plating formed in the wire bonding area | region 2, the effect of reducing the usage-amount of silver plating will be lose | eliminated.
Since solder joining is performed at a temperature of about 200 ° C., the thickness of the first silver-plated portion 5 is more preferably in the range of 0.5 μm to 1.0 μm.

第２の銀めっき部６の厚みは、ワイヤボンディング領域２の銀めっき厚みと併せて２〜７μｍの範囲となるようにすることが望ましい。ワイヤボンディング領域２の銀めっき厚が２μｍより薄いとワイヤとの接続信頼性が低下し、７μｍを超えると効果は変わらずいたずらに銀の使用量が増えるだけになる。   The thickness of the second silver plating portion 6 is desirably in the range of 2 to 7 μm together with the silver plating thickness of the wire bonding region 2. If the silver plating thickness of the wire bonding region 2 is less than 2 μm, the connection reliability with the wire is lowered, and if it exceeds 7 μm, the effect remains unchanged and the amount of silver used is increased.

以上説明したような所望の部分にめっきを施す方法は、従来のめっきマスク法による部分めっき方法を適用することができる。   As a method for plating a desired portion as described above, a partial plating method by a conventional plating mask method can be applied.

リードフレーム１に第２の銀めっき部６を形成した後は、図２（ａ）及び（ｂ）に示すように光半導体素子搭載領域３に光半導体素子７を搭載し、第２の銀めっき部６を介して、ワイヤ８により光半導体素子７とワイヤボンディング領域２を接続した後、封止樹脂９により所望の領域を被覆する。その後、図２（ｃ）に示すようにはんだ接合領域４と基板１０をはんだにて接合する。   After the second silver plating portion 6 is formed on the lead frame 1, the optical semiconductor element 7 is mounted on the optical semiconductor element mounting region 3 as shown in FIGS. 2A and 2B, and the second silver plating is performed. After connecting the optical semiconductor element 7 and the wire bonding region 2 with the wire 8 through the part 6, a desired region is covered with the sealing resin 9. Thereafter, as shown in FIG. 2C, the solder joint region 4 and the substrate 10 are joined by solder.

本発明に係る光半導体装置用リードフレームの一実施例を示す説明図で、（ａ）はその平面図、（ｂ）は（ａ）のＡ−Ａ’線に沿う断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is explanatory drawing which shows one Example of the lead frame for optical semiconductor devices based on this invention, (a) is the top view, (b) is sectional drawing which follows the A-A 'line of (a). 本発明に係る光半導体装置用リードフレームを用いた光半導体装置の一実施例を示す説明図で、（ａ）はその平面図、（ｂ）は光半導体装置の正面断面図であり、（ｃ）は光半導体装置を基板に実装した際の正面断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is explanatory drawing which shows one Example of the optical semiconductor device using the lead frame for optical semiconductor devices based on this invention, (a) is the top view, (b) is front sectional drawing of an optical semiconductor device, (c ) Is a front sectional view of the optical semiconductor device mounted on a substrate.

符号の説明Explanation of symbols

１ リードフレーム
２ ワイヤボンディング領域
３ 光半導体素子搭載領域
４ はんだ接合領域
５ 第１の銀めっき部
６ 第２の銀めっき部
７ 光半導体素子
８ ワイヤ
９ 封止樹脂
１０ 基板
１１ はんだ DESCRIPTION OF SYMBOLS 1 Lead frame 2 Wire bonding area | region 3 Optical semiconductor element mounting area | region 4 Solder joining area | region 5 1st silver plating part 6 2nd silver plating part 7 Optical semiconductor element 8 Wire 9 Sealing resin 10 Board | substrate 11 Solder

Claims (2)

発光素子とリードフレームを金属ワイヤで接続して、これらが透明樹脂で封止される、光半導体装置用リードフレームにおいて、該リードフレームに形成されたワイヤボンディング領域に２μｍ厚以上の銀めっきが形成され、ワイヤボンディング領域以外のめっきが必要な領域に０．３μｍ厚以上で、かつワイヤボンディング領域に形成された銀めっき厚より薄い銀めっきが形成されていることを特徴とする光半導体装置用リードフレーム。   In a lead frame for an optical semiconductor device in which a light emitting element and a lead frame are connected with a metal wire and these are sealed with a transparent resin, a silver plating of 2 μm or more is formed in a wire bonding region formed on the lead frame A lead for an optical semiconductor device, wherein a silver plating having a thickness of 0.3 μm or more and thinner than a silver plating thickness formed in the wire bonding region is formed in a region requiring plating other than the wire bonding region flame. 前記ワイヤボンディング領域以外のめっきが必要な領域が、光半導体素子搭載領域、樹脂封止領域、はんだ接合領域であることを特徴とする請求項１に記載の光半導体装置用リードフレーム。   2. The lead frame for an optical semiconductor device according to claim 1, wherein regions other than the wire bonding region that require plating are an optical semiconductor element mounting region, a resin sealing region, and a solder bonding region.
JP2006199096A 2006-07-21 2006-07-21 Lead frame for optical semiconductor device Pending JP2008028154A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102956597A (en) * 2012-11-20 2013-03-06 无锡市威海达机械制造有限公司 Lead frame structure
CN102956600A (en) * 2012-11-20 2013-03-06 无锡市威海达机械制造有限公司 Lead frame structure

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6017939A (en) * 1983-07-11 1985-01-29 Nec Corp Lead frame for semiconductor device
JPS61278158A (en) * 1985-06-03 1986-12-09 Toshiba Corp Lead frame for semiconductor device
JPH01257356A (en) * 1988-04-07 1989-10-13 Kobe Steel Ltd Lead frame for semiconductor
JPH04165659A (en) * 1990-10-30 1992-06-11 Nec Corp Lead frame for resin-sealed semiconductor device
JPH0722559A (en) * 1993-07-05 1995-01-24 Sharp Corp Lead frame

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6017939A (en) * 1983-07-11 1985-01-29 Nec Corp Lead frame for semiconductor device
JPS61278158A (en) * 1985-06-03 1986-12-09 Toshiba Corp Lead frame for semiconductor device
JPH01257356A (en) * 1988-04-07 1989-10-13 Kobe Steel Ltd Lead frame for semiconductor
JPH04165659A (en) * 1990-10-30 1992-06-11 Nec Corp Lead frame for resin-sealed semiconductor device
JPH0722559A (en) * 1993-07-05 1995-01-24 Sharp Corp Lead frame

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102956597A (en) * 2012-11-20 2013-03-06 无锡市威海达机械制造有限公司 Lead frame structure
CN102956600A (en) * 2012-11-20 2013-03-06 无锡市威海达机械制造有限公司 Lead frame structure

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