JPS60150832U - A/D conversion circuit - Google Patents
A/D conversion circuitInfo
- Publication number
- JPS60150832U JPS60150832U JP3746484U JP3746484U JPS60150832U JP S60150832 U JPS60150832 U JP S60150832U JP 3746484 U JP3746484 U JP 3746484U JP 3746484 U JP3746484 U JP 3746484U JP S60150832 U JPS60150832 U JP S60150832U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- voltages
- conversion circuit
- comparators
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のＡ／Ｄ変換回路を示すブロック図、第２
図はその入力アナログ信号を示す信号波形図、第３図は
その動作を説明するための特性図である。第４図は本考
案の一実施例を示すブロック図、第５図はその動作を説
明するための特性図である。
１１・・・第１電圧作成回路、１２・・・第２電圧作成
回路、Ｒ９−Ｒ１４−・・分圧抵抗、１３ａ〜１３ｇ・
・・電圧比較器、１４・・・バイナリデコーダ。Figure 1 is a block diagram showing a conventional A/D conversion circuit, Figure 2 is a block diagram showing a conventional A/D conversion circuit.
The figure is a signal waveform diagram showing the input analog signal, and FIG. 3 is a characteristic diagram for explaining its operation. FIG. 4 is a block diagram showing an embodiment of the present invention, and FIG. 5 is a characteristic diagram for explaining its operation. DESCRIPTION OF SYMBOLS 11... First voltage generation circuit, 12... Second voltage generation circuit, R9-R14-... Voltage division resistor, 13a to 13g.
...Voltage comparator, 14...Binary decoder.
Claims (1)
（ｎは２以上の自然数）の電圧比較器にアナログ信号を
入力し、この各比較器の出力をデコーダに入力してｎビ
ットのデジタル信号に変換する回路に於いて、操作開始
後暫くは上昇（下降）して行き、その後一定電圧に保持
される第１電圧の作成回路と、この第１電圧よりも常に
低（高）く前記操作開始後暫（は一定電圧に保持され、
その後上昇（下降）して行く第２電圧の作成回路と、前
記第１第２電圧間の電圧を一定比率で２ｎ−３個の電圧
に分割する分圧回路を設け、前記第１第２電圧作成回路
及び分圧回路の各出力電圧を前記各比較器の基準電圧と
して印加するようにしたことを特徴とするＡ／Ｄ変換回
路。An analog signal is input to 2''-1 voltage comparators (n is a natural number of 2 or more) to which different reference voltages are applied, and the output of each comparator is input to a decoder to generate an n-bit digital signal. In the circuit for converting to , there is a circuit for creating a first voltage that rises (falls) for a while after the start of operation and then is held at a constant voltage, and a circuit that generates a first voltage that is always lower (higher) than this first voltage. After starting, (is held at a constant voltage,
A circuit for creating a second voltage that subsequently increases (decreases) and a voltage dividing circuit that divides the voltage between the first and second voltages into 2n-3 voltages at a fixed ratio are provided, and the voltage between the first and second voltages is An A/D conversion circuit characterized in that each output voltage of the creation circuit and the voltage dividing circuit is applied as a reference voltage to each of the comparators.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3746484U JPS60150832U (en) | 1984-03-15 | 1984-03-15 | A/D conversion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3746484U JPS60150832U (en) | 1984-03-15 | 1984-03-15 | A/D conversion circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60150832U true JPS60150832U (en) | 1985-10-07 |
| JPH0528833Y2 JPH0528833Y2 (en) | 1993-07-23 |
Family
ID=30543566
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3746484U Granted JPS60150832U (en) | 1984-03-15 | 1984-03-15 | A/D conversion circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60150832U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5813738U (en) * | 1981-07-16 | 1983-01-28 | 富士通テン株式会社 | analog digital converter |
| JPS5840942U (en) * | 1981-09-11 | 1983-03-17 | 富士通テン株式会社 | analog digital converter |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2614244A1 (en) * | 1976-04-02 | 1977-10-20 | Bayer Ag | CYCLOALIPHATIC TRIAMINES |
| JPS5813738B2 (en) * | 1977-07-15 | 1983-03-15 | 川崎重工業株式会社 | Exhaust pipe for 2-stroke engine |
-
1984
- 1984-03-15 JP JP3746484U patent/JPS60150832U/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5813738U (en) * | 1981-07-16 | 1983-01-28 | 富士通テン株式会社 | analog digital converter |
| JPS5840942U (en) * | 1981-09-11 | 1983-03-17 | 富士通テン株式会社 | analog digital converter |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0528833Y2 (en) | 1993-07-23 |
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