JPS5840942U - analog digital converter - Google Patents

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はＡＤ変換器の概要を示すブロック図、第２図お
よび第５図は第１図の動作説明用の波形図およびグラフ
、第３図および第４図は第１図の要部を説明する回路図
、第６図は第１図の電源回路を示す回路図、第７図はそ
の特性図、第８図および第９図は第６図で生じる問題の
説明図、第１０図および第１１図は本考案の原理を示す
特性図および１１７２図、第１２図は本考案の実施例を
示す回路図である。 図面で■。０は電源電圧、ＶＲＥＩｉ”は基準電圧、Ｖ
ｉｎは入力電圧、Ｃ）ｌはキャパシタ、ＩＲ−よ定電流
、ＶＢはセンサ電源電圧、Ｔ□ＥＦ、　Ｔｉｎ、　ＴＳ
は放電時間、Ｑ３．　Ｒ１，Ｒ２，、Ｉ）、、　Ｉ）２
．　ｏｐ３はＶＲい＋　ＶＢの制御回路である。 第４図 第１２図Figure 1 is a block diagram showing an overview of the AD converter, Figures 2 and 5 are waveform diagrams and graphs for explaining the operation of Figure 1, and Figures 3 and 4 are main parts of Figure 1. 6 is a circuit diagram showing the power supply circuit of FIG. 1, FIG. 7 is a characteristic diagram thereof, FIGS. 8 and 9 are explanatory diagrams of problems occurring in FIG. 6, and FIGS. FIG. 11 is a characteristic diagram showing the principle of the present invention, and FIG. 1172 and FIG. 12 are circuit diagrams showing an embodiment of the present invention. ■ In the drawing. 0 is the power supply voltage, VREIi'' is the reference voltage, V
in is the input voltage, C)l is the capacitor, IR- is the constant current, VB is the sensor power supply voltage, T□EF, Tin, TS
is the discharge time, Q3. R1, R2,, I),, I)2
．． op3 is a control circuit for VR+VB. Figure 4 Figure 12

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電源電圧、基準電圧、およびセンサからの入力電圧を受
け、キャパシタを充電し次いで該電源電圧および基準電
圧で定まる定電流で放電させてその放電時間から入力ア
ナログ電圧のデジタル値を求めるシングルスロープ型の
アナログデジタル変換器において、電源電圧が一定値を
保持できない低電圧範囲では、前記基準電圧は電源電圧
と共に低下させそしてセンサの電源電圧はなお可及的に
一定に保持する回路を設けたことを特徴とするアナログ
デジタル変換回路。A single-slope type that receives a power supply voltage, a reference voltage, and an input voltage from a sensor, charges a capacitor, then discharges it with a constant current determined by the power supply voltage and reference voltage, and calculates the digital value of the input analog voltage from the discharge time. In the analog-to-digital converter, in a low voltage range where the power supply voltage cannot be maintained at a constant value, the reference voltage is lowered along with the power supply voltage, and a circuit is provided to maintain the power supply voltage of the sensor as constant as possible. Analog-to-digital conversion circuit.