JPS5982737A - 半導体装置の電極部構造およびその製造方法 - Google Patents

半導体装置の電極部構造およびその製造方法

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Publication number
JPS5982737A
JPS5982737A JP57192553A JP19255382A JPS5982737A JP S5982737 A JPS5982737 A JP S5982737A JP 57192553 A JP57192553 A JP 57192553A JP 19255382 A JP19255382 A JP 19255382A JP S5982737 A JPS5982737 A JP S5982737A
Authority
JP
Japan
Prior art keywords
gold
layer
electrode
bonding
alloy layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57192553A
Other languages
English (en)
Other versions
JPS643340B2 (ja
Inventor
Hitoshi Nagano
永野　仁
Toshiro Kobayashi
小林　寿郎
Tadashi Matsumoto
忠 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
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Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP57192553A priority Critical patent/JPS5982737A/ja
Publication of JPS5982737A publication Critical patent/JPS5982737A/ja
Publication of JPS643340B2 publication Critical patent/JPS643340B2/ja
Granted legal-status Critical Current

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は、半導体集積回路等のボンディング用電極部の
構造とその製造方法に関するものである。
従来、この種の電極部は、第１図に示すように、半導体
基板１上に形成された、例えば二酸化シリコン（５ｉ０
２　）層のような絶縁層２を介し、例えばアルミニウム
（Ａｌ）からなるボンディング用電極３を形成し、さら
に、半導体特性の安定化と配線金属の保護のための絶縁
膜４で、後に金属細線を接続すべき箇所を除いて、覆わ
れた構造が一般的であった。そして、外部回路との電気
的接続は、例えば金（Ａｕ　）細線５を熱圧着技術によ
シｋｌからなるボンディング用電極乙に接着して行なわ
れていた。
このため、Ａｕ細線５を電極３に接着した後に。
２００〜３００℃程度の熱処理工程を経た場合、Ａｕ細
線とＡｌ電極の各金属が反応し、Ａｕ　ＡＺ　２、Ａｕ
　２　Ａ１等の合金が不均一に形成されてしまい、これ
によりＡ／層中に空孔が発生し、電気的抵抗が増大する
欠点および上記合金層と半導体基板上の絶縁層との接着
強度が小さいため、Ａｕ細線が半導体基板のボンディン
グ用電極からはく離してしまう欠点等があった。
さらに、本半導体素子を十分な気密封止を行々わ力いで
使用した場合には、電極部が保護用絶縁膜で覆われてい
す、露出しているｋｌ電極部が、例えば水分等により容
易に腐食されてしまうという欠点があった。
本発明はこれらの欠点を解消するため、ボンデインク用
の新たな電極部構造を提供するものであり、以下図面に
ついて詳細に説明する。
第２図は本発明の一実施例の断面図であって、１１は半
導体基板、１２は絶縁層、１３はポリシリコン層、１４
はＡ４−　Ａｕ合金層、１５は保護用絶縁膜、１６はＡ
ｕ細線である。このような半導体装置は従来の同種装置
の製造技術によって容易に製造できる。
本発明の電極構造は以上のようになっているだめ、ｋｌ
　−Ａｕ合金層１４はポリシリコン層１３と広い面積で
接合しており、さらに両者の境界面においては、シリコ
ン、金、アルミニウムの元素が互いに反応し合い、機械
的強度を大きくしている。
したがって、従来、Ａｌ配線−Ａｕ細線の接合で信頼性
上問題とされていたボンディング不良は全く発生しない
という利点がある。
なお、Ａ４−　Ａｕ合金の電気抵抗率は、例えば、Ａｕ
　２　ｋｌテ１−３　Ｘ　１０　　Ω−ｃｍ％Ａ、ｕ４
Ａｌで６．８×１０−５Ω・ｃｍ　と一般の金属と同程
度であり、得られる半導体素子の電気的特性には全く影
響を及ぼさないものである。
ところで、Ａｌは、例えば水分の付着等によって極めて
短期間のうちに腐食されるのに対して、Ａｕ　は極めて
高い耐食性を有しており、さらに、Ａｕ　−Ａ１合金に
ついても純Ａｌに比して、著るしい耐腐食性を有してい
ることはよく知られている。
したがって、第２図に示す本発明の構造は、配線金属の
耐腐食性の観点からも、従来構造に比べ、大き々利点を
有しているものである。とくに、現在広く使用されてい
るプラスチックモールド集積回路素子における故障がボ
ンディング部のＡ、１層の腐食によって生じている事実
から、本発明の構造は、集積回路故障対策として犬き々
利点をもたらすものである。
一方、本構造を作成するには、周知の方法により半導体
基板１１上に絶縁層１２、ポリシリコン層１３を形成し
た後、Ａ７とＡｕの少なくとも２層を、最終的にＡ４−
　Ａｕ合金層１４が所定の形状になるように、例えば真
空蒸着とホトリソグラフィーによ膜形成する。次に、や
はシ周知の方法により保護用絶縁膜１５を形成する。つ
いで、外部回路との接続用としてＡｕ細線１６をすでに
形成したＡｕ−Ａｌ多層膜上に熱圧着等により接着する
。以上の工程が終了した後に、２００〜３００℃の温度
で数分〜数十分間の熱処理を行なうことにより、ＡＩ　
−Ａｕ合金層１４が形成され、極めて容易に本発明の電
極構造を形成することができる。
第３図は本発明の他の実施例の断面図であり、やや厚く
形成したＡ１層１７の両端に設けた保護用絶縁膜１５の
間のＡ１層上に金属をやや厚く設けて熱処理し、ｋｌ　
−Ａｕ合金層１４が図示のようにでき、両端にｋ１層１
７が存在する構造を示す。本実施例の効果は上記の第２
図の実施例と全く同じである。
第４図は本発明のさらに他の実施例であシ、上述の第６
図に述べた実施例において、Ａｕ層をより薄く形成し、
合金化熱処理を十分に施して保護用絶縁膜１５に挾まれ
た部分を完全にＡｌ−Ａｕ合金層１４としたものであり
、その効果は上述の第２図の実施例と全く同じである。
り強度の実測データであり、本発明の製法により引張り
強度が太きくな、ることを示すものである。
ここで、熱処理時間を４０時間としたが、合金化のため
には上述のようにせいぜい数十分程度の熱処理でよいが
、このデータはこれよりも長時間の熱処理を行なっても
悪影響のないことも示している。
以上説明したように、本発明の電極構造によれば、Ａｃ
ｔたはＡｕを主成分とする金属細線の電極への接着不良
、あるいは電極金属の腐食が防止でき、さらに、金属細
線の引張り強度が増大する等の効果があシ、半導体集積
回路の長寿命化、故障率の低下につながる利点がある。
【図面の簡単な説明】
第１図は従来の半導体装置の電極構造の断面図、第２図
、第３図、第４図はそれぞれ本発明の半導体装置の電極
構造の断面図、第５図は本発明の製法により得た半導体
装置の電極部に接続した金属細線の引張り強度の実測デ
ータを示す図である。 図において、 １．１１・・・半導体基板　２．１２・・・絶縁層６．
１７・・・アルミニウム電極 ４．１５・・・保護用絶縁膜 ５．１６・・・金細線　　　１６・・・ポリシリコン層
１４・・・アルミニウムー金合金層 特許出願人　　日本電信電話公社 代理人弁理士　　中村純之助

Claims (2)

    【特許請求の範囲】
  1. （１）半導体素子と外部回路とを金属細線で接続する半
    導体装置において、該半導体素子基板上に設けた絶縁膜
    上にポリシリコン層および該ポリシリコン層に接してア
    ルミニウムと金とを主成分とする合金層を有し、該合金
    層上に金または金を主成分とする金属細線が接着されて
    なることを特徴とする半導体装置の電極部構造。
  2. （２）半導体素子基板上に絶縁膜を介してポリシリコン
    層および該ポリシリコン層に接してアルミニウムと金の
    少なくとも２層からなる多層金属膜を形成した後、該多
    層金属膜上に金または金を主成分とする金属細線を接着
    し、しかる後、加熱処理により少なくとも前記金属細線
    下の前記多層金属膜を合金化することを特徴とする半導
    体装置の電極部構造の製造方法。
JP57192553A 1982-11-04 1982-11-04 半導体装置の電極部構造およびその製造方法 Granted JPS5982737A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57192553A JPS5982737A (ja) 1982-11-04 1982-11-04 半導体装置の電極部構造およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57192553A JPS5982737A (ja) 1982-11-04 1982-11-04 半導体装置の電極部構造およびその製造方法

Publications (2)

Publication Number Publication Date
JPS5982737A true JPS5982737A (ja) 1984-05-12
JPS643340B2 JPS643340B2 (ja) 1989-01-20

Family

ID=16293191

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57192553A Granted JPS5982737A (ja) 1982-11-04 1982-11-04 半導体装置の電極部構造およびその製造方法

Country Status (1)

Country Link
JP (1) JPS5982737A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6472304B2 (en) * 1999-01-23 2002-10-29 Agere Systems Inc. Wire bonding to copper

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6472304B2 (en) * 1999-01-23 2002-10-29 Agere Systems Inc. Wire bonding to copper

Also Published As

Publication number Publication date
JPS643340B2 (ja) 1989-01-20

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