JPS5982737A - Structure of electrode section of semiconductor device and its manufacture - Google Patents
Structure of electrode section of semiconductor device and its manufactureInfo
- Publication number
- JPS5982737A JPS5982737A JP57192553A JP19255382A JPS5982737A JP S5982737 A JPS5982737 A JP S5982737A JP 57192553 A JP57192553 A JP 57192553A JP 19255382 A JP19255382 A JP 19255382A JP S5982737 A JPS5982737 A JP S5982737A
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- gold
- layer
- electrode
- bonding
- alloy layer
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Abstract
Description
【発明の詳細な説明】
本発明は、半導体集積回路等のボンディング用電極部の
構造とその製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a structure of a bonding electrode portion of a semiconductor integrated circuit or the like and a method of manufacturing the same.
従来、この種の電極部は、第1図に示すように、半導体
基板1上に形成された、例えば二酸化シリコン(5i0
2 )層のような絶縁層2を介し、例えばアルミニウム
(Al)からなるボンディング用電極3を形成し、さら
に、半導体特性の安定化と配線金属の保護のための絶縁
膜4で、後に金属細線を接続すべき箇所を除いて、覆わ
れた構造が一般的であった。そして、外部回路との電気
的接続は、例えば金(Au )細線5を熱圧着技術によ
シklからなるボンディング用電極乙に接着して行なわ
れていた。Conventionally, as shown in FIG.
2) A bonding electrode 3 made of aluminum (Al), for example, is formed through an insulating layer 2 such as a layer 2), and an insulating film 4 for stabilizing the semiconductor characteristics and protecting the wiring metal is formed later on to form a thin metal wire. Covered structures were common, except where they were to be connected. Electrical connection with an external circuit is made by bonding, for example, a thin gold (Au) wire 5 to a bonding electrode B made of silver by thermocompression bonding technology.
このため、Au細線5を電極3に接着した後に。Therefore, after adhering the Au thin wire 5 to the electrode 3.
200〜300℃程度の熱処理工程を経た場合、Au細
線とAl電極の各金属が反応し、Au AZ 2、Au
2 A1等の合金が不均一に形成されてしまい、これ
によりA/層中に空孔が発生し、電気的抵抗が増大する
欠点および上記合金層と半導体基板上の絶縁層との接着
強度が小さいため、Au細線が半導体基板のボンディン
グ用電極からはく離してしまう欠点等があった。When subjected to a heat treatment process at about 200 to 300°C, the Au thin wire and each metal of the Al electrode react, forming Au AZ 2, Au
2. Alloys such as A1 are formed non-uniformly, resulting in voids in the A/layer, which increases electrical resistance and reduces the adhesive strength between the alloy layer and the insulating layer on the semiconductor substrate. Because of their small size, there were drawbacks such as the fact that the Au thin wires could peel off from the bonding electrodes of the semiconductor substrate.
さらに、本半導体素子を十分な気密封止を行々わ力いで
使用した場合には、電極部が保護用絶縁膜で覆われてい
す、露出しているkl電極部が、例えば水分等により容
易に腐食されてしまうという欠点があった。Furthermore, if this semiconductor element is used with sufficient airtight sealing, the electrode portions may be covered with a protective insulating film, and the exposed kl electrode portions may be easily exposed to water, for example. The disadvantage was that it was corroded.
本発明はこれらの欠点を解消するため、ボンデインク用
の新たな電極部構造を提供するものであり、以下図面に
ついて詳細に説明する。In order to eliminate these drawbacks, the present invention provides a new electrode part structure for bonde ink, and will be described in detail below with reference to the drawings.
第2図は本発明の一実施例の断面図であって、11は半
導体基板、12は絶縁層、13はポリシリコン層、14
はA4− Au合金層、15は保護用絶縁膜、16はA
u細線である。このような半導体装置は従来の同種装置
の製造技術によって容易に製造できる。FIG. 2 is a cross-sectional view of one embodiment of the present invention, in which 11 is a semiconductor substrate, 12 is an insulating layer, 13 is a polysilicon layer, and 14 is a sectional view of an embodiment of the present invention.
is A4-Au alloy layer, 15 is a protective insulating film, 16 is A
It is a thin line. Such a semiconductor device can be easily manufactured using conventional manufacturing techniques for similar devices.
本発明の電極構造は以上のようになっているだめ、kl
−Au合金層14はポリシリコン層13と広い面積で
接合しており、さらに両者の境界面においては、シリコ
ン、金、アルミニウムの元素が互いに反応し合い、機械
的強度を大きくしている。The electrode structure of the present invention is as described above.
The -Au alloy layer 14 is joined to the polysilicon layer 13 over a wide area, and at the interface between the two, the elements of silicon, gold, and aluminum react with each other to increase mechanical strength.
したがって、従来、Al配線−Au細線の接合で信頼性
上問題とされていたボンディング不良は全く発生しない
という利点がある。Therefore, there is an advantage that bonding defects, which have conventionally been a reliability problem in bonding Al wiring and Au thin wire, do not occur at all.
なお、A4− Au合金の電気抵抗率は、例えば、Au
2 klテ1−3 X 10 Ω−cm%A、u4
Alで6.8×10−5Ω・cm と一般の金属と同程
度であり、得られる半導体素子の電気的特性には全く影
響を及ぼさないものである。Note that the electrical resistivity of the A4-Au alloy is, for example, Au
2 klte1-3 x 10 Ω-cm%A, u4
It is 6.8×10 −5 Ω·cm 2 for Al, which is comparable to that of general metals, and has no effect on the electrical characteristics of the resulting semiconductor device.
ところで、Alは、例えば水分の付着等によって極めて
短期間のうちに腐食されるのに対して、Au は極めて
高い耐食性を有しており、さらに、Au −A1合金に
ついても純Alに比して、著るしい耐腐食性を有してい
ることはよく知られている。By the way, Al is corroded in a very short period of time due to adhesion of moisture, etc., whereas Au has extremely high corrosion resistance, and furthermore, Au-A1 alloy has corrosion resistance compared to pure Al. It is well known that it has remarkable corrosion resistance.
したがって、第2図に示す本発明の構造は、配線金属の
耐腐食性の観点からも、従来構造に比べ、大き々利点を
有しているものである。とくに、現在広く使用されてい
るプラスチックモールド集積回路素子における故障がボ
ンディング部のA、1層の腐食によって生じている事実
から、本発明の構造は、集積回路故障対策として犬き々
利点をもたらすものである。Therefore, the structure of the present invention shown in FIG. 2 has a great advantage over the conventional structure also from the viewpoint of corrosion resistance of the wiring metal. In particular, in light of the fact that failures in plastic molded integrated circuit elements that are currently widely used are caused by corrosion of the bonding layer A, the structure of the present invention provides significant advantages as a countermeasure against integrated circuit failures. It is.
一方、本構造を作成するには、周知の方法により半導体
基板11上に絶縁層12、ポリシリコン層13を形成し
た後、A7とAuの少なくとも2層を、最終的にA4−
Au合金層14が所定の形状になるように、例えば真
空蒸着とホトリソグラフィーによ膜形成する。次に、や
はシ周知の方法により保護用絶縁膜15を形成する。つ
いで、外部回路との接続用としてAu細線16をすでに
形成したAu−Al多層膜上に熱圧着等により接着する
。以上の工程が終了した後に、200〜300℃の温度
で数分〜数十分間の熱処理を行なうことにより、AI
−Au合金層14が形成され、極めて容易に本発明の電
極構造を形成することができる。On the other hand, in order to create this structure, after forming an insulating layer 12 and a polysilicon layer 13 on a semiconductor substrate 11 by a well-known method, at least two layers of A7 and Au are finally applied to A4-
The Au alloy layer 14 is formed into a predetermined shape by, for example, vacuum evaporation and photolithography. Next, a protective insulating film 15 is formed by a well-known method. Next, a thin Au wire 16 for connection to an external circuit is bonded onto the already formed Au--Al multilayer film by thermocompression bonding or the like. After the above steps are completed, heat treatment at a temperature of 200 to 300°C for several minutes to several tens of minutes allows AI
-Au alloy layer 14 is formed, and the electrode structure of the present invention can be formed very easily.
第3図は本発明の他の実施例の断面図であり、やや厚く
形成したA1層17の両端に設けた保護用絶縁膜15の
間のA1層上に金属をやや厚く設けて熱処理し、kl
−Au合金層14が図示のようにでき、両端にk1層1
7が存在する構造を示す。本実施例の効果は上記の第2
図の実施例と全く同じである。FIG. 3 is a cross-sectional view of another embodiment of the present invention, in which a metal is provided slightly thickly on the A1 layer between the protective insulating films 15 provided at both ends of the A1 layer 17 formed slightly thicker, and heat treated. kl
- Au alloy layer 14 is formed as shown in the figure, and k1 layer 1 is formed on both ends.
7 is present. The effect of this embodiment is the second effect mentioned above.
This is exactly the same as the embodiment shown in the figure.
第4図は本発明のさらに他の実施例であシ、上述の第6
図に述べた実施例において、Au層をより薄く形成し、
合金化熱処理を十分に施して保護用絶縁膜15に挾まれ
た部分を完全にAl−Au合金層14としたものであり
、その効果は上述の第2図の実施例と全く同じである。FIG. 4 shows still another embodiment of the present invention, and shows the sixth embodiment described above.
In the embodiment described in the figure, the Au layer is formed thinner,
The portion sandwiched between the protective insulating films 15 is completely formed into the Al--Au alloy layer 14 through sufficient alloying heat treatment, and the effect is exactly the same as that of the embodiment shown in FIG. 2 described above.
り強度の実測データであり、本発明の製法により引張り
強度が太きくな、ることを示すものである。This is actually measured data on tensile strength, and shows that the manufacturing method of the present invention increases the tensile strength.
ここで、熱処理時間を40時間としたが、合金化のため
には上述のようにせいぜい数十分程度の熱処理でよいが
、このデータはこれよりも長時間の熱処理を行なっても
悪影響のないことも示している。Here, the heat treatment time was set at 40 hours, but as mentioned above, heat treatment for at most several tens of minutes is sufficient for alloying, but this data shows that even if heat treatment is performed for a longer time, there is no adverse effect. It also shows that.
以上説明したように、本発明の電極構造によれば、Ac
tたはAuを主成分とする金属細線の電極への接着不良
、あるいは電極金属の腐食が防止でき、さらに、金属細
線の引張り強度が増大する等の効果があシ、半導体集積
回路の長寿命化、故障率の低下につながる利点がある。As explained above, according to the electrode structure of the present invention, Ac
It can prevent poor adhesion of thin metal wires mainly composed of Au or Au to electrodes or corrosion of the electrode metal, and has the effect of increasing the tensile strength of the thin metal wires, extending the life of semiconductor integrated circuits. This has the advantage of lowering the failure rate.
第1図は従来の半導体装置の電極構造の断面図、第2図
、第3図、第4図はそれぞれ本発明の半導体装置の電極
構造の断面図、第5図は本発明の製法により得た半導体
装置の電極部に接続した金属細線の引張り強度の実測デ
ータを示す図である。
図において、
1.11・・・半導体基板 2.12・・・絶縁層6.
17・・・アルミニウム電極
4.15・・・保護用絶縁膜
5.16・・・金細線 16・・・ポリシリコン層
14・・・アルミニウムー金合金層
特許出願人 日本電信電話公社
代理人弁理士 中村純之助FIG. 1 is a cross-sectional view of the electrode structure of a conventional semiconductor device, FIGS. 2, 3, and 4 are cross-sectional views of the electrode structure of the semiconductor device of the present invention, and FIG. 5 is a cross-sectional view of the electrode structure of the semiconductor device of the present invention. FIG. 2 is a diagram showing actual measurement data of the tensile strength of a thin metal wire connected to an electrode portion of a semiconductor device. In the figure, 1.11...Semiconductor substrate 2.12...Insulating layer 6.
17... Aluminum electrode 4. 15... Protective insulating film 5. 16... Gold thin wire 16... Polysilicon layer 14... Aluminum-gold alloy layer Patent applicant Nippon Telegraph and Telephone Public Corporation representative patent attorney Professor Junnosuke Nakamura
Claims (2)
導体装置において、該半導体素子基板上に設けた絶縁膜
上にポリシリコン層および該ポリシリコン層に接してア
ルミニウムと金とを主成分とする合金層を有し、該合金
層上に金または金を主成分とする金属細線が接着されて
なることを特徴とする半導体装置の電極部構造。(1) In a semiconductor device in which a semiconductor element and an external circuit are connected by a thin metal wire, a polysilicon layer is formed on an insulating film provided on the semiconductor element substrate, and aluminum and gold are mainly used in contact with the polysilicon layer. 1. An electrode part structure for a semiconductor device, comprising: an alloy layer having an alloy layer, and gold or a thin metal wire containing gold as a main component adhered to the alloy layer.
層および該ポリシリコン層に接してアルミニウムと金の
少なくとも2層からなる多層金属膜を形成した後、該多
層金属膜上に金または金を主成分とする金属細線を接着
し、しかる後、加熱処理により少なくとも前記金属細線
下の前記多層金属膜を合金化することを特徴とする半導
体装置の電極部構造の製造方法。(2) After forming a polysilicon layer and a multilayer metal film consisting of at least two layers of aluminum and gold in contact with the polysilicon layer through an insulating film on a semiconductor element substrate, a layer of gold or gold is formed on the multilayer metal film. 1. A method for manufacturing an electrode part structure of a semiconductor device, comprising: adhering thin metal wires containing as a main component, and then alloying at least the multilayer metal film under the thin metal wires by heat treatment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57192553A JPS5982737A (en) | 1982-11-04 | 1982-11-04 | Structure of electrode section of semiconductor device and its manufacture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57192553A JPS5982737A (en) | 1982-11-04 | 1982-11-04 | Structure of electrode section of semiconductor device and its manufacture |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5982737A true JPS5982737A (en) | 1984-05-12 |
JPS643340B2 JPS643340B2 (en) | 1989-01-20 |
Family
ID=16293191
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57192553A Granted JPS5982737A (en) | 1982-11-04 | 1982-11-04 | Structure of electrode section of semiconductor device and its manufacture |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5982737A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6472304B2 (en) * | 1999-01-23 | 2002-10-29 | Agere Systems Inc. | Wire bonding to copper |
-
1982
- 1982-11-04 JP JP57192553A patent/JPS5982737A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6472304B2 (en) * | 1999-01-23 | 2002-10-29 | Agere Systems Inc. | Wire bonding to copper |
Also Published As
Publication number | Publication date |
---|---|
JPS643340B2 (en) | 1989-01-20 |
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