JPS59176979U - Abnormal characteristic detection circuit - Google Patents
Abnormal characteristic detection circuitInfo
- Publication number
- JPS59176979U JPS59176979U JP7123083U JP7123083U JPS59176979U JP S59176979 U JPS59176979 U JP S59176979U JP 7123083 U JP7123083 U JP 7123083U JP 7123083 U JP7123083 U JP 7123083U JP S59176979 U JPS59176979 U JP S59176979U
- Authority
- JP
- Japan
- Prior art keywords
- input terminal
- detection circuit
- characteristic detection
- differential amplifier
- abnormal characteristic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、本考案の二実施例を示す回路図、第２図ａ〜
Ｃは、被試験物とその入力信号、及び入出力電圧特性の
一例を示す図、第３図ａ， ｂは入出力特性に異常の
ある場合の入出力電圧特性を示す図、第４図ａ − ｄ
”は本考案の異常特性検出回路の動作タイミングチャー
ト図である。
なお、図において、１は信号入力端子、２はローパスフ
ィルタ、３は差動増幅器、４は基準電源、５はコンパレ
ータ、６はツーリップフロップである。FIG. 1 is a circuit diagram showing two embodiments of the present invention, and FIG.
C is a diagram showing an example of the test object, its input signal, and input/output voltage characteristics; Figures 3a and b are diagrams showing input/output voltage characteristics when there is an abnormality in the input/output characteristics; Figure 4a is a diagram showing an example of the input/output voltage characteristics. -d
" is an operation timing chart of the abnormal characteristic detection circuit of the present invention. In the figure, 1 is a signal input terminal, 2 is a low-pass filter, 3 is a differential amplifier, 4 is a reference power supply, 5 is a comparator, and 6 is a It is a two-rip flop.
Claims (1)
源とコンパレータとフリップフロップから構成され、前
記入力端子を前記差動増幅器の一方の入力端子及び前記
ローパスフィルタの入力端子に、それぞれ接続し、前記
ローパスフィルタの出力端子と前記差動増幅器の他方の
入力端子とを接続し、前記差動増幅器の出力端子を前記
コンパレータの一方の入力端子へ接続し、他方の入力端
子を前記基準電源と接続し、前記コンパレータの出力端
子を前記フリップフロップのセット端子と接続した事を
特徴とする特許It is composed of a signal input terminal, a low-pass filter, a differential amplifier, a reference power supply, a comparator, and a flip-flop, and the input terminal is connected to one input terminal of the differential amplifier and the input terminal of the low-pass filter, respectively. connecting the output terminal of the filter and the other input terminal of the differential amplifier, connecting the output terminal of the differential amplifier to one input terminal of the comparator, and connecting the other input terminal to the reference power supply; A patent characterized in that the output terminal of the comparator is connected to the set terminal of the flip-flop.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7123083U JPS59176979U (en) | 1983-05-13 | 1983-05-13 | Abnormal characteristic detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7123083U JPS59176979U (en) | 1983-05-13 | 1983-05-13 | Abnormal characteristic detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59176979U true JPS59176979U (en) | 1984-11-27 |
Family
ID=30201379
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7123083U Pending JPS59176979U (en) | 1983-05-13 | 1983-05-13 | Abnormal characteristic detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59176979U (en) |
-
1983
- 1983-05-13 JP JP7123083U patent/JPS59176979U/en active Pending
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