JPS59171427U - Monostable multivibrator circuit - Google Patents

Monostable multivibrator circuit

Info

Publication number
JPS59171427U
JPS59171427U JP6548883U JP6548883U JPS59171427U JP S59171427 U JPS59171427 U JP S59171427U JP 6548883 U JP6548883 U JP 6548883U JP 6548883 U JP6548883 U JP 6548883U JP S59171427 U JPS59171427 U JP S59171427U
Authority
JP
Japan
Prior art keywords
monostable multivibrator
multivibrator circuit
inverting input
input terminal
supplying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6548883U
Other languages
Japanese (ja)
Other versions
JPH0227632Y2 (en
Inventor
能勢 忠司
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP6548883U priority Critical patent/JPS59171427U/en
Publication of JPS59171427U publication Critical patent/JPS59171427U/en
Application granted granted Critical
Publication of JPH0227632Y2 publication Critical patent/JPH0227632Y2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は単安定マルチバイブレータ回路の一例を示す回
路図、第2図は本考案による単安定マルチバイブレータ
回路の一実施例を示す回路図である。 −1・・・・・・コンデンサ、2.6.9・・曲コンデ
ンサ、2、 5. 7. 8. 10・・・・・・抵抗
、3・・・・・・ダイオ−ド、4・・・・・・演算増幅
器。
FIG. 1 is a circuit diagram showing an example of a monostable multivibrator circuit, and FIG. 2 is a circuit diagram showing an embodiment of the monostable multivibrator circuit according to the present invention. -1... Capacitor, 2.6.9... Curved capacitor, 2, 5. 7. 8. 10...Resistor, 3...Diode, 4...Operation amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 演算増幅器の反転入力端に基準電圧を供給するとともに
、出力端との間にタイミングコンデンサが接続された非
反転入力端に正極性の入力信号を供給してトリガする単
安定マルチバイブレータ回路に於いて、前記タイミング
コンデンサに対して直列に抵抗を接続することにより、
非反転入力端の瞬時インピーダンスの低下を防止してト
リガを掛けやすくするとともに幅の狭いパルス出力が得
られ之ようにした単安定マルチバイブレータ回路。
In a monostable multivibrator circuit that is triggered by supplying a reference voltage to the inverting input terminal of an operational amplifier and supplying a positive input signal to the non-inverting input terminal with a timing capacitor connected between it and the output terminal. , by connecting a resistor in series with the timing capacitor,
A monostable multivibrator circuit that prevents a drop in instantaneous impedance at the non-inverting input terminal, making it easier to apply a trigger and providing a narrow pulse output.
JP6548883U 1983-04-30 1983-04-30 Monostable multivibrator circuit Granted JPS59171427U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6548883U JPS59171427U (en) 1983-04-30 1983-04-30 Monostable multivibrator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6548883U JPS59171427U (en) 1983-04-30 1983-04-30 Monostable multivibrator circuit

Publications (2)

Publication Number Publication Date
JPS59171427U true JPS59171427U (en) 1984-11-16
JPH0227632Y2 JPH0227632Y2 (en) 1990-07-25

Family

ID=30195688

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6548883U Granted JPS59171427U (en) 1983-04-30 1983-04-30 Monostable multivibrator circuit

Country Status (1)

Country Link
JP (1) JPS59171427U (en)

Also Published As

Publication number Publication date
JPH0227632Y2 (en) 1990-07-25

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