JPS5826209U - bias circuit - Google Patents

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来のバイアス回路を示す回路図、第２図は本
考案に係るバイアス回路の実施例を示す回路図である。 １：負帰還端子、２：定電圧回路の出力端、Ａ：定　　
。 電圧回路、Ｑ、、　Ｑ５：エミッタフォロワのトランジ
スタ、Ｒ１，Ｒ２：ベースバイアス抵抗。FIG. 1 is a circuit diagram showing a conventional bias circuit, and FIG. 2 is a circuit diagram showing an embodiment of the bias circuit according to the present invention. 1: Negative feedback terminal, 2: Output terminal of constant voltage circuit, A: Constant
. Voltage circuit, Q, Q5: Emitter follower transistor, R1, R2: Base bias resistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 負帰還形式による定電圧回路と２以上の同特性のエミッ
タフォロワとを備え、夫々のエミッタフォロワのベース
バイアス抵抗の他端は共通に接続されると共に前記定電
圧回路の出力端に接続され、少な（とも１のエミッタフ
ォロワは交流信号の入出力端子を有し、他のエミッタフ
ォロワはそのエミッタが前記定電圧回路の負還端子に接
続されていることを特徴とするバイアス回路。It is equipped with a negative feedback type constant voltage circuit and two or more emitter followers having the same characteristics, and the other end of the base bias resistor of each emitter follower is connected in common and connected to the output terminal of the constant voltage circuit. (A bias circuit characterized in that one of the emitter followers has an input/output terminal for an AC signal, and the emitters of the other emitter followers are connected to the negative feedback terminal of the constant voltage circuit.