JPS5988922U - differential amplifier - Google Patents

differential amplifier

Info

Publication number
JPS5988922U
JPS5988922U JP18451182U JP18451182U JPS5988922U JP S5988922 U JPS5988922 U JP S5988922U JP 18451182 U JP18451182 U JP 18451182U JP 18451182 U JP18451182 U JP 18451182U JP S5988922 U JPS5988922 U JP S5988922U
Authority
JP
Japan
Prior art keywords
differential amplifier
amplifier
differential
output
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18451182U
Other languages
Japanese (ja)
Inventor
朝彦 野上
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP18451182U priority Critical patent/JPS5988922U/en
Publication of JPS5988922U publication Critical patent/JPS5988922U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来の差動アンプの回路図、第２図はアンプの
ミラー効果による影響を説明する図、第。 ３図は第１図の回路のミラー効果を考慮した等価回路図
、第４図、第５図及び第６図は本考案の各実施例を示す
回路図である。 主要部分の符号の説明、１，２・・・差動トランジスタ
、３・・・定電流源、４，５・・・カレントミラートラ
ンジスタ、７・・・ベース接地トランジス゛り。FIG. 1 is a circuit diagram of a conventional differential amplifier, and FIG. 2 is a diagram illustrating the influence of the mirror effect on the amplifier. FIG. 3 is an equivalent circuit diagram of the circuit of FIG. 1 taking into account the Miller effect, and FIGS. 4, 5, and 6 are circuit diagrams showing each embodiment of the present invention. Explanation of symbols of main parts: 1, 2... differential transistor, 3... constant current source, 4, 5... current mirror transistor, 7... common base transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] カレシトミラー負荷を有する差動アンプであって、差動
トランジスタの出力端にこの出力を入力とするベース接
地型式のアンプを付加したことを特徴とする差動アンプ
。1. A differential amplifier having a calecito-mirror load, characterized in that a common-base type amplifier is added to the output end of a differential transistor, the output of which is input.
JP18451182U 1982-12-06 1982-12-06 differential amplifier Pending JPS5988922U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18451182U JPS5988922U (en) 1982-12-06 1982-12-06 differential amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18451182U JPS5988922U (en) 1982-12-06 1982-12-06 differential amplifier

Publications (1)

Publication Number Publication Date
JPS5988922U true JPS5988922U (en) 1984-06-16

Family

ID=30399053

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18451182U Pending JPS5988922U (en) 1982-12-06 1982-12-06 differential amplifier

Country Status (1)

Country Link
JP (1) JPS5988922U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6086905A (en) * 1983-10-19 1985-05-16 Hitachi Ltd Balance/unbalance converting circuit
JPS61137424A (en) * 1984-12-10 1986-06-25 Hitachi Ltd Digital input interface circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6086905A (en) * 1983-10-19 1985-05-16 Hitachi Ltd Balance/unbalance converting circuit
JPS61137424A (en) * 1984-12-10 1986-06-25 Hitachi Ltd Digital input interface circuit

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