JPS5811330U - Waveform shaping circuit - Google Patents
Waveform shaping circuitInfo
- Publication number
- JPS5811330U JPS5811330U JP10360081U JP10360081U JPS5811330U JP S5811330 U JPS5811330 U JP S5811330U JP 10360081 U JP10360081 U JP 10360081U JP 10360081 U JP10360081 U JP 10360081U JP S5811330 U JPS5811330 U JP S5811330U
- Authority
- JP
- Japan
- Prior art keywords
- waveform shaping
- shaping circuit
- differential switch
- base
- switching element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の波形整形回路の説明に供する線図、第2
図は本考案による波形整形回路の一実施例を示す接続図
、第3図は第2図例の説明に供する線図、第4図は他の
実施例を示す接続図である。
1は入力端子、2は積分回路、3は差動スイッチ、4b
はダイオード、8は出力端子、10はスイッチング素子
を構成するトランジスタ、11は抵抗器である。Figure 1 is a diagram used to explain a conventional waveform shaping circuit;
The figure is a connection diagram showing one embodiment of the waveform shaping circuit according to the present invention, FIG. 3 is a diagram for explaining the example in FIG. 2, and FIG. 4 is a connection diagram showing another embodiment. 1 is the input terminal, 2 is the integrating circuit, 3 is the differential switch, 4b
8 is a diode, 8 is an output terminal, 10 is a transistor constituting a switching element, and 11 is a resistor.
Claims (1)
方のトランジスタのベースに接続すると共に、この入力
端子をダイオードを介して上記差動スイッチを構成する
他方のトランジスタのベースに接続し、上記差動スイッ
チの出力信号を出力端子に取出すと共に、この出力信号
で制御されるスイッチング素子を設け、上記差動スイッ
チの一方のトランジスタのベースと上記スイッチング素
子の出力側との間に抵抗器を挿入した波形整形回路。The input terminal is connected to the base of one transistor constituting the differential switch via an integrating circuit, and this input terminal is connected to the base of the other transistor constituting the differential switch via a diode. The output signal of the differential switch is taken out to the output terminal, and a switching element controlled by this output signal is provided, and a resistor is inserted between the base of one of the transistors of the differential switch and the output side of the switching element. Waveform shaping circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10360081U JPS5811330U (en) | 1981-07-13 | 1981-07-13 | Waveform shaping circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10360081U JPS5811330U (en) | 1981-07-13 | 1981-07-13 | Waveform shaping circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5811330U true JPS5811330U (en) | 1983-01-25 |
Family
ID=29898209
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10360081U Pending JPS5811330U (en) | 1981-07-13 | 1981-07-13 | Waveform shaping circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5811330U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01129606A (en) * | 1987-11-16 | 1989-05-22 | Fujitsu Ltd | Waveform shaping circuit |
-
1981
- 1981-07-13 JP JP10360081U patent/JPS5811330U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01129606A (en) * | 1987-11-16 | 1989-05-22 | Fujitsu Ltd | Waveform shaping circuit |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5811330U (en) | Waveform shaping circuit | |
JPS5834433U (en) | AFT signal detection circuit | |
JPS618313U (en) | constant voltage circuit | |
JPS5866712U (en) | Muting circuit | |
JPS6040132U (en) | Phase switching circuit | |
JPS5811334U (en) | analog switch circuit | |
JPS5811332U (en) | Waveform shaping circuit | |
JPS59195818U (en) | temperature compensation circuit | |
JPS61334U (en) | Tri-state gate element chip | |
JPS60172434U (en) | Malfunction prevention circuit at startup | |
JPS60193715U (en) | Pulse polarity designation circuit | |
JPS58149832U (en) | Noise removal circuit | |
JPS59137615U (en) | amplifier circuit | |
JPS58139717U (en) | Muting circuit | |
JPS5847171U (en) | Response speed switching circuit for conversion amplifier circuit | |
JPS5890749U (en) | Waveform shaping circuit | |
JPS5893046U (en) | semiconductor logic circuit | |
JPS60158113U (en) | Level display device with volume position display | |
JPS58186610U (en) | Muting circuit | |
JPS588235U (en) | timer circuit | |
JPS582719U (en) | microphone mixing circuit | |
JPS5961452U (en) | Relay drive circuit | |
JPS5854137U (en) | Binary conversion circuit | |
JPS5896354U (en) | External line terminal board | |
JPS6085475U (en) | clamp circuit |