JPS60114421U - Mute circuit - Google Patents

Mute circuit

Info

Publication number
JPS60114421U
JPS60114421U JP129084U JP129084U JPS60114421U JP S60114421 U JPS60114421 U JP S60114421U JP 129084 U JP129084 U JP 129084U JP 129084 U JP129084 U JP 129084U JP S60114421 U JPS60114421 U JP S60114421U
Authority
JP
Japan
Prior art keywords
mute circuit
side electrode
bias
supplied
output side
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP129084U
Other languages
Japanese (ja)
Other versions
JPH0321063Y2 (en
Inventor
種市　喜夫
Original Assignee
日立電子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立電子株式会社 filed Critical 日立電子株式会社
Priority to JP129084U priority Critical patent/JPS60114421U/en
Publication of JPS60114421U publication Critical patent/JPS60114421U/en
Application granted granted Critical
Publication of JPH0321063Y2 publication Critical patent/JPH0321063Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、従来のミュート回路、第２図は本考案の実施
例を示す。 １：入力端子、２，５，１４．１７：コンデンサ、３：
電界効果トランジスタ、４：出力端子、６、７．９．１
０．１２．１３．１５．１６：抵抗、８：電源、１１：
ミュート端子。FIG. 1 shows a conventional mute circuit, and FIG. 2 shows an embodiment of the present invention. 1: Input terminal, 2, 5, 14.17: Capacitor, 3:
Field effect transistor, 4: Output terminal, 6, 7.9.1
0.12.13.15.16: Resistance, 8: Power supply, 11:
Mute terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電界効果トランジスタを使用したミュート回路において
、出力側電極のバイアスを電源に接続した抵抗から供給
し入力側電極のバイアスを出力側電極から供給したこと
を特徴とするミュート回路。A mute circuit using a field effect transistor, characterized in that a bias for an output side electrode is supplied from a resistor connected to a power supply, and a bias for an input side electrode is supplied from an output side electrode.
JP129084U 1984-01-11 1984-01-11 Mute circuit Granted JPS60114421U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP129084U JPS60114421U (en) 1984-01-11 1984-01-11 Mute circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP129084U JPS60114421U (en) 1984-01-11 1984-01-11 Mute circuit

Publications (2)

Publication Number Publication Date
JPS60114421U true JPS60114421U (en) 1985-08-02
JPH0321063Y2 JPH0321063Y2 (en) 1991-05-08

Family

ID=30473903

Family Applications (1)

Application Number Title Priority Date Filing Date
JP129084U Granted JPS60114421U (en) 1984-01-11 1984-01-11 Mute circuit

Country Status (1)

Country Link
JP (1) JPS60114421U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5114548U (en) * 1974-07-18 1976-02-02
JPS5136428U (en) * 1974-09-11 1976-03-18
JPS5396918U (en) * 1977-01-10 1978-08-07

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5114548U (en) * 1974-07-18 1976-02-02
JPS5136428U (en) * 1974-09-11 1976-03-18
JPS5396918U (en) * 1977-01-10 1978-08-07

Also Published As

Publication number Publication date
JPH0321063Y2 (en) 1991-05-08

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