JPS5796540A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5796540A
JPS5796540A JP17299880A JP17299880A JPS5796540A JP S5796540 A JPS5796540 A JP S5796540A JP 17299880 A JP17299880 A JP 17299880A JP 17299880 A JP17299880 A JP 17299880A JP S5796540 A JPS5796540 A JP S5796540A
Authority
JP
Japan
Prior art keywords
film
protective film
insulating protective
hole
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17299880A
Other languages
Japanese (ja)
Inventor
Tatsuo Yoshino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP17299880A priority Critical patent/JPS5796540A/en
Publication of JPS5796540A publication Critical patent/JPS5796540A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05005—Structure
    • H01L2224/05009—Bonding area integrally formed with a via connection of the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05073—Single internal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0504—14th Group
    • H01L2924/05042—Si3N4

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent the occurrence of cracks insulating protective film by providing a metal film such that said film covers a through-hole of the insulating protective film formed on a bonding pad. CONSTITUTION:A field oxide film 6 is arranged on a diffused layer wiring 2 connecting an input terminal with the internal part, and an insulating protective film 4 obtained by boring a through hole only on a bonding pad 3 is made to be an SiO2 film by the vapor growth method or an Si3N4 film and the like by the plasma CVD method. Further, a metal filter 8 is provided such that it covers the through hole on the bonding pad 3. At this point, the metal film 8 protects the insulating protective film from mechanical stress applied at the time of bonding, and thereby, said metal film absorbs the mechanical stress so as not to allow cracks to occur in the protective film even in a case where a bonding wire is located on the insulating protective film. For this reason, it is possible to arrange internal wiring just under the metal film.
JP17299880A 1980-12-08 1980-12-08 Semiconductor device Pending JPS5796540A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17299880A JPS5796540A (en) 1980-12-08 1980-12-08 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17299880A JPS5796540A (en) 1980-12-08 1980-12-08 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5796540A true JPS5796540A (en) 1982-06-15

Family

ID=15952282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17299880A Pending JPS5796540A (en) 1980-12-08 1980-12-08 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5796540A (en)

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