JPS5749261A - Integrated circuit device - Google Patents
Integrated circuit deviceInfo
- Publication number
- JPS5749261A JPS5749261A JP55125477A JP12547780A JPS5749261A JP S5749261 A JPS5749261 A JP S5749261A JP 55125477 A JP55125477 A JP 55125477A JP 12547780 A JP12547780 A JP 12547780A JP S5749261 A JPS5749261 A JP S5749261A
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- oscillator
- terminals
- bias
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/24—Marginal checking or other specified testing methods not covered by G06F11/26, e.g. race tests
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
PURPOSE:To effectively perform a bias-applying test, by a method wherein in an IC device a circuit is provided to detect a condition where the IC is not in a normal operation mode, and the clock pulses needed for circuit operation are applied to the circuit in the IC device from another self-oscillator incorporated in built-in manner in testing. CONSTITUTION:Under a normal condition, input terminals 3, 4 are not to be ''1'' simultaneously, and the output 31 of a testing condition detecting circuit 30 is ''0'' as well as the output 21 of a self-oscillator 20 is ''0''. A crystal oscillator is connected between terminals 1, 2 to generate an output 11 in an oscillator 10, and the circuit in an IC device is driven by the output 11 through an OR gate 50. In bias-applying test, the terminals 3, 4 are connected so as to be ''1''. At this time, ''1'' is delivered to output lines 31, 21, and when the terminals 1, 2 are previously set to a given condition and ''0'' is delivered to an output line 11, the circuit in the IC device is driven by the output of the self-oscillator 20 on an outer line 51. Thereby, it is possible to effectively carry out a bias-applying test without supplying clock pulses from the outside.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55125477A JPS5749261A (en) | 1980-09-10 | 1980-09-10 | Integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55125477A JPS5749261A (en) | 1980-09-10 | 1980-09-10 | Integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5749261A true JPS5749261A (en) | 1982-03-23 |
Family
ID=14911051
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55125477A Pending JPS5749261A (en) | 1980-09-10 | 1980-09-10 | Integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5749261A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58201151A (en) * | 1982-05-20 | 1983-11-22 | Toshiba Corp | Integrated circuit |
-
1980
- 1980-09-10 JP JP55125477A patent/JPS5749261A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58201151A (en) * | 1982-05-20 | 1983-11-22 | Toshiba Corp | Integrated circuit |
| JPH0377543B2 (en) * | 1982-05-20 | 1991-12-10 | Tokyo Shibaura Electric Co |
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