JPS5745942A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS5745942A JPS5745942A JP55121396A JP12139680A JPS5745942A JP S5745942 A JPS5745942 A JP S5745942A JP 55121396 A JP55121396 A JP 55121396A JP 12139680 A JP12139680 A JP 12139680A JP S5745942 A JPS5745942 A JP S5745942A
- Authority
- JP
- Japan
- Prior art keywords
- test
- pins
- output
- inverter
- pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/316—Testing of analog circuits
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To obtain an IC device which can perform the evaluation test of the characteristics of a function circuit by providing only one of pin exclusive for the test. CONSTITUTION:A level signal to be applied to a pin TM is fed through an inverter 14 and an inverter 15 to a function circuit 13. Signals are respectively inputted to the pins I1-In of a decoder 11, and when the output of the inverter 14 is high level, the signals of the pins I1-In are decoded, and one of the test modes of 2<n> types is selected. A test circuit 12 outputs a signal responsive to the test mode. The function circuit 13 communicates signals through the pins I1-In and input/output pins T1- Tn when the output of the inverter 15 is high level to perform the original function, and performs the evaluation test of the characteristics of the respective function blocks in response to the output signal of the testing circuit when the output is low level. According to this configuration, the test modes of 2<n> types can be set with the input pins I1-In, and the pin exclusive for the test may only the pin TM.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55121396A JPS5745942A (en) | 1980-09-02 | 1980-09-02 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55121396A JPS5745942A (en) | 1980-09-02 | 1980-09-02 | Semiconductor integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5745942A true JPS5745942A (en) | 1982-03-16 |
Family
ID=14810148
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55121396A Pending JPS5745942A (en) | 1980-09-02 | 1980-09-02 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5745942A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58201352A (en) * | 1982-05-19 | 1983-11-24 | Nec Corp | Integrated circuit device |
JPS6053041A (en) * | 1983-09-02 | 1985-03-26 | Oki Electric Ind Co Ltd | Integrated circuit provided with testing circuit |
JPH0252461A (en) * | 1988-08-17 | 1990-02-22 | Nec Kyushu Ltd | Semiconductor device |
JPH02190783A (en) * | 1988-12-14 | 1990-07-26 | Samsung Electron Co Ltd | Multiple test mode selection circuit |
-
1980
- 1980-09-02 JP JP55121396A patent/JPS5745942A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58201352A (en) * | 1982-05-19 | 1983-11-24 | Nec Corp | Integrated circuit device |
JPH0345546B2 (en) * | 1982-05-19 | 1991-07-11 | Nippon Electric Co | |
JPS6053041A (en) * | 1983-09-02 | 1985-03-26 | Oki Electric Ind Co Ltd | Integrated circuit provided with testing circuit |
JPH0576775B2 (en) * | 1983-09-02 | 1993-10-25 | Oki Electric Ind Co Ltd | |
JPH0252461A (en) * | 1988-08-17 | 1990-02-22 | Nec Kyushu Ltd | Semiconductor device |
JPH02190783A (en) * | 1988-12-14 | 1990-07-26 | Samsung Electron Co Ltd | Multiple test mode selection circuit |
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