JPS5739551A - Manufacture of selectively oxidized mask - Google Patents

Manufacture of selectively oxidized mask

Info

Publication number
JPS5739551A
JPS5739551A JP11503080A JP11503080A JPS5739551A JP S5739551 A JPS5739551 A JP S5739551A JP 11503080 A JP11503080 A JP 11503080A JP 11503080 A JP11503080 A JP 11503080A JP S5739551 A JPS5739551 A JP S5739551A
Authority
JP
Japan
Prior art keywords
film
hole
resist film
region
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11503080A
Other languages
Japanese (ja)
Inventor
Wakao Miyazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP11503080A priority Critical patent/JPS5739551A/en
Publication of JPS5739551A publication Critical patent/JPS5739551A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To prevent the decrease in the drain withstand voltage by forming a resist film smaller than the width of a hole of nitrided Si film and polycrystalline Si film formed in pattern on an SiO2 film on a substrate and selectively oxidizing the region on which ions are injected with the resist film as a mask. CONSTITUTION:A nitrided Si film 13 formed in pattern on an oxidized Si film 12 formed on the overall surface of an Si substrate 11 and a polycrystalline Si film 14 formed on the film 13 are formed larger than the hole of a resist film 15 used to form the pattern due to the difference of etching rates. Impurity ions are injected from this hole, the resist film is removed, is selectively oxidized, and an element isolating region 19 is formed. In this manner, a stopper 18 becomes a width of the hole smaller than the resist film and is contained in the region 19, thereby preventing the decrease in the drain withstand voltage without superposition with the drain and preventing the narrow channel effect.
JP11503080A 1980-08-21 1980-08-21 Manufacture of selectively oxidized mask Pending JPS5739551A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11503080A JPS5739551A (en) 1980-08-21 1980-08-21 Manufacture of selectively oxidized mask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11503080A JPS5739551A (en) 1980-08-21 1980-08-21 Manufacture of selectively oxidized mask

Publications (1)

Publication Number Publication Date
JPS5739551A true JPS5739551A (en) 1982-03-04

Family

ID=14652473

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11503080A Pending JPS5739551A (en) 1980-08-21 1980-08-21 Manufacture of selectively oxidized mask

Country Status (1)

Country Link
JP (1) JPS5739551A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6122680A (en) * 1984-07-10 1986-01-31 Japan Tobacco Inc Mixture gas for carbonic acid gas laser oscilator excited by silent discharge
JPS61121384A (en) * 1984-11-16 1986-06-09 Matsushita Electric Ind Co Ltd Sealing type co2 laser tube
US5196367A (en) * 1991-05-08 1993-03-23 Industrial Technology Research Institute Modified field isolation process with no channel-stop implant encroachment
US5208181A (en) * 1992-08-17 1993-05-04 Chartered Semiconductor Manufacturing Pte Ltd. Locos isolation scheme for small geometry or high voltage circuit
US5397732A (en) * 1993-07-22 1995-03-14 Industrial Technology Research Institute PBLOCOS with sandwiched thin silicon nitride layer
US5484742A (en) * 1991-10-08 1996-01-16 Nec Corporation Process for preparing a semiconductor device with a narrow-channel MOS transistor
EP0740337A1 (en) * 1995-04-28 1996-10-30 Nec Corporation Method of forming a thick field dielectric and a self-aligned channel stopper in a semiconductor device
WO1996036073A1 (en) * 1995-05-08 1996-11-14 Hitachi, Ltd. Semiconductor device and its manufacture

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52134380A (en) * 1976-05-06 1977-11-10 Nippon Telegr & Teleph Corp <Ntt> Production of mis type semiconductor circuits

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52134380A (en) * 1976-05-06 1977-11-10 Nippon Telegr & Teleph Corp <Ntt> Production of mis type semiconductor circuits

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6122680A (en) * 1984-07-10 1986-01-31 Japan Tobacco Inc Mixture gas for carbonic acid gas laser oscilator excited by silent discharge
JPH0240224B2 (en) * 1984-07-10 1990-09-10 Nippon Tabako Sangyo Kk
JPS61121384A (en) * 1984-11-16 1986-06-09 Matsushita Electric Ind Co Ltd Sealing type co2 laser tube
US5196367A (en) * 1991-05-08 1993-03-23 Industrial Technology Research Institute Modified field isolation process with no channel-stop implant encroachment
US5484742A (en) * 1991-10-08 1996-01-16 Nec Corporation Process for preparing a semiconductor device with a narrow-channel MOS transistor
US5208181A (en) * 1992-08-17 1993-05-04 Chartered Semiconductor Manufacturing Pte Ltd. Locos isolation scheme for small geometry or high voltage circuit
US5397732A (en) * 1993-07-22 1995-03-14 Industrial Technology Research Institute PBLOCOS with sandwiched thin silicon nitride layer
EP0740337A1 (en) * 1995-04-28 1996-10-30 Nec Corporation Method of forming a thick field dielectric and a self-aligned channel stopper in a semiconductor device
WO1996036073A1 (en) * 1995-05-08 1996-11-14 Hitachi, Ltd. Semiconductor device and its manufacture

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