JPS56126957A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56126957A
JPS56126957A JP2976780A JP2976780A JPS56126957A JP S56126957 A JPS56126957 A JP S56126957A JP 2976780 A JP2976780 A JP 2976780A JP 2976780 A JP2976780 A JP 2976780A JP S56126957 A JPS56126957 A JP S56126957A
Authority
JP
Japan
Prior art keywords
mask
projected
oxide film
electrode
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2976780A
Other languages
Japanese (ja)
Inventor
Minoru Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2976780A priority Critical patent/JPS56126957A/en
Publication of JPS56126957A publication Critical patent/JPS56126957A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the short channel effect and to reduce the wiring resistance of a semiconductor device by forming a gate electrode projected at the center and forming source, drain and wiring layer with the projected gate as a mask. CONSTITUTION:After a field oxide film 2 is formed on a P type Si substrate 1, an Si oxide film 3', a polycrystalline Si layer 4' and an Si oxide film 7' are formed thereon. An Si oxide film mask 7 and a temporary gate electrode 4 are formed by selectively etching with a photoresist film mask 8. Then, the mask 7 is etched from the side surface to reduce the width of the mask 7 as a mask 71. At this time the film 3' is simultaneously etched to become a gate oxide film 3. Then, with the mask 71 as a mask the periphery is projected at the side of the substrate 1, the central region is retained, and a projected gate electrode 41 is formed thereat. Subsequently, with the electrode 41 as a mask an ion implantation is conducted to simultaneously form a source region 5, a drain region 6 and a wiring region 9. Consequently, the projected lower edge of the electrode 41 is reduced in the depth of diffusion, thereby preventing the short channel effect.
JP2976780A 1980-03-11 1980-03-11 Manufacture of semiconductor device Pending JPS56126957A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2976780A JPS56126957A (en) 1980-03-11 1980-03-11 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2976780A JPS56126957A (en) 1980-03-11 1980-03-11 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56126957A true JPS56126957A (en) 1981-10-05

Family

ID=12285188

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2976780A Pending JPS56126957A (en) 1980-03-11 1980-03-11 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56126957A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58200576A (en) * 1982-05-18 1983-11-22 Oki Electric Ind Co Ltd Mos type field effect transistor and manufacture thereof
US4978626A (en) * 1988-09-02 1990-12-18 Motorola, Inc. LDD transistor process having doping sensitive endpoint etching
JP2007216262A (en) * 2006-02-16 2007-08-30 Nippon Steel Corp Device and method for attaching/detaching in-mold electromagnetic stirring device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58200576A (en) * 1982-05-18 1983-11-22 Oki Electric Ind Co Ltd Mos type field effect transistor and manufacture thereof
JPH058571B2 (en) * 1982-05-18 1993-02-02 Oki Electric Ind Co Ltd
US4978626A (en) * 1988-09-02 1990-12-18 Motorola, Inc. LDD transistor process having doping sensitive endpoint etching
JP2007216262A (en) * 2006-02-16 2007-08-30 Nippon Steel Corp Device and method for attaching/detaching in-mold electromagnetic stirring device

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