JPS5654538A - Communication controller - Google Patents

Communication controller

Info

Publication number
JPS5654538A
JPS5654538A JP12986779A JP12986779A JPS5654538A JP S5654538 A JPS5654538 A JP S5654538A JP 12986779 A JP12986779 A JP 12986779A JP 12986779 A JP12986779 A JP 12986779A JP S5654538 A JPS5654538 A JP S5654538A
Authority
JP
Japan
Prior art keywords
interruption
register
program
start address
external state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12986779A
Other languages
Japanese (ja)
Inventor
Seiji Shimoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12986779A priority Critical patent/JPS5654538A/en
Publication of JPS5654538A publication Critical patent/JPS5654538A/en
Pending legal-status Critical Current

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Landscapes

  • Communication Control (AREA)
  • Computer And Data Communications (AREA)

Abstract

PURPOSE: To reduce the number of dynamic steps of a program with regard to a communication controller, by analysing and deciding an external state that corresponds to an interruption of the same program interruption level by a hardware means.
CONSTITUTION: When an interruption of a certain program interruption level is made, interruption analyzing circuit 1 sets status display register 2 according to the result of an analysis of and decision on the current external state. For example, bit 2-1 and bit 2-2 of register 2 represent a normal interruption and various abnormal interruptions and with output signal S showing interruption existence from analyzing circuit 1, the contents of register 2 are supplied to the input gate group of instruction address register 5 via gate group 3. In start address constant generating circuit 4, the start address of a program that corresponds to the external state is set up as a constant and the start address of the corresponding program is set in register 5 via the input gate group, thereby performing the interruption processing.
COPYRIGHT: (C)1981,JPO&Japio
JP12986779A 1979-10-11 1979-10-11 Communication controller Pending JPS5654538A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12986779A JPS5654538A (en) 1979-10-11 1979-10-11 Communication controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12986779A JPS5654538A (en) 1979-10-11 1979-10-11 Communication controller

Publications (1)

Publication Number Publication Date
JPS5654538A true JPS5654538A (en) 1981-05-14

Family

ID=15020244

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12986779A Pending JPS5654538A (en) 1979-10-11 1979-10-11 Communication controller

Country Status (1)

Country Link
JP (1) JPS5654538A (en)

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