JPS5599660A - Trigger method for digital logic signal analyzer - Google Patents

Trigger method for digital logic signal analyzer

Info

Publication number
JPS5599660A
JPS5599660A JP696579A JP696579A JPS5599660A JP S5599660 A JPS5599660 A JP S5599660A JP 696579 A JP696579 A JP 696579A JP 696579 A JP696579 A JP 696579A JP S5599660 A JPS5599660 A JP S5599660A
Authority
JP
Japan
Prior art keywords
wrg
constitution
time
series data
shift circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP696579A
Other languages
Japanese (ja)
Inventor
Kiyoshi Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP696579A priority Critical patent/JPS5599660A/en
Publication of JPS5599660A publication Critical patent/JPS5599660A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To secure application of the trigger to the time-series data pattern by installing the prescribed shift circuit to the logic analyzer.
CONSTITUTION: The logic equalizer of, for example, 8 channels consists of input comparator COMP, sequential access memory SAM, threshold setting circuit THRH, word recognizer WRG, display unit DRY and others. Then shift circuit STC comprising cascade-connected FF302W309 plus inverter 318 is connected between COM and WRG. In such constitution, the value of input data 301 is transferred in sequence to FF309 from FF302 in synchronization with block signal 105, and at the same time output 310W317 are generated from each FF. These output are then supplied to WRG in order to obtain trigger signal 106 to the time-series data.
COPYRIGHT: (C)1980,JPO&Japio
JP696579A 1979-01-24 1979-01-24 Trigger method for digital logic signal analyzer Pending JPS5599660A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP696579A JPS5599660A (en) 1979-01-24 1979-01-24 Trigger method for digital logic signal analyzer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP696579A JPS5599660A (en) 1979-01-24 1979-01-24 Trigger method for digital logic signal analyzer

Publications (1)

Publication Number Publication Date
JPS5599660A true JPS5599660A (en) 1980-07-29

Family

ID=11652910

Family Applications (1)

Application Number Title Priority Date Filing Date
JP696579A Pending JPS5599660A (en) 1979-01-24 1979-01-24 Trigger method for digital logic signal analyzer

Country Status (1)

Country Link
JP (1) JPS5599660A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5847944U (en) * 1981-09-29 1983-03-31 横河電機株式会社 microprocessor analyzer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5847944U (en) * 1981-09-29 1983-03-31 横河電機株式会社 microprocessor analyzer

Similar Documents

Publication Publication Date Title
JPS56160157A (en) Bit clock reproducing circuit
JPS5599660A (en) Trigger method for digital logic signal analyzer
JPS5685127A (en) Digital signal processor
JPS54145441A (en) Converter
JPS5379329A (en) Test method of memory circuit
JPS529334A (en) Status change input/output equipment
JPS53135540A (en) Display system for output data setting at sequnce programer
JPS52137944A (en) Time supervisory system of input output non-synchronous singnal
JPS5533204A (en) Digital control system
JPS52140246A (en) Information processing unit
JPS5642478A (en) Data transmission and processing system
JPS5231625A (en) Memory test method
JPS5384437A (en) Control system for test pattern generation
JPS5332070A (en) Pulse integrating recorder
JPS5657109A (en) Sequence control device
JPS5465279A (en) Sequence control equipment
JPS53148240A (en) Parallel system between external memory and main memory
JPS54158154A (en) Method and apparatus for analog-digiral conversion
JPS5698796A (en) High-speed memory test system
JPS5560872A (en) Pattern generator
JPS53121533A (en) Multiplier circuit system
JPS5622131A (en) Data input system
JPS5471924A (en) Binary circuit
JPS5532180A (en) Sequence controller capable of connecting plurality of external equipments
JPS5534313A (en) Memory device