JPS54145447A - Input-output control system - Google Patents
Input-output control systemInfo
- Publication number
- JPS54145447A JPS54145447A JP5330278A JP5330278A JPS54145447A JP S54145447 A JPS54145447 A JP S54145447A JP 5330278 A JP5330278 A JP 5330278A JP 5330278 A JP5330278 A JP 5330278A JP S54145447 A JPS54145447 A JP S54145447A
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- bus
- controller
- ram52
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To perform efficiently the input-output control for information required at the time of bus request or input-output operation, by performing fixing input- output operation over access to a RAM.
CONSTITUTION: The information processing system is constituted by connecting an arithmetic controller, a main memory unit, a main input-output controller, and a slave input-output controller to single bus K-BUS. The main input-output controller consists of μCPU51, RAM52, an input-output adapter, etc.; the μCPU51 controls the whole input-output processes and RAM52, when K-BUS is requested by CPU51 and the arithmetic controller, is stored by their indications with data, part of which is used as an input-output register. In the above constitution, the fixed input and output of information required at the time of a request to and input and output operations from and to K-BUS are attained by attaining access to RAM52. Consequently, input-output control can be performed efficiently.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5330278A JPS54145447A (en) | 1978-05-06 | 1978-05-06 | Input-output control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5330278A JPS54145447A (en) | 1978-05-06 | 1978-05-06 | Input-output control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54145447A true JPS54145447A (en) | 1979-11-13 |
Family
ID=12938923
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5330278A Pending JPS54145447A (en) | 1978-05-06 | 1978-05-06 | Input-output control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54145447A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60110064A (en) * | 1983-08-04 | 1985-06-15 | テクトロニツクス・インコ−ポレイテツド | Non-synchronous buffer communication interface |
JPS60120452A (en) * | 1983-12-02 | 1985-06-27 | Advantest Corp | Data transmitting device |
JPS61216070A (en) * | 1985-02-13 | 1986-09-25 | Fujitsu Ltd | System for sharing hardware of i/o controller |
-
1978
- 1978-05-06 JP JP5330278A patent/JPS54145447A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60110064A (en) * | 1983-08-04 | 1985-06-15 | テクトロニツクス・インコ−ポレイテツド | Non-synchronous buffer communication interface |
JPS60120452A (en) * | 1983-12-02 | 1985-06-27 | Advantest Corp | Data transmitting device |
JPS61216070A (en) * | 1985-02-13 | 1986-09-25 | Fujitsu Ltd | System for sharing hardware of i/o controller |
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